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* [PATCH] MIPS: SNI: Fix spurious interrupts
@ 2020-09-16 13:54 Thomas Bogendoerfer
  2020-09-17 13:55 ` Thomas Bogendoerfer
  0 siblings, 1 reply; 2+ messages in thread
From: Thomas Bogendoerfer @ 2020-09-16 13:54 UTC (permalink / raw)
  To: Thomas Gleixner, Ralf Baechle, linux-mips, linux-kernel

On A20R machines the interrupt pending bits in cause register need to be
updated by requesting the chipset to do it. This needs to be done to
find the interrupt cause and after interrupt service. In
commit 0b888c7f3a03 ("MIPS: SNI: Convert to new irq_chip functions") the
function to do after service update got lost, which caused spurious
interrupts.

Fixes: 0b888c7f3a03 ("MIPS: SNI: Convert to new irq_chip functions")
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
 arch/mips/sni/a20r.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c
index b09dc844985a..eeeec18c420a 100644
--- a/arch/mips/sni/a20r.c
+++ b/arch/mips/sni/a20r.c
@@ -143,7 +143,10 @@ static struct platform_device sc26xx_pdev = {
 	},
 };
 
-static u32 a20r_ack_hwint(void)
+/*
+ * Trigger chipset to update CPU's CAUSE IP field
+ */
+static u32 a20r_update_cause_ip(void)
 {
 	u32 status = read_c0_status();
 
@@ -205,12 +208,14 @@ static void a20r_hwint(void)
 	int irq;
 
 	clear_c0_status(IE_IRQ0);
-	status = a20r_ack_hwint();
+	status = a20r_update_cause_ip();
 	cause = read_c0_cause();
 
 	irq = ffs(((cause & status) >> 8) & 0xf8);
 	if (likely(irq > 0))
 		do_IRQ(SNI_A20R_IRQ_BASE + irq - 1);
+
+	a20r_update_cause_ip();
 	set_c0_status(IE_IRQ0);
 }
 
-- 
2.16.4


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] MIPS: SNI: Fix spurious interrupts
  2020-09-16 13:54 [PATCH] MIPS: SNI: Fix spurious interrupts Thomas Bogendoerfer
@ 2020-09-17 13:55 ` Thomas Bogendoerfer
  0 siblings, 0 replies; 2+ messages in thread
From: Thomas Bogendoerfer @ 2020-09-17 13:55 UTC (permalink / raw)
  To: Thomas Gleixner, Ralf Baechle, linux-mips, linux-kernel

On Wed, Sep 16, 2020 at 03:54:37PM +0200, Thomas Bogendoerfer wrote:
> On A20R machines the interrupt pending bits in cause register need to be
> updated by requesting the chipset to do it. This needs to be done to
> find the interrupt cause and after interrupt service. In
> commit 0b888c7f3a03 ("MIPS: SNI: Convert to new irq_chip functions") the
> function to do after service update got lost, which caused spurious
> interrupts.
> 
> Fixes: 0b888c7f3a03 ("MIPS: SNI: Convert to new irq_chip functions")
> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
> ---
>  arch/mips/sni/a20r.c | 9 +++++++--
>  1 file changed, 7 insertions(+), 2 deletions(-)

applied to mips-fixes.

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]

^ permalink raw reply	[flat|nested] 2+ messages in thread

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