[PATCH 0/2] Repair X1000E SoC L2 cache capacity detection.

[PATCH 0/2] Repair X1000E SoC L2 cache capacity detection.

[周琰杰 (Zhou Yanjie)]

The X1000E SoC has a 4-way L2 cache with a capacity of 128 KiB.
The current code cannot detect its correctly, which will cause
the CU1000-Neo board using the X1000E SoC to report that it
has found a 5-way 320KiB L2 cache at boot time. This series
of patches is to fix this problem.

周琰杰 (Zhou Yanjie) (2):
  MIPS: X1000E: Add X1000E system type.
  MIPS: Ingenic: Fix bugs when detecting X1000E's L2 cache.

 arch/mips/generic/board-ingenic.c | 3 +++
 arch/mips/include/asm/bootinfo.h  | 1 +
 arch/mips/mm/sc-mips.c            | 1 +
 3 files changed, 5 insertions(+)

-- 
2.11.0

[PATCH 1/2] MIPS: X1000E: Add X1000E system type.

[周琰杰 (Zhou Yanjie)]

Add X1000 system type for cat /proc/cpuinfo to give out X1000E.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
---
 arch/mips/generic/board-ingenic.c | 3 +++
 arch/mips/include/asm/bootinfo.h  | 1 +
 2 files changed, 4 insertions(+)

diff --git a/arch/mips/generic/board-ingenic.c b/arch/mips/generic/board-ingenic.c
index 0d7de8f9713d..c634ee35a6cd 100644
--- a/arch/mips/generic/board-ingenic.c
+++ b/arch/mips/generic/board-ingenic.c
@@ -23,6 +23,8 @@ static __init char *ingenic_get_system_type(unsigned long machtype)
 	switch (machtype) {
 	case MACH_INGENIC_X1830:
 		return "X1830";
+	case MACH_INGENIC_X1000E:
+		return "X1000E";
 	case MACH_INGENIC_X1000:
 		return "X1000";
 	case MACH_INGENIC_JZ4780:
@@ -58,6 +60,7 @@ static const struct of_device_id ingenic_of_match[] __initconst = {
 	{ .compatible = "ingenic,jz4770", .data = (void *)MACH_INGENIC_JZ4770 },
 	{ .compatible = "ingenic,jz4780", .data = (void *)MACH_INGENIC_JZ4780 },
 	{ .compatible = "ingenic,x1000", .data = (void *)MACH_INGENIC_X1000 },
+	{ .compatible = "ingenic,x1000e", .data = (void *)MACH_INGENIC_X1000E },
 	{ .compatible = "ingenic,x1830", .data = (void *)MACH_INGENIC_X1830 },
 	{}
 };
diff --git a/arch/mips/include/asm/bootinfo.h b/arch/mips/include/asm/bootinfo.h
index 147c9327ce04..b6fdfbec1f07 100644
--- a/arch/mips/include/asm/bootinfo.h
+++ b/arch/mips/include/asm/bootinfo.h
@@ -79,6 +79,7 @@ enum ingenic_machine_type {
 	MACH_INGENIC_JZ4775,
 	MACH_INGENIC_JZ4780,
 	MACH_INGENIC_X1000,
+	MACH_INGENIC_X1000E,
 	MACH_INGENIC_X1830,
 	MACH_INGENIC_X2000,
 };
-- 
2.11.0

Re: [PATCH 1/2] MIPS: X1000E: Add X1000E system type.

[Paul Cercueil]

Le sam. 19 sept. 2020 à 20:44, 周琰杰 (Zhou Yanjie) 
<zhouyanjie@wanyeetech.com> a écrit :
> Add X1000 system type for cat /proc/cpuinfo to give out X1000E.
> 
> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>

For the 2 patches:
Reviewed-by: Paul Cercueil <paul@crapouillou.net>

Cheers,
-Paul

> ---
>  arch/mips/generic/board-ingenic.c | 3 +++
>  arch/mips/include/asm/bootinfo.h  | 1 +
>  2 files changed, 4 insertions(+)
> 
> diff --git a/arch/mips/generic/board-ingenic.c 
> b/arch/mips/generic/board-ingenic.c
> index 0d7de8f9713d..c634ee35a6cd 100644
> --- a/arch/mips/generic/board-ingenic.c
> +++ b/arch/mips/generic/board-ingenic.c
> @@ -23,6 +23,8 @@ static __init char 
> *ingenic_get_system_type(unsigned long machtype)
>  	switch (machtype) {
>  	case MACH_INGENIC_X1830:
>  		return "X1830";
> +	case MACH_INGENIC_X1000E:
> +		return "X1000E";
>  	case MACH_INGENIC_X1000:
>  		return "X1000";
>  	case MACH_INGENIC_JZ4780:
> @@ -58,6 +60,7 @@ static const struct of_device_id ingenic_of_match[] 
> __initconst = {
>  	{ .compatible = "ingenic,jz4770", .data = (void 
> *)MACH_INGENIC_JZ4770 },
>  	{ .compatible = "ingenic,jz4780", .data = (void 
> *)MACH_INGENIC_JZ4780 },
>  	{ .compatible = "ingenic,x1000", .data = (void *)MACH_INGENIC_X1000 
> },
> +	{ .compatible = "ingenic,x1000e", .data = (void 
> *)MACH_INGENIC_X1000E },
>  	{ .compatible = "ingenic,x1830", .data = (void *)MACH_INGENIC_X1830 
> },
>  	{}
>  };
> diff --git a/arch/mips/include/asm/bootinfo.h 
> b/arch/mips/include/asm/bootinfo.h
> index 147c9327ce04..b6fdfbec1f07 100644
> --- a/arch/mips/include/asm/bootinfo.h
> +++ b/arch/mips/include/asm/bootinfo.h
> @@ -79,6 +79,7 @@ enum ingenic_machine_type {
>  	MACH_INGENIC_JZ4775,
>  	MACH_INGENIC_JZ4780,
>  	MACH_INGENIC_X1000,
> +	MACH_INGENIC_X1000E,
>  	MACH_INGENIC_X1830,
>  	MACH_INGENIC_X2000,
>  };
> --
> 2.11.0
> 

[PATCH 2/2] MIPS: Ingenic: Fix bugs when detecting X1000E's L2 cache.

[周琰杰 (Zhou Yanjie)]

Fix bugs when detecting L2 cache sets value and ways value.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
---
 arch/mips/mm/sc-mips.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/mips/mm/sc-mips.c b/arch/mips/mm/sc-mips.c
index 97dc0511e63f..145b39ecb246 100644
--- a/arch/mips/mm/sc-mips.c
+++ b/arch/mips/mm/sc-mips.c
@@ -235,6 +235,7 @@ static inline int __init mips_sc_probe(void)
 		 * According to config2 it would be 5-ways and 512-sets,
 		 * but that is contradicted by all documentation.
 		 */
+		case MACH_INGENIC_X1000E:
 		case MACH_INGENIC_X1000:
 			c->scache.sets = 256;
 			c->scache.ways = 4;
-- 
2.11.0