From: shuo.a.liu@intel.com
To: linux-kernel@vger.kernel.org, x86@kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
"H . Peter Anvin" <hpa@zytor.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Sean Christopherson <sean.j.christopherson@intel.com>,
Yu Wang <yu1.wang@intel.com>,
Reinette Chatre <reinette.chatre@intel.com>,
Shuo Liu <shuo.a.liu@intel.com>
Subject: [PATCH v4 10/17] virt: acrn: Introduce PCI configuration space PIO accesses combiner
Date: Tue, 22 Sep 2020 19:43:04 +0800 [thread overview]
Message-ID: <20200922114311.38804-11-shuo.a.liu@intel.com> (raw)
In-Reply-To: <20200922114311.38804-1-shuo.a.liu@intel.com>
From: Shuo Liu <shuo.a.liu@intel.com>
A User VM can access its virtual PCI configuration spaces via port IO
approach, which has two following steps:
1) writes address into port 0xCF8
2) put/get data in/from port 0xCFC
To distribute a complete PCI configuration space access one time, HSM
need to combine such two accesses together.
Combine two paired PIO I/O requests into one PCI I/O request and
continue the I/O request distribution.
Signed-off-by: Shuo Liu <shuo.a.liu@intel.com>
Reviewed-by: Reinette Chatre <reinette.chatre@intel.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
drivers/virt/acrn/acrn_drv.h | 2 +
drivers/virt/acrn/ioreq.c | 76 ++++++++++++++++++++++++++++++++++++
include/uapi/linux/acrn.h | 15 +++++++
3 files changed, 93 insertions(+)
diff --git a/drivers/virt/acrn/acrn_drv.h b/drivers/virt/acrn/acrn_drv.h
index cf9143cf760d..97d2aab8b70a 100644
--- a/drivers/virt/acrn/acrn_drv.h
+++ b/drivers/virt/acrn/acrn_drv.h
@@ -156,6 +156,7 @@ extern rwlock_t acrn_vm_list_lock;
* @default_client: The default I/O request client
* @ioreq_buf: I/O request shared buffer
* @ioreq_page: The page of the I/O request shared buffer
+ * @pci_conf_addr: Address of a PCI configuration access emulation
*/
struct acrn_vm {
struct list_head list;
@@ -170,6 +171,7 @@ struct acrn_vm {
struct acrn_ioreq_client *default_client;
struct acrn_io_request_buffer *ioreq_buf;
struct page *ioreq_page;
+ u32 pci_conf_addr;
};
struct acrn_vm *acrn_vm_create(struct acrn_vm *vm,
diff --git a/drivers/virt/acrn/ioreq.c b/drivers/virt/acrn/ioreq.c
index 2e9fd432c147..bf194f0fbd70 100644
--- a/drivers/virt/acrn/ioreq.c
+++ b/drivers/virt/acrn/ioreq.c
@@ -221,6 +221,80 @@ int acrn_ioreq_client_wait(struct acrn_ioreq_client *client)
return 0;
}
+static bool is_cfg_addr(struct acrn_io_request *req)
+{
+ return ((req->type == ACRN_IOREQ_TYPE_PORTIO) &&
+ (req->reqs.pio_request.address == 0xcf8));
+}
+
+static bool is_cfg_data(struct acrn_io_request *req)
+{
+ return ((req->type == ACRN_IOREQ_TYPE_PORTIO) &&
+ ((req->reqs.pio_request.address >= 0xcfc) &&
+ (req->reqs.pio_request.address < (0xcfc + 4))));
+}
+
+/* The low 8-bit of supported pci_reg addr.*/
+#define PCI_LOWREG_MASK 0xFC
+/* The high 4-bit of supported pci_reg addr */
+#define PCI_HIGHREG_MASK 0xF00
+/* Max number of supported functions */
+#define PCI_FUNCMAX 7
+/* Max number of supported slots */
+#define PCI_SLOTMAX 31
+/* Max number of supported buses */
+#define PCI_BUSMAX 255
+#define CONF1_ENABLE 0x80000000UL
+/*
+ * A PCI configuration space access via PIO 0xCF8 and 0xCFC normally has two
+ * following steps:
+ * 1) writes address into 0xCF8 port
+ * 2) accesses data in/from 0xCFC
+ * This function combines such paired PCI configuration space I/O requests into
+ * one ACRN_IOREQ_TYPE_PCICFG type I/O request and continues the processing.
+ */
+static bool handle_cf8cfc(struct acrn_vm *vm,
+ struct acrn_io_request *req, u16 vcpu)
+{
+ int offset, pci_cfg_addr, pci_reg;
+ bool is_handled = false;
+
+ if (is_cfg_addr(req)) {
+ WARN_ON(req->reqs.pio_request.size != 4);
+ if (req->reqs.pio_request.direction == ACRN_IOREQ_DIR_WRITE)
+ vm->pci_conf_addr = req->reqs.pio_request.value;
+ else
+ req->reqs.pio_request.value = vm->pci_conf_addr;
+ is_handled = true;
+ } else if (is_cfg_data(req)) {
+ if (!(vm->pci_conf_addr & CONF1_ENABLE)) {
+ if (req->reqs.pio_request.direction ==
+ ACRN_IOREQ_DIR_READ)
+ req->reqs.pio_request.value = 0xffffffff;
+ is_handled = true;
+ } else {
+ offset = req->reqs.pio_request.address - 0xcfc;
+
+ req->type = ACRN_IOREQ_TYPE_PCICFG;
+ pci_cfg_addr = vm->pci_conf_addr;
+ req->reqs.pci_request.bus =
+ (pci_cfg_addr >> 16) & PCI_BUSMAX;
+ req->reqs.pci_request.dev =
+ (pci_cfg_addr >> 11) & PCI_SLOTMAX;
+ req->reqs.pci_request.func =
+ (pci_cfg_addr >> 8) & PCI_FUNCMAX;
+ pci_reg = (pci_cfg_addr & PCI_LOWREG_MASK) +
+ ((pci_cfg_addr >> 16) & PCI_HIGHREG_MASK);
+ req->reqs.pci_request.reg = pci_reg + offset;
+ }
+ }
+
+ if (is_handled)
+ ioreq_complete_request(vm, vcpu, req);
+
+ return is_handled;
+}
+
static bool in_range(struct acrn_ioreq_range *range,
struct acrn_io_request *req)
{
@@ -381,6 +455,8 @@ static int acrn_ioreq_dispatch(struct acrn_vm *vm)
ioreq_complete_request(vm, i, req);
continue;
}
+ if (handle_cf8cfc(vm, req, i))
+ continue;
spin_lock_bh(&vm->ioreq_clients_lock);
client = find_ioreq_client(vm, req);
diff --git a/include/uapi/linux/acrn.h b/include/uapi/linux/acrn.h
index 8eb687f1482c..31cf0fd73bcc 100644
--- a/include/uapi/linux/acrn.h
+++ b/include/uapi/linux/acrn.h
@@ -20,6 +20,7 @@
#define ACRN_IOREQ_TYPE_PORTIO 0
#define ACRN_IOREQ_TYPE_MMIO 1
+#define ACRN_IOREQ_TYPE_PCICFG 2
#define ACRN_IOREQ_DIR_READ 0
#define ACRN_IOREQ_DIR_WRITE 1
@@ -40,6 +41,18 @@ struct acrn_pio_request {
__u32 value;
} __attribute__((aligned(8)));
+/* Need keep same header fields with pio_request */
+struct acrn_pci_request {
+ __u32 direction;
+ __u32 reserved[3];
+ __u64 size;
+ __u32 value;
+ __u32 bus;
+ __u32 dev;
+ __u32 func;
+ __u32 reg;
+} __attribute__((aligned(8)));
+
/**
* struct acrn_io_request - 256-byte ACRN I/O request
* @type: Type of this request (ACRN_IOREQ_TYPE_*).
@@ -48,6 +61,7 @@ struct acrn_pio_request {
* @reserved0: Reserved fields.
* @reqs: Union of different types of request. Byte offset: 64.
* @reqs.pio_request: PIO request data of the I/O request.
+ * @reqs.pci_request: PCI configuration space request data of the I/O request.
* @reqs.mmio_request: MMIO request data of the I/O request.
* @reqs.data: Raw data of the I/O request.
* @reserved1: Reserved fields.
@@ -107,6 +121,7 @@ struct acrn_io_request {
__u32 reserved0[14];
union {
struct acrn_pio_request pio_request;
+ struct acrn_pci_request pci_request;
struct acrn_mmio_request mmio_request;
__u64 data[8];
} reqs;
--
2.28.0
next prev parent reply other threads:[~2020-09-22 11:46 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-22 11:42 [PATCH v4 00/17] HSM driver for ACRN hypervisor shuo.a.liu
2020-09-22 11:42 ` [PATCH v4 01/17] docs: acrn: Introduce ACRN shuo.a.liu
2020-10-09 1:48 ` Randy Dunlap
2020-10-12 8:50 ` Shuo A Liu
2020-09-22 11:42 ` [PATCH v4 02/17] x86/acrn: Introduce acrn_{setup, remove}_intr_handler() shuo.a.liu
2020-09-27 10:49 ` Greg Kroah-Hartman
2020-09-28 3:28 ` Shuo A Liu
2020-09-29 18:01 ` Borislav Petkov
2020-09-29 20:07 ` Thomas Gleixner
2020-09-29 20:26 ` Borislav Petkov
2020-09-30 3:02 ` Shuo A Liu
2020-09-22 11:42 ` [PATCH v4 03/17] x86/acrn: Introduce an API to check if a VM is privileged shuo.a.liu
2020-09-30 8:09 ` Borislav Petkov
2020-10-12 8:40 ` Shuo A Liu
2020-09-22 11:42 ` [PATCH v4 04/17] x86/acrn: Introduce hypercall interfaces shuo.a.liu
2020-09-27 10:51 ` Greg Kroah-Hartman
2020-09-27 10:53 ` Greg Kroah-Hartman
2020-09-28 3:38 ` Shuo A Liu
2020-09-27 15:38 ` Dave Hansen
2020-09-30 11:16 ` Peter Zijlstra
2020-09-30 16:10 ` Segher Boessenkool
2020-09-30 17:13 ` Peter Zijlstra
2020-09-30 19:14 ` Nick Desaulniers
2020-09-30 19:42 ` Peter Zijlstra
2020-09-30 23:58 ` Segher Boessenkool
2020-09-30 19:59 ` Arvind Sankar
2020-09-30 20:01 ` Arvind Sankar
2020-10-01 0:08 ` Segher Boessenkool
2020-09-30 23:25 ` Segher Boessenkool
2020-09-30 23:38 ` Arvind Sankar
2020-10-01 0:11 ` Segher Boessenkool
2020-10-12 8:44 ` Shuo A Liu
2020-10-12 16:49 ` Arvind Sankar
2020-10-13 2:44 ` Shuo A Liu
2020-09-30 10:54 ` Borislav Petkov
2020-10-12 8:49 ` Shuo A Liu
2020-09-22 11:42 ` [PATCH v4 05/17] virt: acrn: Introduce ACRN HSM basic driver shuo.a.liu
2020-09-22 11:43 ` [PATCH v4 08/17] virt: acrn: Introduce EPT mapping management shuo.a.liu
2020-09-22 11:43 ` shuo.a.liu [this message]
2020-09-22 11:43 ` [PATCH v4 11/17] virt: acrn: Introduce interfaces for PCI device passthrough shuo.a.liu
2020-09-22 11:43 ` [PATCH v4 12/17] virt: acrn: Introduce interrupt injection interfaces shuo.a.liu
2020-09-22 11:43 ` [PATCH v4 14/17] virt: acrn: Introduce I/O ranges operation interfaces shuo.a.liu
2020-09-22 11:43 ` [PATCH v4 16/17] virt: acrn: Introduce irqfd shuo.a.liu
2020-09-22 11:43 ` [PATCH v4 17/17] virt: acrn: Introduce an interface for Service VM to control vCPU shuo.a.liu
2020-09-27 10:44 ` Greg Kroah-Hartman
2020-09-28 4:10 ` Shuo A Liu
2020-09-28 5:23 ` Greg Kroah-Hartman
2020-09-28 6:33 ` Shuo A Liu
2020-09-27 0:24 ` [PATCH v4 00/17] HSM driver for ACRN hypervisor Liu, Shuo A
2020-09-27 5:42 ` Greg Kroah-Hartman
[not found] ` <20200922114311.38804-7-shuo.a.liu@intel.com>
2020-09-27 10:45 ` [PATCH v4 06/17] virt: acrn: Introduce VM management interfaces Greg Kroah-Hartman
2020-09-28 3:43 ` Shuo A Liu
2020-09-27 10:47 ` Greg Kroah-Hartman
2020-09-28 3:50 ` Shuo A Liu
2020-09-28 5:25 ` Greg Kroah-Hartman
2020-09-28 6:29 ` Shuo A Liu
2020-09-28 12:26 ` Greg Kroah-Hartman
2020-09-30 2:49 ` Shuo A Liu
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