[PATCH v2] intel_idle: mention assumption that wbinvd is not needed

[PATCH v2] intel_idle: mention assumption that wbinvd is not needed

[Alexander Monakov]

Intel SDM does not explicitly say that entering a C-state via MWAIT will
implicitly flush CPU caches as appropriate for that C-state. However,
documentation for individual Intel CPU generations does mention this
behavior.

Since intel_idle binds to any Intel CPU with MWAIT, list this assumption
of MWAIT behavior. In passing, reword opening comment to make it clear
that the driver can load on any old and future Intel CPU with MWAIT.

Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
---

v2: reword remark about WBINVD (Rafael)

 drivers/idle/intel_idle.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
index f4495841bf68..6d87f2129119 100644
--- a/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@ -8,7 +8,7 @@
  */
 
 /*
- * intel_idle is a cpuidle driver that loads on specific Intel processors
+ * intel_idle is a cpuidle driver that loads on all Intel CPUs with MWAIT
  * in lieu of the legacy ACPI processor_idle driver.  The intent is to
  * make Linux more efficient on these processors, as intel_idle knows
  * more than ACPI, as well as make Linux more immune to ACPI BIOS bugs.
@@ -20,7 +20,11 @@
  * All CPUs have same idle states as boot CPU
  *
  * Chipset BM_STS (bus master status) bit is a NOP
- *	for preventing entry into deep C-stats
+ *	for preventing entry into deep C-states
+ *
+ * CPU will flush caches as needed when entering a C-state via MWAIT
+ *	(in contrast to entering ACPI C3, in which case the WBINVD
+ *	instruction needs to be executed to flush the caches)
  */
 
 /*
-- 
2.26.2

Re: [PATCH v2] intel_idle: mention assumption that wbinvd is not needed

[Rafael J. Wysocki]

On Mon, Oct 12, 2020 at 2:51 PM Alexander Monakov <amonakov@ispras.ru> wrote:
>
> Intel SDM does not explicitly say that entering a C-state via MWAIT will
> implicitly flush CPU caches as appropriate for that C-state. However,
> documentation for individual Intel CPU generations does mention this
> behavior.
>
> Since intel_idle binds to any Intel CPU with MWAIT, list this assumption
> of MWAIT behavior. In passing, reword opening comment to make it clear
> that the driver can load on any old and future Intel CPU with MWAIT.
>
> Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
> Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> ---
>
> v2: reword remark about WBINVD (Rafael)
>
>  drivers/idle/intel_idle.c | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
> index f4495841bf68..6d87f2129119 100644
> --- a/drivers/idle/intel_idle.c
> +++ b/drivers/idle/intel_idle.c
> @@ -8,7 +8,7 @@
>   */
>
>  /*
> - * intel_idle is a cpuidle driver that loads on specific Intel processors
> + * intel_idle is a cpuidle driver that loads on all Intel CPUs with MWAIT
>   * in lieu of the legacy ACPI processor_idle driver.  The intent is to
>   * make Linux more efficient on these processors, as intel_idle knows
>   * more than ACPI, as well as make Linux more immune to ACPI BIOS bugs.
> @@ -20,7 +20,11 @@
>   * All CPUs have same idle states as boot CPU
>   *
>   * Chipset BM_STS (bus master status) bit is a NOP
> - *     for preventing entry into deep C-stats
> + *     for preventing entry into deep C-states
> + *
> + * CPU will flush caches as needed when entering a C-state via MWAIT
> + *     (in contrast to entering ACPI C3, in which case the WBINVD
> + *     instruction needs to be executed to flush the caches)
>   */
>
>  /*
> --

Applied as 5.10-rc material, thanks!