* Re: [PATCH v2 5/6] dt-bindings: media: renesas,vin: Add V3U support
2020-10-16 11:11 ` [PATCH v2 5/6] dt-bindings: media: renesas,vin: Add V3U support Jacopo Mondi
@ 2020-10-16 10:48 ` Niklas Söderlund
0 siblings, 0 replies; 8+ messages in thread
From: Niklas Söderlund @ 2020-10-16 10:48 UTC (permalink / raw)
To: Jacopo Mondi
Cc: linux-renesas-soc, geert+renesas, laurent.pinchart, linux-kernel
Hi Jacopo,
Thanks for your work.
On 2020-10-16 13:11:57 +0200, Jacopo Mondi wrote:
> Add compatible string definition for R-Car V3U.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> ---
>
> This and the following patch are still under discussion as the
> proper support for the V3U VIN might require the implementation
> of a different driver.
>
> I'm fine deferring it to when we'll have a more clear plan for V3U support.
I think it's best we defer it until we have a plan for how we are going
to support it on the driver side.
>
> v2:
> - Increase maxium value for the 'renesas,id' property to support
> the V3U's 31 VIN instances
>
> ---
> Documentation/devicetree/bindings/media/renesas,vin.yaml | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/media/renesas,vin.yaml b/Documentation/devicetree/bindings/media/renesas,vin.yaml
> index ad2fe660364b..f7ac1fd3df25 100644
> --- a/Documentation/devicetree/bindings/media/renesas,vin.yaml
> +++ b/Documentation/devicetree/bindings/media/renesas,vin.yaml
> @@ -51,6 +51,7 @@ properties:
> - renesas,vin-r8a77980 # R-Car V3H
> - renesas,vin-r8a77990 # R-Car E3
> - renesas,vin-r8a77995 # R-Car D3
> + - renesas,vin-r8a779a0 # R-Car V3U
>
> reg:
> maxItems: 1
> @@ -120,7 +121,7 @@ properties:
> description: VIN channel number
> $ref: /schemas/types.yaml#/definitions/uint32
> minimum: 0
> - maximum: 15
> + maximum: 31
>
> ports:
> type: object
> --
> 2.28.0
>
--
Regards,
Niklas Söderlund
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v2 0/6] r8a779a0: Add CSI and VIN
@ 2020-10-16 11:11 Jacopo Mondi
2020-10-16 11:11 ` [PATCH v2 1/6] clk: renesas: r8a779a0: Add CSI4[0-3] clocks Jacopo Mondi
` (5 more replies)
0 siblings, 6 replies; 8+ messages in thread
From: Jacopo Mondi @ 2020-10-16 11:11 UTC (permalink / raw)
To: linux-renesas-soc, geert+renesas, laurent.pinchart, niklas.soderlund
Cc: Jacopo Mondi, linux-kernel
This series adds the CPG clock definitions, device node entries, and compatible
strings for the CSI-2 receivers and VIN instances on R8A779A0 R-Car V3U SoC.
The last 2 patches are under discussion, as the right way forward to support
the V3U VIN version has not yet been clarified.
Compile tested only.
Jacopo Mondi (6):
clk: renesas: r8a779a0: Add CSI4[0-3] clocks
dt-bindings: media: renesas,csi2: Add V3U support
arm64: dts: renesas: r8a779a0: Add CSI-2 nodes
clk: renesas: r8a779a0: Add VIN clocks
dt-bindings: media: renesas,vin: Add V3U support
arm64: dts: r8a779a0: Add VIN nodes
.../bindings/media/renesas,csi2.yaml | 1 +
.../bindings/media/renesas,vin.yaml | 3 +-
arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 500 ++++++++++++++++++
drivers/clk/renesas/r8a779a0-cpg-mssr.c | 36 ++
4 files changed, 539 insertions(+), 1 deletion(-)
--
2.28.0
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v2 1/6] clk: renesas: r8a779a0: Add CSI4[0-3] clocks
2020-10-16 11:11 [PATCH v2 0/6] r8a779a0: Add CSI and VIN Jacopo Mondi
@ 2020-10-16 11:11 ` Jacopo Mondi
2020-10-16 11:11 ` [PATCH v2 2/6] dt-bindings: media: renesas,csi2: Add V3U support Jacopo Mondi
` (4 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Jacopo Mondi @ 2020-10-16 11:11 UTC (permalink / raw)
To: linux-renesas-soc, geert+renesas, laurent.pinchart, niklas.soderlund
Cc: Jacopo Mondi, linux-kernel
Add definitions of the CSI-2 receivers clocks for R-Car V3U.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
drivers/clk/renesas/r8a779a0-cpg-mssr.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
index 7e25b3b8945b..bd54a28c50ee 100644
--- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
@@ -141,6 +141,10 @@ static const struct cpg_core_clk r8a779a0_core_clks[] __initconst = {
};
static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
+ DEF_MOD("csi40", 331, R8A779A0_CLK_CSI0),
+ DEF_MOD("csi41", 400, R8A779A0_CLK_CSI0),
+ DEF_MOD("csi42", 401, R8A779A0_CLK_CSI0),
+ DEF_MOD("csi43", 402, R8A779A0_CLK_CSI0),
DEF_MOD("scif0", 702, R8A779A0_CLK_S1D8),
DEF_MOD("scif1", 703, R8A779A0_CLK_S1D8),
DEF_MOD("scif3", 704, R8A779A0_CLK_S1D8),
--
2.28.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 2/6] dt-bindings: media: renesas,csi2: Add V3U support
2020-10-16 11:11 [PATCH v2 0/6] r8a779a0: Add CSI and VIN Jacopo Mondi
2020-10-16 11:11 ` [PATCH v2 1/6] clk: renesas: r8a779a0: Add CSI4[0-3] clocks Jacopo Mondi
@ 2020-10-16 11:11 ` Jacopo Mondi
2020-10-16 11:11 ` [PATCH v2 3/6] arm64: dts: renesas: r8a779a0: Add CSI-2 nodes Jacopo Mondi
` (3 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Jacopo Mondi @ 2020-10-16 11:11 UTC (permalink / raw)
To: linux-renesas-soc, geert+renesas, laurent.pinchart, niklas.soderlund
Cc: Jacopo Mondi, linux-kernel
Add compatible string definition for R-Car V3U.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
Documentation/devicetree/bindings/media/renesas,csi2.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/media/renesas,csi2.yaml b/Documentation/devicetree/bindings/media/renesas,csi2.yaml
index 533c2f181db7..4dbcda6b1788 100644
--- a/Documentation/devicetree/bindings/media/renesas,csi2.yaml
+++ b/Documentation/devicetree/bindings/media/renesas,csi2.yaml
@@ -29,6 +29,7 @@ properties:
- renesas,r8a77970-csi2 # R-Car V3M
- renesas,r8a77980-csi2 # R-Car V3H
- renesas,r8a77990-csi2 # R-Car E3
+ - renesas,r8a779a0-csi2 # R-Car V3U
reg:
maxItems: 1
--
2.28.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 3/6] arm64: dts: renesas: r8a779a0: Add CSI-2 nodes
2020-10-16 11:11 [PATCH v2 0/6] r8a779a0: Add CSI and VIN Jacopo Mondi
2020-10-16 11:11 ` [PATCH v2 1/6] clk: renesas: r8a779a0: Add CSI4[0-3] clocks Jacopo Mondi
2020-10-16 11:11 ` [PATCH v2 2/6] dt-bindings: media: renesas,csi2: Add V3U support Jacopo Mondi
@ 2020-10-16 11:11 ` Jacopo Mondi
2020-10-16 11:11 ` [PATCH v2 4/6] clk: renesas: r8a779a0: Add VIN clocks Jacopo Mondi
` (2 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Jacopo Mondi @ 2020-10-16 11:11 UTC (permalink / raw)
To: linux-renesas-soc, geert+renesas, laurent.pinchart, niklas.soderlund
Cc: Jacopo Mondi, linux-kernel
Add CSI-2 nodes to R8A779A0 R-Car V3U SoC.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
v2:
- Add empty 'ports' node to pass dtbs validation
---
arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 52 +++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
index 6cf77ce9aa93..62ed6ce29cb0 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
@@ -117,6 +117,58 @@ gic: interrupt-controller@f1000000 {
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
};
+ csi40: csi2@feaa0000 {
+ compatible = "renesas,r8a779a0-csi2";
+ reg = <0 0xfeaa0000 0 0x10000>;
+ interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 331>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 331>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ csi41: csi2@feab0000 {
+ compatible = "renesas,r8a779a0-csi2";
+ reg = <0 0xfeab0000 0 0x10000>;
+ interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 400>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 400>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ csi42: csi2@fed60000 {
+ compatible = "renesas,r8a779a0-csi2";
+ reg = <0 0xfed60000 0 0x10000>;
+ interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 401>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 401>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ csi43: csi2@fed70000 {
+ compatible = "renesas,r8a779a0-csi2";
+ reg = <0 0xfed70000 0 0x10000>;
+ interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 402>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 402>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
prr: chipid@fff00044 {
compatible = "renesas,prr";
reg = <0 0xfff00044 0 4>;
--
2.28.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 4/6] clk: renesas: r8a779a0: Add VIN clocks
2020-10-16 11:11 [PATCH v2 0/6] r8a779a0: Add CSI and VIN Jacopo Mondi
` (2 preceding siblings ...)
2020-10-16 11:11 ` [PATCH v2 3/6] arm64: dts: renesas: r8a779a0: Add CSI-2 nodes Jacopo Mondi
@ 2020-10-16 11:11 ` Jacopo Mondi
2020-10-16 11:11 ` [PATCH v2 5/6] dt-bindings: media: renesas,vin: Add V3U support Jacopo Mondi
2020-10-16 11:11 ` [PATCH v2 6/6] arm64: dts: r8a779a0: Add VIN nodes Jacopo Mondi
5 siblings, 0 replies; 8+ messages in thread
From: Jacopo Mondi @ 2020-10-16 11:11 UTC (permalink / raw)
To: linux-renesas-soc, geert+renesas, laurent.pinchart, niklas.soderlund
Cc: Jacopo Mondi, linux-kernel
Add definitions of the VIN instances clocks for R-Car V3U.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
drivers/clk/renesas/r8a779a0-cpg-mssr.c | 32 +++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
index bd54a28c50ee..2a00eb82013f 100644
--- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
@@ -149,6 +149,38 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
DEF_MOD("scif1", 703, R8A779A0_CLK_S1D8),
DEF_MOD("scif3", 704, R8A779A0_CLK_S1D8),
DEF_MOD("scif4", 705, R8A779A0_CLK_S1D8),
+ DEF_MOD("vin00", 730, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin01", 731, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin02", 800, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin03", 801, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin04", 802, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin05", 803, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin06", 804, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin07", 805, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin10", 806, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin11", 807, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin12", 808, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin13", 809, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin14", 810, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin15", 811, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin16", 812, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin17", 813, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin20", 814, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin21", 815, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin22", 816, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin23", 817, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin24", 818, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin25", 819, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin26", 820, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin27", 821, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin30", 822, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin31", 823, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin32", 824, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin33", 825, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin34", 826, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin35", 827, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin36", 828, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin37", 829, R8A779A0_CLK_S1D1),
};
static spinlock_t cpg_lock;
--
2.28.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 5/6] dt-bindings: media: renesas,vin: Add V3U support
2020-10-16 11:11 [PATCH v2 0/6] r8a779a0: Add CSI and VIN Jacopo Mondi
` (3 preceding siblings ...)
2020-10-16 11:11 ` [PATCH v2 4/6] clk: renesas: r8a779a0: Add VIN clocks Jacopo Mondi
@ 2020-10-16 11:11 ` Jacopo Mondi
2020-10-16 10:48 ` Niklas Söderlund
2020-10-16 11:11 ` [PATCH v2 6/6] arm64: dts: r8a779a0: Add VIN nodes Jacopo Mondi
5 siblings, 1 reply; 8+ messages in thread
From: Jacopo Mondi @ 2020-10-16 11:11 UTC (permalink / raw)
To: linux-renesas-soc, geert+renesas, laurent.pinchart, niklas.soderlund
Cc: Jacopo Mondi, linux-kernel
Add compatible string definition for R-Car V3U.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
This and the following patch are still under discussion as the
proper support for the V3U VIN might require the implementation
of a different driver.
I'm fine deferring it to when we'll have a more clear plan for V3U support.
v2:
- Increase maxium value for the 'renesas,id' property to support
the V3U's 31 VIN instances
---
Documentation/devicetree/bindings/media/renesas,vin.yaml | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/media/renesas,vin.yaml b/Documentation/devicetree/bindings/media/renesas,vin.yaml
index ad2fe660364b..f7ac1fd3df25 100644
--- a/Documentation/devicetree/bindings/media/renesas,vin.yaml
+++ b/Documentation/devicetree/bindings/media/renesas,vin.yaml
@@ -51,6 +51,7 @@ properties:
- renesas,vin-r8a77980 # R-Car V3H
- renesas,vin-r8a77990 # R-Car E3
- renesas,vin-r8a77995 # R-Car D3
+ - renesas,vin-r8a779a0 # R-Car V3U
reg:
maxItems: 1
@@ -120,7 +121,7 @@ properties:
description: VIN channel number
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
- maximum: 15
+ maximum: 31
ports:
type: object
--
2.28.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 6/6] arm64: dts: r8a779a0: Add VIN nodes
2020-10-16 11:11 [PATCH v2 0/6] r8a779a0: Add CSI and VIN Jacopo Mondi
` (4 preceding siblings ...)
2020-10-16 11:11 ` [PATCH v2 5/6] dt-bindings: media: renesas,vin: Add V3U support Jacopo Mondi
@ 2020-10-16 11:11 ` Jacopo Mondi
5 siblings, 0 replies; 8+ messages in thread
From: Jacopo Mondi @ 2020-10-16 11:11 UTC (permalink / raw)
To: linux-renesas-soc, geert+renesas, laurent.pinchart, niklas.soderlund
Cc: Jacopo Mondi, linux-kernel
Add VIN nodes to R8A779A0 R-Car V3U SoC.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
v2:
- Add 'renesas,id' property and empty 'ports' node to pass dtbs validation
---
arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 448 ++++++++++++++++++++++
1 file changed, 448 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
index 62ed6ce29cb0..b275807a7a14 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
@@ -105,6 +105,454 @@ scif0: serial@e6e60000 {
status = "disabled";
};
+ vin0: video@e6ef0000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ef0000 0 0x1000>;
+ interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 730>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 730>;
+ renesas,id = <0>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin1: video@e6ef1000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ef1000 0 0x1000>;
+ interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 731>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 731>;
+ renesas,id = <1>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin2: video@e6ef2000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ef2000 0 0x1000>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 800>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 800>;
+ renesas,id = <2>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin3: video@e6ef3000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ef3000 0 0x1000>;
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 801>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 801>;
+ renesas,id = <3>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin4: video@e6ef4000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ef4000 0 0x1000>;
+ interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 802>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 802>;
+ renesas,id = <4>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin5: video@e6ef5000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ef5000 0 0x1000>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 803>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 803>;
+ renesas,id = <5>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin6: video@e6ef6000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ef6000 0 0x1000>;
+ interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 804>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 804>;
+ renesas,id = <6>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin7: video@e6ef7000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ef7000 0 0x1000>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 805>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 805>;
+ renesas,id = <7>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin8: video@e6ef8000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ef8000 0 0x1000>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 806>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 806>;
+ renesas,id = <8>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin9: video@e6ef9000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ef9000 0 0x1000>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 807>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 807>;
+ renesas,id = <9>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin10: video@e6efa000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6efa000 0 0x1000>;
+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 808>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 808>;
+ renesas,id = <10>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin11: video@e6efb000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6efb000 0 0x1000>;
+ interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 809>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 809>;
+ renesas,id = <11>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin12: video@e6efc000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6efc000 0 0x1000>;
+ interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
+ renesas,id = <12>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin13: video@e6efd000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6efd000 0 0x1000>;
+ interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
+ renesas,id = <13>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin14: video@e6efe000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6efe000 0 0x1000>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 812>;
+ renesas,id = <14>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin15: video@e6eff000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6eff000 0 0x1000>;
+ interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 813>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 813>;
+ renesas,id = <15>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin16: video@e6ed0000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ed0000 0 0x1000>;
+ interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 814>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 814>;
+ renesas,id = <16>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin17: video@e6ed1000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ed1000 0 0x1000>;
+ interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 815>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 815>;
+ renesas,id = <17>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin18: video@e6ed2000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ed2000 0 0x1000>;
+ interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 816>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 816>;
+ renesas,id = <18>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin19: video@e6ed3000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ed3000 0 0x1000>;
+ interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 817>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 817>;
+ renesas,id = <19>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin20: video@e6ed4000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ed4000 0 0x1000>;
+ interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 818>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 818>;
+ renesas,id = <20>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin21: video@e6ed5000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ed5000 0 0x1000>;
+ interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 819>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 819>;
+ renesas,id = <21>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin22: video@e6ed6000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ed6000 0 0x1000>;
+ interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 820>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 820>;
+ renesas,id = <22>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin23: video@e6ed7000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ed7000 0 0x1000>;
+ interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 821>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 821>;
+ renesas,id = <23>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin24: video@e6ed8000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ed8000 0 0x1000>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 822>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 822>;
+ renesas,id = <24>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin25: video@e6ed9000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ed9000 0 0x1000>;
+ interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 823>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 823>;
+ renesas,id = <25>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin26: video@e6eda000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6eda000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 824>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 824>;
+ renesas,id = <26>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin27: video@e6edb000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6edb000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 825>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 825>;
+ renesas,id = <27>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin28: video@e6edc000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6edc000 0 0x1000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 826>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 826>;
+ renesas,id = <28>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin29: video@e6edd000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6edd000 0 0x1000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 827>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 827>;
+ renesas,id = <29>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin30: video@e6ede000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ede000 0 0x1000>;
+ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 828>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 828>;
+ renesas,id = <30>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
+ vin31: video@e6edf000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6edf000 0 0x1000>;
+ interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 829>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 829>;
+ renesas,id = <31>;
+ status = "disabled";
+
+ ports {
+ };
+ };
+
gic: interrupt-controller@f1000000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
--
2.28.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
end of thread, other threads:[~2020-10-16 10:48 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-10-16 11:11 [PATCH v2 0/6] r8a779a0: Add CSI and VIN Jacopo Mondi
2020-10-16 11:11 ` [PATCH v2 1/6] clk: renesas: r8a779a0: Add CSI4[0-3] clocks Jacopo Mondi
2020-10-16 11:11 ` [PATCH v2 2/6] dt-bindings: media: renesas,csi2: Add V3U support Jacopo Mondi
2020-10-16 11:11 ` [PATCH v2 3/6] arm64: dts: renesas: r8a779a0: Add CSI-2 nodes Jacopo Mondi
2020-10-16 11:11 ` [PATCH v2 4/6] clk: renesas: r8a779a0: Add VIN clocks Jacopo Mondi
2020-10-16 11:11 ` [PATCH v2 5/6] dt-bindings: media: renesas,vin: Add V3U support Jacopo Mondi
2020-10-16 10:48 ` Niklas Söderlund
2020-10-16 11:11 ` [PATCH v2 6/6] arm64: dts: r8a779a0: Add VIN nodes Jacopo Mondi
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