From: Zong Li <zong.li@sifive.com>
To: paul.walmsley@sifive.com, palmer@dabbelt.com, sboyd@kernel.org,
schwab@linux-m68k.org, pragnesh.patel@openfive.com,
aou@eecs.berkeley.edu, mturquette@baylibre.com,
yash.shah@sifive.com, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org, linux-riscv@lists.infradead.org
Cc: Zong Li <zong.li@sifive.com>
Subject: [PATCH v4 0/4] clk: add driver for the SiFive FU740
Date: Wed, 11 Nov 2020 18:06:04 +0800 [thread overview]
Message-ID: <20201111100608.108842-1-zong.li@sifive.com> (raw)
Add a driver for the SiFive FU740 PRCI IP block, which handles more
clocks than FU540. These patches also refactor the original
implementation by spliting the dependent-code of fu540 and fu740
respectively. In v3 and v4 patch set, it fix the wrong clk enable bit
field which reported by Pragnesh.
Changed in v4:
- Fix the wrong enable bit field shift for FU540 and FU740.
Changed in v3:
- Fix the wrong enable bit field shift for FU740.
Changed in v2:
- Remove the macro definition for __prci_clock_array.
- Indicate the functional changes in commit message.
- Using option -M and -C to create patches.
- Rebase code to kernel v5.10-rc3.
Zong Li (4):
clk: sifive: Extract prci core to common base
clk: sifive: Use common name for prci configuration
clk: sifive: Add a driver for the SiFive FU740 PRCI IP block
clk: sifive: Fix the wrong bit field shift
arch/riscv/Kconfig.socs | 2 +-
drivers/clk/sifive/Kconfig | 8 +-
drivers/clk/sifive/Makefile | 5 +-
drivers/clk/sifive/fu540-prci.c | 586 +-----------------
drivers/clk/sifive/fu540-prci.h | 21 +
drivers/clk/sifive/fu740-prci.c | 122 ++++
drivers/clk/sifive/fu740-prci.h | 21 +
.../sifive/{fu540-prci.c => sifive-prci.c} | 499 ++++++---------
drivers/clk/sifive/sifive-prci.h | 289 +++++++++
include/dt-bindings/clock/sifive-fu740-prci.h | 23 +
10 files changed, 703 insertions(+), 873 deletions(-)
create mode 100644 drivers/clk/sifive/fu540-prci.h
create mode 100644 drivers/clk/sifive/fu740-prci.c
create mode 100644 drivers/clk/sifive/fu740-prci.h
copy drivers/clk/sifive/{fu540-prci.c => sifive-prci.c} (45%)
create mode 100644 drivers/clk/sifive/sifive-prci.h
create mode 100644 include/dt-bindings/clock/sifive-fu740-prci.h
--
2.29.2
next reply other threads:[~2020-11-11 10:06 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-11 10:06 Zong Li [this message]
2020-11-11 10:06 ` [PATCH v4 1/4] clk: sifive: Extract prci core to common base Zong Li
2020-11-21 1:29 ` Palmer Dabbelt
2020-11-24 18:42 ` kernel test robot
2020-11-26 3:04 ` Zong Li
2020-11-11 10:06 ` [PATCH v4 2/4] clk: sifive: Use common name for prci configuration Zong Li
2020-11-21 1:29 ` Palmer Dabbelt
2020-11-23 7:16 ` Zong Li
2020-11-11 10:06 ` [PATCH v4 3/4] clk: sifive: Add a driver for the SiFive FU740 PRCI IP block Zong Li
2020-11-21 1:29 ` Palmer Dabbelt
2020-11-23 7:21 ` Zong Li
2020-11-21 1:29 ` Palmer Dabbelt
2020-11-23 7:30 ` Zong Li
2020-11-11 10:06 ` [PATCH v4 4/4] clk: sifive: Fix the wrong bit field shift Zong Li
2020-11-21 1:29 ` Palmer Dabbelt
2020-11-23 7:18 ` Zong Li
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