* [PATCH v2] pinctrl: intel: Fix Jasperlake HOSTSW_OWN offset
@ 2020-11-11 23:17 Evan Green
2020-11-12 9:11 ` Mika Westerberg
0 siblings, 1 reply; 3+ messages in thread
From: Evan Green @ 2020-11-11 23:17 UTC (permalink / raw)
To: Andy Shevchenko
Cc: Evan Green, stable, Linus Walleij, Mika Westerberg, linux-gpio,
linux-kernel
GPIOs that attempt to use interrupts get thwarted with a message like:
"pin 161 cannot be used as IRQ" (for instance with SD_CD). This is because
the HOSTSW_OWN offset is incorrect, so every GPIO looks like it's
owned by ACPI.
Fixes: e278dcb7048b1 ("pinctrl: intel: Add Intel Jasper Lake pin controller support")
Cc: stable@vger.kernel.org
Signed-off-by: Evan Green <evgreen@chromium.org>
---
Changes in v2:
- Commit text rewording [Andy]
drivers/pinctrl/intel/pinctrl-jasperlake.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/intel/pinctrl-jasperlake.c b/drivers/pinctrl/intel/pinctrl-jasperlake.c
index 9bd0e8e6310c3..283698cf0dc7d 100644
--- a/drivers/pinctrl/intel/pinctrl-jasperlake.c
+++ b/drivers/pinctrl/intel/pinctrl-jasperlake.c
@@ -16,7 +16,7 @@
#define JSL_PAD_OWN 0x020
#define JSL_PADCFGLOCK 0x080
-#define JSL_HOSTSW_OWN 0x0b0
+#define JSL_HOSTSW_OWN 0x0c0
#define JSL_GPI_IS 0x100
#define JSL_GPI_IE 0x120
--
2.26.2
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH v2] pinctrl: intel: Fix Jasperlake HOSTSW_OWN offset
2020-11-11 23:17 [PATCH v2] pinctrl: intel: Fix Jasperlake HOSTSW_OWN offset Evan Green
@ 2020-11-12 9:11 ` Mika Westerberg
2020-11-12 13:57 ` Andy Shevchenko
0 siblings, 1 reply; 3+ messages in thread
From: Mika Westerberg @ 2020-11-12 9:11 UTC (permalink / raw)
To: Evan Green
Cc: Andy Shevchenko, stable, Linus Walleij, linux-gpio, linux-kernel
On Wed, Nov 11, 2020 at 03:17:28PM -0800, Evan Green wrote:
> GPIOs that attempt to use interrupts get thwarted with a message like:
> "pin 161 cannot be used as IRQ" (for instance with SD_CD). This is because
> the HOSTSW_OWN offset is incorrect, so every GPIO looks like it's
> owned by ACPI.
>
> Fixes: e278dcb7048b1 ("pinctrl: intel: Add Intel Jasper Lake pin controller support")
> Cc: stable@vger.kernel.org
> Signed-off-by: Evan Green <evgreen@chromium.org>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v2] pinctrl: intel: Fix Jasperlake HOSTSW_OWN offset
2020-11-12 9:11 ` Mika Westerberg
@ 2020-11-12 13:57 ` Andy Shevchenko
0 siblings, 0 replies; 3+ messages in thread
From: Andy Shevchenko @ 2020-11-12 13:57 UTC (permalink / raw)
To: Mika Westerberg
Cc: Evan Green, Andy Shevchenko, stable, Linus Walleij, linux-gpio,
linux-kernel
On Thu, Nov 12, 2020 at 11:11:00AM +0200, Mika Westerberg wrote:
> On Wed, Nov 11, 2020 at 03:17:28PM -0800, Evan Green wrote:
> > GPIOs that attempt to use interrupts get thwarted with a message like:
> > "pin 161 cannot be used as IRQ" (for instance with SD_CD). This is because
> > the HOSTSW_OWN offset is incorrect, so every GPIO looks like it's
> > owned by ACPI.
> >
> > Fixes: e278dcb7048b1 ("pinctrl: intel: Add Intel Jasper Lake pin controller support")
> > Cc: stable@vger.kernel.org
> > Signed-off-by: Evan Green <evgreen@chromium.org>
>
> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Pushed to my review and testing queue, thanks!
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2020-11-12 13:56 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-11-11 23:17 [PATCH v2] pinctrl: intel: Fix Jasperlake HOSTSW_OWN offset Evan Green
2020-11-12 9:11 ` Mika Westerberg
2020-11-12 13:57 ` Andy Shevchenko
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).