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From: Wei Liu <wei.liu@kernel.org>
To: Vitaly Kuznetsov <vkuznets@redhat.com>
Cc: Wei Liu <wei.liu@kernel.org>,
	Linux on Hyper-V List <linux-hyperv@vger.kernel.org>,
	virtualization@lists.linux-foundation.org,
	Linux Kernel List <linux-kernel@vger.kernel.org>,
	Michael Kelley <mikelley@microsoft.com>,
	Vineeth Pillai <viremana@linux.microsoft.com>,
	Sunil Muthuswamy <sunilmut@microsoft.com>,
	Nuno Das Neves <nunodasneves@linux.microsoft.com>,
	"K. Y. Srinivasan" <kys@microsoft.com>,
	Haiyang Zhang <haiyangz@microsoft.com>,
	Stephen Hemminger <sthemmin@microsoft.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	"maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
	<x86@kernel.org>, "H. Peter Anvin" <hpa@zytor.com>
Subject: Re: [PATCH v2 17/17] x86/hyperv: handle IO-APIC when running as root
Date: Fri, 13 Nov 2020 16:01:58 +0000	[thread overview]
Message-ID: <20201113160158.idndhuygfgenxyhm@liuwe-devbox-debian-v2> (raw)
In-Reply-To: <87v9eawm2e.fsf@vitty.brq.redhat.com>

On Thu, Nov 12, 2020 at 05:56:41PM +0100, Vitaly Kuznetsov wrote:
[...]
> > +static unsigned int hv_ioapic_startup_irq(struct irq_data *data)
> > +{
> > +	u16 status;
> > +	struct IO_APIC_route_entry ire;
> > +	u32 vector;
> > +	struct irq_cfg *cfg;
> > +	int ioapic;
> > +	u8 ioapic_pin;
> > +	int ioapic_id;
> > +	int gsi;
> > +	union entry_union eu;
> > +	struct cpumask *affinity;
> > +	int cpu, vcpu;
> > +	struct hv_interrupt_entry entry;
> > +	struct mp_chip_data *mp_data = data->chip_data;
> > +
> > +	gsi = data->irq;
> > +	cfg = irqd_cfg(data);
> > +	affinity = irq_data_get_effective_affinity_mask(data);
> > +	cpu = cpumask_first_and(affinity, cpu_online_mask);
> > +	vcpu = hv_cpu_number_to_vp_number(cpu);
> > +
> > +	vector = cfg->vector;
> > +
> > +	ioapic = mp_find_ioapic(gsi);
> > +	ioapic_pin = mp_find_ioapic_pin(ioapic, gsi);
> > +	ioapic_id = mpc_ioapic_id(ioapic);
> > +	ire = ioapic_read_entry(ioapic, ioapic_pin);
> > +
> > +	/*
> > +	 * Always try unmapping. We do not have visibility into which whether
> > +	 * an IO-APIC has been mapped or not. We can't use chip_data because it
> > +	 * already points to mp_data.
> > +	 *
> > +	 * We don't use retarget interrupt hypercalls here because Hyper-V
> > +	 * doens't allow root to change the vector or specify VPs outside of
> > +	 * the set that is initially used during mapping.
> > +	 */
> > +	status = hv_unmap_ioapic_interrupt(gsi);
> > +
> > +	if (!(status == HV_STATUS_SUCCESS || status == HV_STATUS_INVALID_PARAMETER)) {
> > +		pr_debug("%s: unexpected unmap status %d\n", __func__, status);
> > +		return -1;
> 
> Nit: the function returns 'unsigned int' but I see other 'irq_startup'
> routines return negative values too, however, they tend to returd
> '-ESOMETHING' so maybe -EFAULT here?
> 

The return type should've been int instead. That's what the function
signature in struct irq_chip looks like.

> > +	}
> > +
> > +	status = hv_map_ioapic_interrupt(ioapic_id, ire.trigger, vcpu, vector, &entry);
> > +
> > +	if (status != HV_STATUS_SUCCESS) {
> > +		pr_err("%s: map hypercall failed, status %d\n", __func__, status);
> > +		return -1;
> 
> and here.
> 

-EINVAL would be more appropriate in both cases.

Wei.

> > +	}
> > +
> > +	/* Update the entry in mp_chip_data. It is used in other places. */
> > +	mp_data->entry = *(struct IO_APIC_route_entry *)&entry.ioapic_rte;
> > +
> > +	/* Sync polarity -- Hyper-V's returned polarity is always 0... */
> > +	mp_data->entry.polarity = ire.polarity;
> > +
> > +	eu.w1 = entry.ioapic_rte.low_uint32;
> > +	eu.w2 = entry.ioapic_rte.high_uint32;
> > +	ioapic_write_entry(ioapic, ioapic_pin, eu.entry);
> > +
> > +	return 0;
> > +}
> > +
> > +static void hv_ioapic_mask_irq(struct irq_data *data)
> > +{
> > +	mask_ioapic_irq(data);
> > +}
> > +
> > +static void hv_ioapic_unmask_irq(struct irq_data *data)
> > +{
> > +	unmask_ioapic_irq(data);
> > +}
> > +
> > +static int hv_ioapic_set_affinity(struct irq_data *data,
> > +			       const struct cpumask *mask, bool force)
> > +{
> > +	/*
> > +	 * We only update the affinity mask here. Programming the hardware is
> > +	 * done in irq_startup.
> > +	 */
> > +	return ioapic_set_affinity(data, mask, force);
> > +}
> > +
> > +void hv_ioapic_ack_level(struct irq_data *irq_data)
> > +{
> > +	/*
> > +	 * Per email exchange with Hyper-V team, all is needed is write to
> > +	 * LAPIC's EOI register. They don't support directed EOI to IO-APIC.
> > +	 * Hyper-V handles it for us.
> > +	 */
> > +	apic_ack_irq(irq_data);
> > +}
> > +
> > +struct irq_chip hv_ioapic_chip __read_mostly = {
> > +	.name			= "HV-IO-APIC",
> > +	.irq_startup		= hv_ioapic_startup_irq,
> > +	.irq_mask		= hv_ioapic_mask_irq,
> > +	.irq_unmask		= hv_ioapic_unmask_irq,
> > +	.irq_ack		= irq_chip_ack_parent,
> > +	.irq_eoi		= hv_ioapic_ack_level,
> > +	.irq_set_affinity	= hv_ioapic_set_affinity,
> > +	.irq_retrigger		= irq_chip_retrigger_hierarchy,
> > +	.irq_get_irqchip_state	= ioapic_irq_get_chip_state,
> > +	.flags			= IRQCHIP_SKIP_SET_WAKE,
> > +};
> > +
> > +
> > +int (*native_acpi_register_gsi)(struct device *dev, u32 gsi, int trigger, int polarity);
> > +void (*native_acpi_unregister_gsi)(u32 gsi);
> > +
> > +int hv_acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity)
> > +{
> > +	int irq = gsi;
> > +
> > +#ifdef CONFIG_X86_IO_APIC
> > +	irq = native_acpi_register_gsi(dev, gsi, trigger, polarity);
> > +	if (irq < 0) {
> > +		pr_err("native_acpi_register_gsi failed %d\n", irq);
> > +		return irq;
> > +	}
> > +
> > +	if (trigger) {
> > +		irq_set_status_flags(irq, IRQ_LEVEL);
> > +		irq_set_chip_and_handler_name(irq, &hv_ioapic_chip,
> > +			handle_fasteoi_irq, "ioapic-fasteoi");
> > +	} else {
> > +		irq_clear_status_flags(irq, IRQ_LEVEL);
> > +		irq_set_chip_and_handler_name(irq, &hv_ioapic_chip,
> > +			handle_edge_irq, "ioapic-edge");
> > +	}
> > +#endif
> > +	return irq;
> > +}
> > +
> > +void hv_acpi_unregister_gsi(u32 gsi)
> > +{
> > +#ifdef CONFIG_X86_IO_APIC
> > +	(void)hv_unmap_ioapic_interrupt(gsi);
> > +	native_acpi_unregister_gsi(gsi);
> > +#endif
> > +}
> 
> -- 
> Vitaly
> 

  reply	other threads:[~2020-11-13 16:02 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-05 16:57 [PATCH v2 00/17] Introducing Linux root partition support for Microsoft Hypervisor Wei Liu
2020-11-05 16:57 ` [PATCH v2 01/17] asm-generic/hyperv: change HV_CPU_POWER_MANAGEMENT to HV_CPU_MANAGEMENT Wei Liu
2020-11-12 15:14   ` Vitaly Kuznetsov
2020-11-05 16:57 ` [PATCH v2 02/17] x86/hyperv: detect if Linux is the root partition Wei Liu
2020-11-05 19:16   ` kernel test robot
2020-11-12 11:42     ` Wei Liu
2020-11-12 11:46       ` Wei Liu
2020-11-12 12:22         ` Wei Liu
2020-11-05 20:23   ` kernel test robot
2020-11-12 15:16   ` Vitaly Kuznetsov
2020-11-12 15:51     ` Wei Liu
2020-11-05 16:58 ` [PATCH v2 03/17] Drivers: hv: vmbus: skip VMBus initialization if Linux is root Wei Liu
2020-11-12 15:24   ` Vitaly Kuznetsov
2020-11-13 14:51     ` Wei Liu
2020-11-05 16:58 ` [PATCH v2 04/17] iommu/hyperv: don't setup IRQ remapping when running as root Wei Liu
2020-11-12 15:27   ` Vitaly Kuznetsov
2020-11-13 14:53     ` Wei Liu
2020-11-05 16:58 ` [PATCH v2 05/17] clocksource/hyperv: use MSR-based access if " Wei Liu
2020-11-12  9:56   ` Daniel Lezcano
2020-11-12 11:24     ` Wei Liu
2020-11-12 11:40       ` Daniel Lezcano
2020-11-12 11:42         ` Wei Liu
2020-11-12 15:30   ` Vitaly Kuznetsov
2020-11-12 15:52     ` Wei Liu
2020-11-05 16:58 ` [PATCH v2 06/17] x86/hyperv: allocate output arg pages if required Wei Liu
2020-11-12 15:35   ` Vitaly Kuznetsov
2020-11-13 15:05     ` Wei Liu
2020-11-05 16:58 ` [PATCH v2 07/17] x86/hyperv: extract partition ID from Microsoft Hypervisor if necessary Wei Liu
2020-11-05 20:07   ` kernel test robot
2020-11-12 11:54     ` Wei Liu
2020-11-05 20:20   ` kernel test robot
2020-11-12 15:44   ` Vitaly Kuznetsov
2020-11-13 15:21     ` Wei Liu
2020-11-05 16:58 ` [PATCH v2 08/17] x86/hyperv: handling hypercall page setup for root Wei Liu
2020-11-12 15:51   ` Vitaly Kuznetsov
2020-11-13 15:33     ` Wei Liu
2020-11-13 16:09       ` Wei Liu
2020-11-13 16:16         ` Vitaly Kuznetsov
2020-11-05 16:58 ` [PATCH v2 09/17] x86/hyperv: provide a bunch of helper functions Wei Liu
2020-11-12 15:57   ` Vitaly Kuznetsov
2020-11-13 15:51     ` Wei Liu
2020-11-13 16:13       ` Vitaly Kuznetsov
2020-11-16 11:41         ` Wei Liu
2020-11-05 16:58 ` [PATCH v2 10/17] x86/hyperv: implement and use hv_smp_prepare_cpus Wei Liu
2020-11-12 16:44   ` Vitaly Kuznetsov
2020-11-13 15:56     ` Wei Liu
2020-11-05 16:58 ` [PATCH v2 11/17] asm-generic/hyperv: update hv_msi_entry Wei Liu
2020-11-05 16:58 ` [PATCH v2 12/17] asm-generic/hyperv: update hv_interrupt_entry Wei Liu
2020-11-05 16:58 ` [PATCH v2 13/17] asm-generic/hyperv: introduce hv_device_id and auxiliary structures Wei Liu
2020-11-05 16:58 ` [PATCH v2 14/17] asm-generic/hyperv: import data structures for mapping device interrupts Wei Liu
2020-11-05 16:58 ` [PATCH v2 15/17] x86/hyperv: implement an MSI domain for root partition Wei Liu
2020-11-12 13:50   ` Wei Liu
2020-11-05 16:58 ` [PATCH v2 16/17] x86/ioapic: export a few functions and data structures via io_apic.h Wei Liu
2020-11-12 11:39   ` Wei Liu
2020-11-05 16:58 ` [PATCH v2 17/17] x86/hyperv: handle IO-APIC when running as root Wei Liu
2020-11-12 16:56   ` Vitaly Kuznetsov
2020-11-13 16:01     ` Wei Liu [this message]
2020-11-13 16:04       ` Wei Liu

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