* [PATCH v2 0/3] Add reset support in ocelot driver for new platforms
@ 2020-11-25 7:19 Gregory CLEMENT
2020-11-25 7:19 ` [PATCH v2 1/3] dt-bindings: reset: ocelot: Add Luton and Jaguar2 support Gregory CLEMENT
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Gregory CLEMENT @ 2020-11-25 7:19 UTC (permalink / raw)
To: Sebastian Reichel, linux-pm, linux-kernel, Rob Herring, devicetree
Cc: Thomas Petazzoni, Alexandre Belloni, Lars Povlsen,
Steen.Hegelund, Gregory CLEMENT
Hello,
This series extends reset support for 2 other MIPS based SoCs: Luton
and Jaguar 2.
Patches 1 and 2 should be merged through the reset subsystem, while
the device tree changes in patches 3 should go through the mips
subsystem.
In this second series I removed the microchip,reset-switch-core
property support waiting for finding a butter solution for it.
Changelog:
v1 -> v2:
- Add binding documentation for the 2 new SoC
- Fix compatible string in name device tree node
- Add Acked-by from Alexande
Gregory
Gregory CLEMENT (3):
dt-bindings: reset: ocelot: Add Luton and Jaguar2 support
power: reset: ocelot: Add support 2 other MIPS based SoCs
MIPS: dts: mscc: add reset support for Luton and Jaguar2
.../bindings/power/reset/ocelot-reset.txt | 4 ++-
arch/mips/boot/dts/mscc/jaguar2.dtsi | 5 ++++
arch/mips/boot/dts/mscc/luton.dtsi | 5 ++++
drivers/power/reset/ocelot-reset.c | 30 +++++++++++++++++--
4 files changed, 40 insertions(+), 4 deletions(-)
--
2.29.2
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH v2 1/3] dt-bindings: reset: ocelot: Add Luton and Jaguar2 support
2020-11-25 7:19 [PATCH v2 0/3] Add reset support in ocelot driver for new platforms Gregory CLEMENT
@ 2020-11-25 7:19 ` Gregory CLEMENT
2020-11-25 7:19 ` [PATCH v2 2/3] power: reset: ocelot: Add support 2 other MIPS based SoCs Gregory CLEMENT
2020-11-25 7:19 ` [PATCH v2 3/3] MIPS: dts: mscc: add reset support for Luton and Jaguar2 Gregory CLEMENT
2 siblings, 0 replies; 4+ messages in thread
From: Gregory CLEMENT @ 2020-11-25 7:19 UTC (permalink / raw)
To: Sebastian Reichel, linux-pm, linux-kernel, Rob Herring, devicetree
Cc: Thomas Petazzoni, Alexandre Belloni, Lars Povlsen,
Steen.Hegelund, Gregory CLEMENT
This adds the support for 2 others MIPS based VCore III SoCs: Luton
and Jaguar2.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
.../devicetree/bindings/power/reset/ocelot-reset.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt
index 4d530d815484..c5de7b555feb 100644
--- a/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt
+++ b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt
@@ -7,7 +7,9 @@ The reset registers are both present in the MSCC vcoreiii MIPS and
microchip Sparx5 armv8 SoC's.
Required Properties:
- - compatible: "mscc,ocelot-chip-reset" or "microchip,sparx5-chip-reset"
+
+ - compatible: "mscc,ocelot-chip-reset", "mscc,luton-chip-reset",
+ "mscc,jaguar2-chip-reset" or "microchip,sparx5-chip-reset"
Example:
reset@1070008 {
--
2.29.2
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v2 2/3] power: reset: ocelot: Add support 2 other MIPS based SoCs
2020-11-25 7:19 [PATCH v2 0/3] Add reset support in ocelot driver for new platforms Gregory CLEMENT
2020-11-25 7:19 ` [PATCH v2 1/3] dt-bindings: reset: ocelot: Add Luton and Jaguar2 support Gregory CLEMENT
@ 2020-11-25 7:19 ` Gregory CLEMENT
2020-11-25 7:19 ` [PATCH v2 3/3] MIPS: dts: mscc: add reset support for Luton and Jaguar2 Gregory CLEMENT
2 siblings, 0 replies; 4+ messages in thread
From: Gregory CLEMENT @ 2020-11-25 7:19 UTC (permalink / raw)
To: Sebastian Reichel, linux-pm, linux-kernel, Rob Herring, devicetree
Cc: Thomas Petazzoni, Alexandre Belloni, Lars Povlsen,
Steen.Hegelund, Gregory CLEMENT
This adds reset support for Luton and Jaguar2 in the ocelot-reset
driver. They are both MIPS based belonging to the Vcore III family.
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
drivers/power/reset/ocelot-reset.c | 30 +++++++++++++++++++++++++++---
1 file changed, 27 insertions(+), 3 deletions(-)
diff --git a/drivers/power/reset/ocelot-reset.c b/drivers/power/reset/ocelot-reset.c
index f74e1dbb4ba3..8caa90cb58fc 100644
--- a/drivers/power/reset/ocelot-reset.c
+++ b/drivers/power/reset/ocelot-reset.c
@@ -29,6 +29,8 @@ struct ocelot_reset_context {
struct notifier_block restart_handler;
};
+#define BIT_OFF_INVALID 32
+
#define SOFT_CHIP_RST BIT(0)
#define ICPU_CFG_CPU_SYSTEM_CTRL_GENERAL_CTRL 0x24
@@ -50,9 +52,11 @@ static int ocelot_restart_handle(struct notifier_block *this,
ctx->props->vcore_protect, 0);
/* Make the SI back to boot mode */
- regmap_update_bits(ctx->cpu_ctrl, ICPU_CFG_CPU_SYSTEM_CTRL_GENERAL_CTRL,
- IF_SI_OWNER_MASK << if_si_owner_bit,
- IF_SI_OWNER_SIBM << if_si_owner_bit);
+ if (if_si_owner_bit != BIT_OFF_INVALID)
+ regmap_update_bits(ctx->cpu_ctrl,
+ ICPU_CFG_CPU_SYSTEM_CTRL_GENERAL_CTRL,
+ IF_SI_OWNER_MASK << if_si_owner_bit,
+ IF_SI_OWNER_SIBM << if_si_owner_bit);
pr_emerg("Resetting SoC\n");
@@ -96,6 +100,20 @@ static int ocelot_reset_probe(struct platform_device *pdev)
return err;
}
+static const struct reset_props reset_props_jaguar2 = {
+ .syscon = "mscc,ocelot-cpu-syscon",
+ .protect_reg = 0x20,
+ .vcore_protect = BIT(2),
+ .if_si_owner_bit = 6,
+};
+
+static const struct reset_props reset_props_luton = {
+ .syscon = "mscc,ocelot-cpu-syscon",
+ .protect_reg = 0x20,
+ .vcore_protect = BIT(2),
+ .if_si_owner_bit = BIT_OFF_INVALID, /* n/a */
+};
+
static const struct reset_props reset_props_ocelot = {
.syscon = "mscc,ocelot-cpu-syscon",
.protect_reg = 0x20,
@@ -112,6 +130,12 @@ static const struct reset_props reset_props_sparx5 = {
static const struct of_device_id ocelot_reset_of_match[] = {
{
+ .compatible = "mscc,jaguar2-chip-reset",
+ .data = &reset_props_jaguar2
+ }, {
+ .compatible = "mscc,luton-chip-reset",
+ .data = &reset_props_luton
+ }, {
.compatible = "mscc,ocelot-chip-reset",
.data = &reset_props_ocelot
}, {
--
2.29.2
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v2 3/3] MIPS: dts: mscc: add reset support for Luton and Jaguar2
2020-11-25 7:19 [PATCH v2 0/3] Add reset support in ocelot driver for new platforms Gregory CLEMENT
2020-11-25 7:19 ` [PATCH v2 1/3] dt-bindings: reset: ocelot: Add Luton and Jaguar2 support Gregory CLEMENT
2020-11-25 7:19 ` [PATCH v2 2/3] power: reset: ocelot: Add support 2 other MIPS based SoCs Gregory CLEMENT
@ 2020-11-25 7:19 ` Gregory CLEMENT
2 siblings, 0 replies; 4+ messages in thread
From: Gregory CLEMENT @ 2020-11-25 7:19 UTC (permalink / raw)
To: Sebastian Reichel, linux-pm, linux-kernel, Rob Herring, devicetree
Cc: Thomas Petazzoni, Alexandre Belloni, Lars Povlsen,
Steen.Hegelund, Gregory CLEMENT
Allow Luton and Jaguar2 SoCs to use reset feature by adding the reset
node.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
arch/mips/boot/dts/mscc/jaguar2.dtsi | 5 +++++
arch/mips/boot/dts/mscc/luton.dtsi | 5 +++++
2 files changed, 10 insertions(+)
diff --git a/arch/mips/boot/dts/mscc/jaguar2.dtsi b/arch/mips/boot/dts/mscc/jaguar2.dtsi
index 42b2b0a51ddc..7032fe550277 100644
--- a/arch/mips/boot/dts/mscc/jaguar2.dtsi
+++ b/arch/mips/boot/dts/mscc/jaguar2.dtsi
@@ -60,6 +60,11 @@ cpu_ctrl: syscon@70000000 {
reg = <0x70000000 0x2c>;
};
+ reset@71010008 {
+ compatible = "mscc,jaguar2-chip-reset";
+ reg = <0x71010008 0x4>;
+ };
+
intc: interrupt-controller@70000070 {
compatible = "mscc,jaguar2-icpu-intr";
reg = <0x70000070 0x94>;
diff --git a/arch/mips/boot/dts/mscc/luton.dtsi b/arch/mips/boot/dts/mscc/luton.dtsi
index 2a170b84c5a9..4a26c2874386 100644
--- a/arch/mips/boot/dts/mscc/luton.dtsi
+++ b/arch/mips/boot/dts/mscc/luton.dtsi
@@ -56,6 +56,11 @@ cpu_ctrl: syscon@10000000 {
reg = <0x10000000 0x2c>;
};
+ reset@00070090 {
+ compatible = "mscc,luton-chip-reset";
+ reg = <0x70090 0x4>;
+ };
+
intc: interrupt-controller@10000084 {
compatible = "mscc,luton-icpu-intr";
reg = <0x10000084 0x70>;
--
2.29.2
^ permalink raw reply related [flat|nested] 4+ messages in thread
end of thread, other threads:[~2020-11-25 7:19 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2020-11-25 7:19 [PATCH v2 0/3] Add reset support in ocelot driver for new platforms Gregory CLEMENT
2020-11-25 7:19 ` [PATCH v2 1/3] dt-bindings: reset: ocelot: Add Luton and Jaguar2 support Gregory CLEMENT
2020-11-25 7:19 ` [PATCH v2 2/3] power: reset: ocelot: Add support 2 other MIPS based SoCs Gregory CLEMENT
2020-11-25 7:19 ` [PATCH v2 3/3] MIPS: dts: mscc: add reset support for Luton and Jaguar2 Gregory CLEMENT
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