* [PATCH v2 01/13] ARM: tegra: ventana: Support CPU and Core voltage scaling
2021-01-22 20:24 [PATCH v2 00/13] NVIDIA Tegra ARM32 device-tree improvements Dmitry Osipenko
@ 2021-01-22 20:24 ` Dmitry Osipenko
2021-01-22 20:24 ` [PATCH v2 02/13] ARM: tegra: ventana: Support CPU thermal throttling Dmitry Osipenko
` (11 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Dmitry Osipenko @ 2021-01-22 20:24 UTC (permalink / raw)
To: Thierry Reding, Jonathan Hunter, Daniel Lezcano, Nicolas Chauvet,
Matt Merhar, Peter Geis
Cc: linux-tegra, linux-kernel
Support CPU and Core voltage scaling on Tegra20 Ventana board.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
arch/arm/boot/dts/tegra20-ventana.dts | 37 ++++++++++++++++++++-------
1 file changed, 28 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
index 055334ae3d28..02b94ed722d0 100644
--- a/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -4,6 +4,7 @@
#include <dt-bindings/input/input.h>
#include "tegra20.dtsi"
#include "tegra20-cpu-opp.dtsi"
+#include "tegra20-cpu-opp-microvolt.dtsi"
/ {
model = "NVIDIA Tegra20 Ventana evaluation board";
@@ -420,18 +421,28 @@ sys_reg: sys {
regulator-always-on;
};
- sm0 {
+ vdd_core: sm0 {
regulator-name = "vdd_sm0,vdd_core";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-coupled-with = <&rtc_vdd &vdd_cpu>;
+ regulator-coupled-max-spread = <170000 550000>;
regulator-always-on;
+ regulator-boot-on;
+
+ nvidia,tegra-core-regulator;
};
- sm1 {
+ vdd_cpu: sm1 {
regulator-name = "vdd_sm1,vdd_cpu";
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1125000>;
+ regulator-coupled-with = <&vdd_core &rtc_vdd>;
+ regulator-coupled-max-spread = <550000 550000>;
regulator-always-on;
+ regulator-boot-on;
+
+ nvidia,tegra-cpu-regulator;
};
sm2_reg: sm2 {
@@ -450,10 +461,16 @@ ldo1 {
regulator-always-on;
};
- ldo2 {
+ rtc_vdd: ldo2 {
regulator-name = "vdd_ldo2,vdd_rtc";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-coupled-with = <&vdd_core &vdd_cpu>;
+ regulator-coupled-max-spread = <170000 550000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ nvidia,tegra-rtc-regulator;
};
ldo3 {
@@ -595,10 +612,12 @@ clk32k_in: clock@0 {
cpus {
cpu0: cpu@0 {
+ cpu-supply = <&vdd_cpu>;
operating-points-v2 = <&cpu0_opp_table>;
};
cpu@1 {
+ cpu-supply = <&vdd_cpu>;
operating-points-v2 = <&cpu0_opp_table>;
};
};
--
2.29.2
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 02/13] ARM: tegra: ventana: Support CPU thermal throttling
2021-01-22 20:24 [PATCH v2 00/13] NVIDIA Tegra ARM32 device-tree improvements Dmitry Osipenko
2021-01-22 20:24 ` [PATCH v2 01/13] ARM: tegra: ventana: Support CPU and Core voltage scaling Dmitry Osipenko
@ 2021-01-22 20:24 ` Dmitry Osipenko
2021-01-22 20:24 ` [PATCH v2 03/13] ARM: tegra: cardhu: Support CPU frequency and voltage scaling on all board variants Dmitry Osipenko
` (10 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Dmitry Osipenko @ 2021-01-22 20:24 UTC (permalink / raw)
To: Thierry Reding, Jonathan Hunter, Daniel Lezcano, Nicolas Chauvet,
Matt Merhar, Peter Geis
Cc: linux-tegra, linux-kernel
Enable CPU thermal throttling on Tegra20 Ventana board.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
arch/arm/boot/dts/tegra20-ventana.dts | 41 +++++++++++++++++++++++++--
1 file changed, 39 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
index 02b94ed722d0..99a356c1ccec 100644
--- a/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -2,6 +2,7 @@
/dts-v1/;
#include <dt-bindings/input/input.h>
+#include <dt-bindings/thermal/thermal.h>
#include "tegra20.dtsi"
#include "tegra20-cpu-opp.dtsi"
#include "tegra20-cpu-opp-microvolt.dtsi"
@@ -528,9 +529,10 @@ ldo_rtc {
};
};
- temperature-sensor@4c {
+ nct1008: temperature-sensor@4c {
compatible = "onnn,nct1008";
reg = <0x4c>;
+ #thermal-sensor-cells = <1>;
};
};
@@ -614,11 +616,13 @@ cpus {
cpu0: cpu@0 {
cpu-supply = <&vdd_cpu>;
operating-points-v2 = <&cpu0_opp_table>;
+ #cooling-cells = <2>;
};
- cpu@1 {
+ cpu1: cpu@1 {
cpu-supply = <&vdd_cpu>;
operating-points-v2 = <&cpu0_opp_table>;
+ #cooling-cells = <2>;
};
};
@@ -716,4 +720,37 @@ sound {
<&tegra_car TEGRA20_CLK_CDEV1>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};
+
+ thermal-zones {
+ cpu-thermal {
+ polling-delay-passive = <1000>; /* milliseconds */
+ polling-delay = <5000>; /* milliseconds */
+
+ thermal-sensors = <&nct1008 1>;
+
+ trips {
+ trip0: cpu-alert0 {
+ /* start throttling at 50C */
+ temperature = <50000>;
+ hysteresis = <200>;
+ type = "passive";
+ };
+
+ trip1: cpu-crit {
+ /* shut down at 60C */
+ temperature = <60000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&trip0>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
};
--
2.29.2
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 03/13] ARM: tegra: cardhu: Support CPU frequency and voltage scaling on all board variants
2021-01-22 20:24 [PATCH v2 00/13] NVIDIA Tegra ARM32 device-tree improvements Dmitry Osipenko
2021-01-22 20:24 ` [PATCH v2 01/13] ARM: tegra: ventana: Support CPU and Core voltage scaling Dmitry Osipenko
2021-01-22 20:24 ` [PATCH v2 02/13] ARM: tegra: ventana: Support CPU thermal throttling Dmitry Osipenko
@ 2021-01-22 20:24 ` Dmitry Osipenko
2021-01-22 20:24 ` [PATCH v2 04/13] ARM: tegra: cardhu: Support CPU thermal throttling Dmitry Osipenko
` (9 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Dmitry Osipenko @ 2021-01-22 20:24 UTC (permalink / raw)
To: Thierry Reding, Jonathan Hunter, Daniel Lezcano, Nicolas Chauvet,
Matt Merhar, Peter Geis
Cc: linux-tegra, linux-kernel
Enable CPU frequency and voltage scaling on all Tegra30 Cardhu board
variants.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
arch/arm/boot/dts/tegra30-cardhu-a04.dts | 48 ------------------------
arch/arm/boot/dts/tegra30-cardhu.dtsi | 40 ++++++++++++++++++--
2 files changed, 37 insertions(+), 51 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30-cardhu-a04.dts b/arch/arm/boot/dts/tegra30-cardhu-a04.dts
index c1c0ca628af1..a11028b8b67b 100644
--- a/arch/arm/boot/dts/tegra30-cardhu-a04.dts
+++ b/arch/arm/boot/dts/tegra30-cardhu-a04.dts
@@ -2,8 +2,6 @@
/dts-v1/;
#include "tegra30-cardhu.dtsi"
-#include "tegra30-cpu-opp.dtsi"
-#include "tegra30-cpu-opp-microvolt.dtsi"
/* This dts file support the cardhu A04 and later versions of board */
@@ -92,50 +90,4 @@ vdd_bl2_reg: regulator@106 {
enable-active-high;
gpio = <&gpio TEGRA_GPIO(DD, 0) GPIO_ACTIVE_HIGH>;
};
-
- i2c@7000d000 {
- pmic: tps65911@2d {
- regulators {
- vddctrl_reg: vddctrl {
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1125000>;
- regulator-coupled-with = <&vddcore_reg>;
- regulator-coupled-max-spread = <300000>;
- regulator-max-step-microvolt = <100000>;
-
- nvidia,tegra-cpu-regulator;
- };
- };
- };
-
- vddcore_reg: tps62361@60 {
- regulator-coupled-with = <&vddctrl_reg>;
- regulator-coupled-max-spread = <300000>;
- regulator-max-step-microvolt = <100000>;
-
- nvidia,tegra-core-regulator;
- };
- };
-
- cpus {
- cpu0: cpu@0 {
- cpu-supply = <&vddctrl_reg>;
- operating-points-v2 = <&cpu0_opp_table>;
- };
-
- cpu@1 {
- cpu-supply = <&vddctrl_reg>;
- operating-points-v2 = <&cpu0_opp_table>;
- };
-
- cpu@2 {
- cpu-supply = <&vddctrl_reg>;
- operating-points-v2 = <&cpu0_opp_table>;
- };
-
- cpu@3 {
- cpu-supply = <&vddctrl_reg>;
- operating-points-v2 = <&cpu0_opp_table>;
- };
- };
};
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index dab9989fa760..42ea949953c7 100644
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -1,6 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/input/input.h>
#include "tegra30.dtsi"
+#include "tegra30-cpu-opp.dtsi"
+#include "tegra30-cpu-opp-microvolt.dtsi"
/**
* This file contains common DT entry for all fab version of Cardhu.
@@ -272,9 +274,14 @@ vdd2_reg: vdd2 {
vddctrl_reg: vddctrl {
regulator-name = "vdd_cpu,vdd_sys";
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1250000>;
+ regulator-coupled-with = <&vdd_core>;
+ regulator-coupled-max-spread = <300000>;
+ regulator-max-step-microvolt = <100000>;
regulator-always-on;
+
+ nvidia,tegra-cpu-regulator;
};
vio_reg: vio {
@@ -342,17 +349,22 @@ temperature-sensor@4c {
interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_LEVEL_LOW>;
};
- tps62361@60 {
+ vdd_core: tps62361@60 {
compatible = "ti,tps62361";
reg = <0x60>;
regulator-name = "tps62361-vout";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1500000>;
+ regulator-coupled-with = <&vddctrl_reg>;
+ regulator-coupled-max-spread = <300000>;
+ regulator-max-step-microvolt = <100000>;
regulator-boot-on;
regulator-always-on;
ti,vsel0-state-high;
ti,vsel1-state-high;
+
+ nvidia,tegra-core-regulator;
};
};
@@ -424,6 +436,28 @@ clk32k_in: clock@0 {
#clock-cells = <0>;
};
+ cpus {
+ cpu0: cpu@0 {
+ cpu-supply = <&vddctrl_reg>;
+ operating-points-v2 = <&cpu0_opp_table>;
+ };
+
+ cpu1: cpu@1 {
+ cpu-supply = <&vddctrl_reg>;
+ operating-points-v2 = <&cpu0_opp_table>;
+ };
+
+ cpu2: cpu@2 {
+ cpu-supply = <&vddctrl_reg>;
+ operating-points-v2 = <&cpu0_opp_table>;
+ };
+
+ cpu3: cpu@3 {
+ cpu-supply = <&vddctrl_reg>;
+ operating-points-v2 = <&cpu0_opp_table>;
+ };
+ };
+
panel: panel {
compatible = "chunghwa,claa101wb01";
ddc-i2c-bus = <&panelddc>;
--
2.29.2
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 04/13] ARM: tegra: cardhu: Support CPU thermal throttling
2021-01-22 20:24 [PATCH v2 00/13] NVIDIA Tegra ARM32 device-tree improvements Dmitry Osipenko
` (2 preceding siblings ...)
2021-01-22 20:24 ` [PATCH v2 03/13] ARM: tegra: cardhu: Support CPU frequency and voltage scaling on all board variants Dmitry Osipenko
@ 2021-01-22 20:24 ` Dmitry Osipenko
2021-01-22 20:24 ` [PATCH v2 05/13] ARM: tegra: paz00: Enable full voltage scaling ranges for CPU and Core domains Dmitry Osipenko
` (8 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Dmitry Osipenko @ 2021-01-22 20:24 UTC (permalink / raw)
To: Thierry Reding, Jonathan Hunter, Daniel Lezcano, Nicolas Chauvet,
Matt Merhar, Peter Geis
Cc: linux-tegra, linux-kernel
Enable CPU thermal throttling on Tegra30 Cardhu board.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
arch/arm/boot/dts/tegra30-cardhu.dtsi | 43 ++++++++++++++++++++++++++-
1 file changed, 42 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index 42ea949953c7..844ed700c0e6 100644
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/input/input.h>
+#include <dt-bindings/thermal/thermal.h>
#include "tegra30.dtsi"
#include "tegra30-cpu-opp.dtsi"
#include "tegra30-cpu-opp-microvolt.dtsi"
@@ -341,12 +342,13 @@ ldo8_reg: ldo8 {
};
};
- temperature-sensor@4c {
+ nct1008: temperature-sensor@4c {
compatible = "onnn,nct1008";
reg = <0x4c>;
vcc-supply = <&sys_3v3_reg>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_LEVEL_LOW>;
+ #thermal-sensor-cells = <1>;
};
vdd_core: tps62361@60 {
@@ -440,21 +442,25 @@ cpus {
cpu0: cpu@0 {
cpu-supply = <&vddctrl_reg>;
operating-points-v2 = <&cpu0_opp_table>;
+ #cooling-cells = <2>;
};
cpu1: cpu@1 {
cpu-supply = <&vddctrl_reg>;
operating-points-v2 = <&cpu0_opp_table>;
+ #cooling-cells = <2>;
};
cpu2: cpu@2 {
cpu-supply = <&vddctrl_reg>;
operating-points-v2 = <&cpu0_opp_table>;
+ #cooling-cells = <2>;
};
cpu3: cpu@3 {
cpu-supply = <&vddctrl_reg>;
operating-points-v2 = <&cpu0_opp_table>;
+ #cooling-cells = <2>;
};
};
@@ -637,6 +643,41 @@ sound {
<&tegra_car TEGRA30_CLK_EXTERN1>;
};
+ thermal-zones {
+ cpu-thermal {
+ polling-delay-passive = <1000>; /* milliseconds */
+ polling-delay = <5000>; /* milliseconds */
+
+ thermal-sensors = <&nct1008 1>;
+
+ trips {
+ trip0: cpu-alert0 {
+ /* throttle at 57C until temperature drops to 56.8C */
+ temperature = <57000>;
+ hysteresis = <200>;
+ type = "passive";
+ };
+
+ trip1: cpu-crit {
+ /* shut down at 60C */
+ temperature = <60000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&trip0>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
+
gpio-keys {
compatible = "gpio-keys";
--
2.29.2
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 05/13] ARM: tegra: paz00: Enable full voltage scaling ranges for CPU and Core domains
2021-01-22 20:24 [PATCH v2 00/13] NVIDIA Tegra ARM32 device-tree improvements Dmitry Osipenko
` (3 preceding siblings ...)
2021-01-22 20:24 ` [PATCH v2 04/13] ARM: tegra: cardhu: Support CPU thermal throttling Dmitry Osipenko
@ 2021-01-22 20:24 ` Dmitry Osipenko
2021-01-22 20:24 ` [PATCH v2 06/13] ARM: tegra: acer-a500: Enable core voltage scaling Dmitry Osipenko
` (7 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Dmitry Osipenko @ 2021-01-22 20:24 UTC (permalink / raw)
To: Thierry Reding, Jonathan Hunter, Daniel Lezcano, Nicolas Chauvet,
Matt Merhar, Peter Geis
Cc: linux-tegra, linux-kernel
Enable full voltage scaling ranges for CPU and Core power domains.
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
arch/arm/boot/dts/tegra20-paz00.dts | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
index 7e49112cd9a1..940a9f31cd86 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -387,10 +387,10 @@ sys_reg: sys {
core_vdd_reg: sm0 {
regulator-name = "+1.2vs_sm0,vdd_core";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1225000>;
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <1300000>;
regulator-coupled-with = <&rtc_vdd_reg &cpu_vdd_reg>;
- regulator-coupled-max-spread = <170000 450000>;
+ regulator-coupled-max-spread = <170000 550000>;
regulator-always-on;
nvidia,tegra-core-regulator;
@@ -401,7 +401,7 @@ cpu_vdd_reg: sm1 {
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1100000>;
regulator-coupled-with = <&core_vdd_reg &rtc_vdd_reg>;
- regulator-coupled-max-spread = <450000 450000>;
+ regulator-coupled-max-spread = <550000 550000>;
regulator-always-on;
nvidia,tegra-cpu-regulator;
@@ -425,10 +425,10 @@ ldo1 {
rtc_vdd_reg: ldo2 {
regulator-name = "+1.2vs_ldo2,vdd_rtc";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1225000>;
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <1300000>;
regulator-coupled-with = <&core_vdd_reg &cpu_vdd_reg>;
- regulator-coupled-max-spread = <170000 450000>;
+ regulator-coupled-max-spread = <170000 550000>;
regulator-always-on;
nvidia,tegra-rtc-regulator;
--
2.29.2
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 06/13] ARM: tegra: acer-a500: Enable core voltage scaling
2021-01-22 20:24 [PATCH v2 00/13] NVIDIA Tegra ARM32 device-tree improvements Dmitry Osipenko
` (4 preceding siblings ...)
2021-01-22 20:24 ` [PATCH v2 05/13] ARM: tegra: paz00: Enable full voltage scaling ranges for CPU and Core domains Dmitry Osipenko
@ 2021-01-22 20:24 ` Dmitry Osipenko
2021-01-22 20:24 ` [PATCH v2 07/13] ARM: tegra: acer-a500: Reduce thermal throttling hysteresis to 0.2C Dmitry Osipenko
` (6 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Dmitry Osipenko @ 2021-01-22 20:24 UTC (permalink / raw)
To: Thierry Reding, Jonathan Hunter, Daniel Lezcano, Nicolas Chauvet,
Matt Merhar, Peter Geis
Cc: linux-tegra, linux-kernel
Allow lower core voltages on Acer A500.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
index d3b99535d755..719da992fdaf 100644
--- a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
+++ b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
@@ -575,7 +575,7 @@ sys_reg: sys {
vdd_core: sm0 {
regulator-name = "vdd_sm0,vdd_core";
- regulator-min-microvolt = <1200000>;
+ regulator-min-microvolt = <950000>;
regulator-max-microvolt = <1300000>;
regulator-coupled-with = <&rtc_vdd &vdd_cpu>;
regulator-coupled-max-spread = <170000 550000>;
@@ -616,7 +616,7 @@ ldo1 {
rtc_vdd: ldo2 {
regulator-name = "vdd_ldo2,vdd_rtc";
- regulator-min-microvolt = <1200000>;
+ regulator-min-microvolt = <950000>;
regulator-max-microvolt = <1300000>;
regulator-coupled-with = <&vdd_core &vdd_cpu>;
regulator-coupled-max-spread = <170000 550000>;
--
2.29.2
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 07/13] ARM: tegra: acer-a500: Reduce thermal throttling hysteresis to 0.2C
2021-01-22 20:24 [PATCH v2 00/13] NVIDIA Tegra ARM32 device-tree improvements Dmitry Osipenko
` (5 preceding siblings ...)
2021-01-22 20:24 ` [PATCH v2 06/13] ARM: tegra: acer-a500: Enable core voltage scaling Dmitry Osipenko
@ 2021-01-22 20:24 ` Dmitry Osipenko
2021-01-22 20:24 ` [PATCH v2 08/13] ARM: tegra: acer-a500: Specify all CPU cores as cooling devices Dmitry Osipenko
` (5 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Dmitry Osipenko @ 2021-01-22 20:24 UTC (permalink / raw)
To: Thierry Reding, Jonathan Hunter, Daniel Lezcano, Nicolas Chauvet,
Matt Merhar, Peter Geis
Cc: linux-tegra, linux-kernel
The 2C hysteresis is a bit too high, although CPU never gets hot on A500.
Nevertheless, let's reduce thermal throttling hysteresis to 0.2C, which is
a much more reasonable value.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
index 719da992fdaf..0d228e2dd158 100644
--- a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
+++ b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
@@ -1055,7 +1055,7 @@ trips {
trip0: cpu-alert0 {
/* start throttling at 50C */
temperature = <50000>;
- hysteresis = <3000>;
+ hysteresis = <200>;
type = "passive";
};
--
2.29.2
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 08/13] ARM: tegra: acer-a500: Specify all CPU cores as cooling devices
2021-01-22 20:24 [PATCH v2 00/13] NVIDIA Tegra ARM32 device-tree improvements Dmitry Osipenko
` (6 preceding siblings ...)
2021-01-22 20:24 ` [PATCH v2 07/13] ARM: tegra: acer-a500: Reduce thermal throttling hysteresis to 0.2C Dmitry Osipenko
@ 2021-01-22 20:24 ` Dmitry Osipenko
2021-01-22 20:24 ` [PATCH v2 09/13] ARM: tegra: acer-a500: Rename avdd to vdda of touchscreen node Dmitry Osipenko
` (4 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Dmitry Osipenko @ 2021-01-22 20:24 UTC (permalink / raw)
To: Thierry Reding, Jonathan Hunter, Daniel Lezcano, Nicolas Chauvet,
Matt Merhar, Peter Geis
Cc: linux-tegra, linux-kernel
If CPU0 is unplugged the cooling device can not rebind to CPU1. And if
CPU0 is plugged in again, the cooling device may fail to initialize.
If the CPUs are mapped with the physical CPU0 to Linux numbering
CPU1, the cooling device mapping will fail.
Hence specify all CPU cores as a cooling devices in the device-tree.
Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
index 0d228e2dd158..4dcec18b677b 100644
--- a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
+++ b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
@@ -838,9 +838,10 @@ cpu0: cpu@0 {
#cooling-cells = <2>;
};
- cpu@1 {
+ cpu1: cpu@1 {
cpu-supply = <&vdd_cpu>;
operating-points-v2 = <&cpu0_opp_table>;
+ #cooling-cells = <2>;
};
};
@@ -1070,7 +1071,8 @@ trip1: cpu-crit {
cooling-maps {
map0 {
trip = <&trip0>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
--
2.29.2
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 09/13] ARM: tegra: acer-a500: Rename avdd to vdda of touchscreen node
2021-01-22 20:24 [PATCH v2 00/13] NVIDIA Tegra ARM32 device-tree improvements Dmitry Osipenko
` (7 preceding siblings ...)
2021-01-22 20:24 ` [PATCH v2 08/13] ARM: tegra: acer-a500: Specify all CPU cores as cooling devices Dmitry Osipenko
@ 2021-01-22 20:24 ` Dmitry Osipenko
2021-01-22 20:24 ` [PATCH v2 10/13] ARM: tegra: nexus7: Specify all CPU cores as cooling devices Dmitry Osipenko
` (3 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Dmitry Osipenko @ 2021-01-22 20:24 UTC (permalink / raw)
To: Thierry Reding, Jonathan Hunter, Daniel Lezcano, Nicolas Chauvet,
Matt Merhar, Peter Geis
Cc: linux-tegra, linux-kernel
Rename avdd supply to vdda of the touchscreen node. The old supply name
was incorrect.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
index 4dcec18b677b..2c6cb7de57f7 100644
--- a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
+++ b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
@@ -448,7 +448,7 @@ touchscreen@4c {
reset-gpios = <&gpio TEGRA_GPIO(Q, 7) GPIO_ACTIVE_LOW>;
- avdd-supply = <&vdd_3v3_sys>;
+ vdda-supply = <&vdd_3v3_sys>;
vdd-supply = <&vdd_3v3_sys>;
};
--
2.29.2
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 10/13] ARM: tegra: nexus7: Specify all CPU cores as cooling devices
2021-01-22 20:24 [PATCH v2 00/13] NVIDIA Tegra ARM32 device-tree improvements Dmitry Osipenko
` (8 preceding siblings ...)
2021-01-22 20:24 ` [PATCH v2 09/13] ARM: tegra: acer-a500: Rename avdd to vdda of touchscreen node Dmitry Osipenko
@ 2021-01-22 20:24 ` Dmitry Osipenko
2021-01-22 20:24 ` [PATCH v2 11/13] ARM: tegra: ouya: " Dmitry Osipenko
` (2 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Dmitry Osipenko @ 2021-01-22 20:24 UTC (permalink / raw)
To: Thierry Reding, Jonathan Hunter, Daniel Lezcano, Nicolas Chauvet,
Matt Merhar, Peter Geis
Cc: linux-tegra, linux-kernel
If CPU0 is unplugged the cooling device can not rebind to CPU1. And if
CPU0 is plugged in again, the cooling device may fail to initialize.
If the CPUs are mapped with the physical CPU0 to Linux numbering
CPU1, the cooling device mapping will fail.
Hence specify all CPU cores as a cooling devices in the device-tree.
Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
.../dts/tegra30-asus-nexus7-grouper-common.dtsi | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi b/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi
index ac1c1a63eb0e..dc773b1bf8ee 100644
--- a/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi
+++ b/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi
@@ -1056,19 +1056,22 @@ cpu0: cpu@0 {
#cooling-cells = <2>;
};
- cpu@1 {
+ cpu1: cpu@1 {
cpu-supply = <&vdd_cpu>;
operating-points-v2 = <&cpu0_opp_table>;
+ #cooling-cells = <2>;
};
- cpu@2 {
+ cpu2: cpu@2 {
cpu-supply = <&vdd_cpu>;
operating-points-v2 = <&cpu0_opp_table>;
+ #cooling-cells = <2>;
};
- cpu@3 {
+ cpu3: cpu@3 {
cpu-supply = <&vdd_cpu>;
operating-points-v2 = <&cpu0_opp_table>;
+ #cooling-cells = <2>;
};
};
@@ -1281,7 +1284,10 @@ trip1: cpu-crit {
cooling-maps {
map0 {
trip = <&trip0>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
--
2.29.2
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 11/13] ARM: tegra: ouya: Specify all CPU cores as cooling devices
2021-01-22 20:24 [PATCH v2 00/13] NVIDIA Tegra ARM32 device-tree improvements Dmitry Osipenko
` (9 preceding siblings ...)
2021-01-22 20:24 ` [PATCH v2 10/13] ARM: tegra: nexus7: Specify all CPU cores as cooling devices Dmitry Osipenko
@ 2021-01-22 20:24 ` Dmitry Osipenko
2021-01-22 20:24 ` [PATCH v2 12/13] ARM: tegra: Specify CPU suspend OPP in device-tree Dmitry Osipenko
2021-01-22 20:24 ` [PATCH v2 13/13] ARM: tegra: Specify memory " Dmitry Osipenko
12 siblings, 0 replies; 14+ messages in thread
From: Dmitry Osipenko @ 2021-01-22 20:24 UTC (permalink / raw)
To: Thierry Reding, Jonathan Hunter, Daniel Lezcano, Nicolas Chauvet,
Matt Merhar, Peter Geis
Cc: linux-tegra, linux-kernel
If CPU0 is unplugged the cooling device can not rebind to CPU1. And if
CPU0 is plugged in again, the cooling device may fail to initialize.
If the CPUs are mapped with the physical CPU0 to Linux numbering
CPU1, the cooling device mapping will fail.
Hence specify all CPU cores as a cooling devices in the device-tree.
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Matt Merhar <mattmerhar@protonmail.com>
Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
arch/arm/boot/dts/tegra30-ouya.dts | 15 +++++++++++----
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30-ouya.dts b/arch/arm/boot/dts/tegra30-ouya.dts
index 74da1360d297..b92477ac29ac 100644
--- a/arch/arm/boot/dts/tegra30-ouya.dts
+++ b/arch/arm/boot/dts/tegra30-ouya.dts
@@ -391,19 +391,23 @@ cpu0: cpu@0 {
cpu-supply = <&vdd_cpu>;
#cooling-cells = <2>;
};
- cpu@1 {
+
+ cpu1: cpu@1 {
operating-points-v2 = <&cpu0_opp_table>;
cpu-supply = <&vdd_cpu>;
+ #cooling-cells = <2>;
};
- cpu@2 {
+ cpu2: cpu@2 {
operating-points-v2 = <&cpu0_opp_table>;
cpu-supply = <&vdd_cpu>;
+ #cooling-cells = <2>;
};
- cpu@3 {
+ cpu3: cpu@3 {
operating-points-v2 = <&cpu0_opp_table>;
cpu-supply = <&vdd_cpu>;
+ #cooling-cells = <2>;
};
};
@@ -455,7 +459,10 @@ map0 {
};
map1 {
trip = <&cpu_alert1>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
--
2.29.2
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 12/13] ARM: tegra: Specify CPU suspend OPP in device-tree
2021-01-22 20:24 [PATCH v2 00/13] NVIDIA Tegra ARM32 device-tree improvements Dmitry Osipenko
` (10 preceding siblings ...)
2021-01-22 20:24 ` [PATCH v2 11/13] ARM: tegra: ouya: " Dmitry Osipenko
@ 2021-01-22 20:24 ` Dmitry Osipenko
2021-01-22 20:24 ` [PATCH v2 13/13] ARM: tegra: Specify memory " Dmitry Osipenko
12 siblings, 0 replies; 14+ messages in thread
From: Dmitry Osipenko @ 2021-01-22 20:24 UTC (permalink / raw)
To: Thierry Reding, Jonathan Hunter, Daniel Lezcano, Nicolas Chauvet,
Matt Merhar, Peter Geis
Cc: linux-tegra, linux-kernel
Specify CPU suspend OPP in a device-tree, just for consistency. Now CPU
will always suspend on the same frequency.
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Tested-by: Dmitry Osipenko <digetx@gmail.com> # A500 T20 and Nexus7 T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
arch/arm/boot/dts/tegra20-cpu-opp.dtsi | 2 ++
arch/arm/boot/dts/tegra30-cpu-opp.dtsi | 3 +++
2 files changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/tegra20-cpu-opp.dtsi b/arch/arm/boot/dts/tegra20-cpu-opp.dtsi
index 702a635e88e7..135de316383b 100644
--- a/arch/arm/boot/dts/tegra20-cpu-opp.dtsi
+++ b/arch/arm/boot/dts/tegra20-cpu-opp.dtsi
@@ -9,12 +9,14 @@ opp@216000000,750 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x0F 0x0003>;
opp-hz = /bits/ 64 <216000000>;
+ opp-suspend;
};
opp@216000000,800 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x0F 0x0004>;
opp-hz = /bits/ 64 <216000000>;
+ opp-suspend;
};
opp@312000000,750 {
diff --git a/arch/arm/boot/dts/tegra30-cpu-opp.dtsi b/arch/arm/boot/dts/tegra30-cpu-opp.dtsi
index 0f7135006d19..72f2fe26cc0e 100644
--- a/arch/arm/boot/dts/tegra30-cpu-opp.dtsi
+++ b/arch/arm/boot/dts/tegra30-cpu-opp.dtsi
@@ -45,18 +45,21 @@ opp@204000000,800 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1F 0x31FE>;
opp-hz = /bits/ 64 <204000000>;
+ opp-suspend;
};
opp@204000000,850 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1F 0x0C01>;
opp-hz = /bits/ 64 <204000000>;
+ opp-suspend;
};
opp@204000000,912 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1F 0x0200>;
opp-hz = /bits/ 64 <204000000>;
+ opp-suspend;
};
opp@312000000,850 {
--
2.29.2
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 13/13] ARM: tegra: Specify memory suspend OPP in device-tree
2021-01-22 20:24 [PATCH v2 00/13] NVIDIA Tegra ARM32 device-tree improvements Dmitry Osipenko
` (11 preceding siblings ...)
2021-01-22 20:24 ` [PATCH v2 12/13] ARM: tegra: Specify CPU suspend OPP in device-tree Dmitry Osipenko
@ 2021-01-22 20:24 ` Dmitry Osipenko
12 siblings, 0 replies; 14+ messages in thread
From: Dmitry Osipenko @ 2021-01-22 20:24 UTC (permalink / raw)
To: Thierry Reding, Jonathan Hunter, Daniel Lezcano, Nicolas Chauvet,
Matt Merhar, Peter Geis
Cc: linux-tegra, linux-kernel
Specify memory suspend OPP in a device-tree, just for consistency.
Now memory will always suspend on the same frequency.
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Tested-by: Dmitry Osipenko <digetx@gmail.com> # A500 T20 and Nexus7 T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
arch/arm/boot/dts/tegra124-peripherals-opp.dtsi | 5 +++++
arch/arm/boot/dts/tegra20-peripherals-opp.dtsi | 1 +
arch/arm/boot/dts/tegra30-peripherals-opp.dtsi | 3 +++
3 files changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/tegra124-peripherals-opp.dtsi b/arch/arm/boot/dts/tegra124-peripherals-opp.dtsi
index 49d9420a3289..781ac8601030 100644
--- a/arch/arm/boot/dts/tegra124-peripherals-opp.dtsi
+++ b/arch/arm/boot/dts/tegra124-peripherals-opp.dtsi
@@ -128,24 +128,28 @@ opp@204000000,800 {
opp-microvolt = <800000 800000 1150000>;
opp-hz = /bits/ 64 <204000000>;
opp-supported-hw = <0x0003>;
+ opp-suspend;
};
opp@204000000,950 {
opp-microvolt = <950000 950000 1150000>;
opp-hz = /bits/ 64 <204000000>;
opp-supported-hw = <0x0008>;
+ opp-suspend;
};
opp@204000000,1050 {
opp-microvolt = <1050000 1050000 1150000>;
opp-hz = /bits/ 64 <204000000>;
opp-supported-hw = <0x0010>;
+ opp-suspend;
};
opp@204000000,1110 {
opp-microvolt = <1110000 1110000 1150000>;
opp-hz = /bits/ 64 <204000000>;
opp-supported-hw = <0x0004>;
+ opp-suspend;
};
opp@264000000,800 {
@@ -360,6 +364,7 @@ opp@204000000 {
opp-hz = /bits/ 64 <204000000>;
opp-supported-hw = <0x001F>;
opp-peak-kBps = <3264000>;
+ opp-suspend;
};
opp@264000000 {
diff --git a/arch/arm/boot/dts/tegra20-peripherals-opp.dtsi b/arch/arm/boot/dts/tegra20-peripherals-opp.dtsi
index b84afecea154..ef3ad2e5f270 100644
--- a/arch/arm/boot/dts/tegra20-peripherals-opp.dtsi
+++ b/arch/arm/boot/dts/tegra20-peripherals-opp.dtsi
@@ -68,6 +68,7 @@ opp@216000000 {
opp-microvolt = <1000000 1000000 1300000>;
opp-hz = /bits/ 64 <216000000>;
opp-supported-hw = <0x000F>;
+ opp-suspend;
};
opp@300000000 {
diff --git a/arch/arm/boot/dts/tegra30-peripherals-opp.dtsi b/arch/arm/boot/dts/tegra30-peripherals-opp.dtsi
index cbe84d25e726..2c9780319725 100644
--- a/arch/arm/boot/dts/tegra30-peripherals-opp.dtsi
+++ b/arch/arm/boot/dts/tegra30-peripherals-opp.dtsi
@@ -128,12 +128,14 @@ opp@204000000,1000 {
opp-microvolt = <1000000 1000000 1350000>;
opp-hz = /bits/ 64 <204000000>;
opp-supported-hw = <0x0007>;
+ opp-suspend;
};
opp@204000000,1250 {
opp-microvolt = <1250000 1250000 1350000>;
opp-hz = /bits/ 64 <204000000>;
opp-supported-hw = <0x0008>;
+ opp-suspend;
};
opp@333500000,1000 {
@@ -312,6 +314,7 @@ opp@204000000 {
opp-hz = /bits/ 64 <204000000>;
opp-supported-hw = <0x000F>;
opp-peak-kBps = <1632000>;
+ opp-suspend;
};
opp@333500000 {
--
2.29.2
^ permalink raw reply related [flat|nested] 14+ messages in thread