* [PATCH v2 01/12] fix: arm64: dts: replace wrong regulator on ap emmc
2021-02-10 14:09 [PATCH v2 00/12] Device tree fixes for Armada family kostap
@ 2021-02-10 14:09 ` kostap
2021-02-11 10:52 ` Russell King - ARM Linux admin
2021-02-10 14:09 ` [PATCH v2 02/12] dts: mvebu: Update A8K AP806/AP807 SDHCI settings kostap
` (10 subsequent siblings)
11 siblings, 1 reply; 19+ messages in thread
From: kostap @ 2021-02-10 14:09 UTC (permalink / raw)
To: linux-kernel, devicetree, linux-arm-kernel
Cc: linux, robh+dt, sebastian.hesselbarth, gregory.clement, andrew,
mw, jaz, nadavh, stefanc, bpeled, Konstantin Porotchkin
From: Konstantin Porotchkin <kostap@marvell.com>
Replace wrong regulator in AP0 eMMC definition on MacchiatoBIN
board with 3.3V regulator.
The MacchiatoBIN board has no 1.8V regulator connected to AP0
eMMC (ap0_sdhci0) interface.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
---
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
index cbcb210cb6d8..73733b4126e2 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
@@ -119,7 +119,7 @@
no-sdio;
non-removable;
status = "okay";
- vqmmc-supply = <&v_vddo_h>;
+ vqmmc-supply = <&v_3_3>;
};
&cp0_i2c0 {
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [PATCH v2 01/12] fix: arm64: dts: replace wrong regulator on ap emmc
2021-02-10 14:09 ` [PATCH v2 01/12] fix: arm64: dts: replace wrong regulator on ap emmc kostap
@ 2021-02-11 10:52 ` Russell King - ARM Linux admin
2021-02-11 13:57 ` [EXT] " Kostya Porotchkin
0 siblings, 1 reply; 19+ messages in thread
From: Russell King - ARM Linux admin @ 2021-02-11 10:52 UTC (permalink / raw)
To: kostap, Jon Nettleton
Cc: linux-kernel, devicetree, linux-arm-kernel, robh+dt,
sebastian.hesselbarth, gregory.clement, andrew, mw, jaz, nadavh,
stefanc, bpeled
On Wed, Feb 10, 2021 at 04:09:38PM +0200, kostap@marvell.com wrote:
> From: Konstantin Porotchkin <kostap@marvell.com>
>
> Replace wrong regulator in AP0 eMMC definition on MacchiatoBIN
> board with 3.3V regulator.
> The MacchiatoBIN board has no 1.8V regulator connected to AP0
> eMMC (ap0_sdhci0) interface.
There seems to be some variability between Macchiatobin versions
according to the schematics.
The VDDO_H supply is connected to the eMMC VCCQ pins, and is also
connected to the AP_VDDO_H pins. It is wired to the 1.8V regulator
on rev 1.1 schematics, but hard-wired to the 3.3V regulator on
rev 1.3 schematics.
This needs clarification from SolidRun before the patch can be
accepted - was VDDO_H ever wired to the 1.8V regulator on production
hardware?
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
^ permalink raw reply [flat|nested] 19+ messages in thread
* RE: [EXT] Re: [PATCH v2 01/12] fix: arm64: dts: replace wrong regulator on ap emmc
2021-02-11 10:52 ` Russell King - ARM Linux admin
@ 2021-02-11 13:57 ` Kostya Porotchkin
2021-02-11 14:02 ` Russell King - ARM Linux admin
0 siblings, 1 reply; 19+ messages in thread
From: Kostya Porotchkin @ 2021-02-11 13:57 UTC (permalink / raw)
To: Russell King - ARM Linux admin, Jon Nettleton
Cc: linux-kernel, devicetree, linux-arm-kernel, robh+dt,
sebastian.hesselbarth, gregory.clement, andrew, mw, jaz,
Nadav Haklai, Stefan Chulski, Ben Peled
> ----------------------------------------------------------------------
> On Wed, Feb 10, 2021 at 04:09:38PM +0200, kostap@marvell.com wrote:
> > From: Konstantin Porotchkin <kostap@marvell.com>
> >
> > Replace wrong regulator in AP0 eMMC definition on MacchiatoBIN board
> > with 3.3V regulator.
> > The MacchiatoBIN board has no 1.8V regulator connected to AP0 eMMC
> > (ap0_sdhci0) interface.
>
> There seems to be some variability between Macchiatobin versions according
> to the schematics.
>
> The VDDO_H supply is connected to the eMMC VCCQ pins, and is also
> connected to the AP_VDDO_H pins. It is wired to the 1.8V regulator on rev 1.1
> schematics, but hard-wired to the 3.3V regulator on rev 1.3 schematics.
>
> This needs clarification from SolidRun before the patch can be accepted - was
> VDDO_H ever wired to the 1.8V regulator on production hardware?
>
[KP] I will try to find a relevant contact in SolidRun for get this issue clarified.
Kosta
> --
> RMK's Patch system: https://urldefense.proofpoint.com/v2/url?u=https-
> 3A__www.armlinux.org.uk_developer_patches_&d=DwIBAg&c=nKjWec2b6R0
> mOyPaz7xtfQ&r=-
> N9sN4p5NSr0JGQoQ_2UCOgAqajG99W1EbSOww0WU8o&m=7JAOlRdnL-
> 42trjLrz_DOgZhvVuW8Skolb3bL-wJ6lo&s=9IB3Lxht5IQHTINpyLfX-
> KC8AmqqHn0cCSSuQuTvfkE&e=
> FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [EXT] Re: [PATCH v2 01/12] fix: arm64: dts: replace wrong regulator on ap emmc
2021-02-11 13:57 ` [EXT] " Kostya Porotchkin
@ 2021-02-11 14:02 ` Russell King - ARM Linux admin
0 siblings, 0 replies; 19+ messages in thread
From: Russell King - ARM Linux admin @ 2021-02-11 14:02 UTC (permalink / raw)
To: Kostya Porotchkin
Cc: Jon Nettleton, linux-kernel, devicetree, linux-arm-kernel,
robh+dt, sebastian.hesselbarth, gregory.clement, andrew, mw, jaz,
Nadav Haklai, Stefan Chulski, Ben Peled
On Thu, Feb 11, 2021 at 01:57:25PM +0000, Kostya Porotchkin wrote:
>
> > ----------------------------------------------------------------------
> > On Wed, Feb 10, 2021 at 04:09:38PM +0200, kostap@marvell.com wrote:
> > > From: Konstantin Porotchkin <kostap@marvell.com>
> > >
> > > Replace wrong regulator in AP0 eMMC definition on MacchiatoBIN board
> > > with 3.3V regulator.
> > > The MacchiatoBIN board has no 1.8V regulator connected to AP0 eMMC
> > > (ap0_sdhci0) interface.
> >
> > There seems to be some variability between Macchiatobin versions according
> > to the schematics.
> >
> > The VDDO_H supply is connected to the eMMC VCCQ pins, and is also
> > connected to the AP_VDDO_H pins. It is wired to the 1.8V regulator on rev 1.1
> > schematics, but hard-wired to the 3.3V regulator on rev 1.3 schematics.
> >
> > This needs clarification from SolidRun before the patch can be accepted - was
> > VDDO_H ever wired to the 1.8V regulator on production hardware?
> >
> [KP] I will try to find a relevant contact in SolidRun for get this issue clarified.
I've already added Jon Nettleton.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH v2 02/12] dts: mvebu: Update A8K AP806/AP807 SDHCI settings
2021-02-10 14:09 [PATCH v2 00/12] Device tree fixes for Armada family kostap
2021-02-10 14:09 ` [PATCH v2 01/12] fix: arm64: dts: replace wrong regulator on ap emmc kostap
@ 2021-02-10 14:09 ` kostap
2021-02-11 10:42 ` Russell King - ARM Linux admin
2021-02-10 14:09 ` [PATCH v2 03/12] dts: mvebu: Add pin control definitions for SDIO interafce kostap
` (9 subsequent siblings)
11 siblings, 1 reply; 19+ messages in thread
From: kostap @ 2021-02-10 14:09 UTC (permalink / raw)
To: linux-kernel, devicetree, linux-arm-kernel
Cc: linux, robh+dt, sebastian.hesselbarth, gregory.clement, andrew,
mw, jaz, nadavh, stefanc, bpeled, Konstantin Porotchkin
From: Konstantin Porotchkin <kostap@marvell.com>
Select the AP SDHCI PHY slow mode for AP806 die only (move it
from armada-ap80x.dtsi to armada-ap806.dtsi). This will allow
running AP807 based devices at HS400 speed.
Remove Ap SDHCI slow mode property from MacchiatoBin board DTS
since it is already selected on the SoC level.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
---
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi | 5 -----
arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 12 ++++++++++++
arch/arm64/boot/dts/marvell/armada-ap80x.dtsi | 1 -
3 files changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
index 73733b4126e2..69653de998e2 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
@@ -109,11 +109,6 @@
&ap_sdhci0 {
bus-width = <8>;
- /*
- * Not stable in HS modes - phy needs "more calibration", so add
- * the "slow-mode" and disable SDR104, SDR50 and DDR50 modes.
- */
- marvell,xenon-phy-slow-mode;
no-1-8-v;
no-sd;
no-sdio;
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
index 866628679ac7..828cd539173b 100644
--- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
@@ -28,3 +28,15 @@
reg = <0x278 0xa30>;
};
};
+
+&ap_sdhci0 {
+ /*
+ * SoC based on AP806 revision A0, A1 and A2 should use slow mode
+ * settings for Ap SDHCI due to HW Erratum HWE-7296210
+ * AP806 revesion B0 and later has this erratum fixed and the slow
+ * mode could be removed in board DTS:
+ * /delete-property/marvell,xenon-phy-slow-mode;
+ * Starting from B0 revision, the AP SDHCI can run with HS400 timing.
+ */
+ marvell,xenon-phy-slow-mode;
+};
diff --git a/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi b/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
index 12e477f1aeb9..edd6131a0587 100644
--- a/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
@@ -257,7 +257,6 @@
clock-names = "core";
clocks = <&ap_clk 4>;
dma-coherent;
- marvell,xenon-phy-slow-mode;
status = "disabled";
};
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [PATCH v2 02/12] dts: mvebu: Update A8K AP806/AP807 SDHCI settings
2021-02-10 14:09 ` [PATCH v2 02/12] dts: mvebu: Update A8K AP806/AP807 SDHCI settings kostap
@ 2021-02-11 10:42 ` Russell King - ARM Linux admin
0 siblings, 0 replies; 19+ messages in thread
From: Russell King - ARM Linux admin @ 2021-02-11 10:42 UTC (permalink / raw)
To: kostap
Cc: linux-kernel, devicetree, linux-arm-kernel, robh+dt,
sebastian.hesselbarth, gregory.clement, andrew, mw, jaz, nadavh,
stefanc, bpeled
On Wed, Feb 10, 2021 at 04:09:39PM +0200, kostap@marvell.com wrote:
> From: Konstantin Porotchkin <kostap@marvell.com>
>
> Select the AP SDHCI PHY slow mode for AP806 die only (move it
> from armada-ap80x.dtsi to armada-ap806.dtsi). This will allow
> running AP807 based devices at HS400 speed.
> Remove Ap SDHCI slow mode property from MacchiatoBin board DTS
> since it is already selected on the SoC level.
>
> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
> ---
> arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi | 5 -----
> arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 12 ++++++++++++
> arch/arm64/boot/dts/marvell/armada-ap80x.dtsi | 1 -
> 3 files changed, 12 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
> index 73733b4126e2..69653de998e2 100644
> --- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
> @@ -109,11 +109,6 @@
>
> &ap_sdhci0 {
> bus-width = <8>;
> - /*
> - * Not stable in HS modes - phy needs "more calibration", so add
> - * the "slow-mode" and disable SDR104, SDR50 and DDR50 modes.
> - */
> - marvell,xenon-phy-slow-mode;
> no-1-8-v;
> no-sd;
> no-sdio;
> diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
> index 866628679ac7..828cd539173b 100644
> --- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
> @@ -28,3 +28,15 @@
> reg = <0x278 0xa30>;
> };
> };
> +
> +&ap_sdhci0 {
> + /*
> + * SoC based on AP806 revision A0, A1 and A2 should use slow mode
> + * settings for Ap SDHCI due to HW Erratum HWE-7296210
> + * AP806 revesion B0 and later has this erratum fixed and the slow
> + * mode could be removed in board DTS:
> + * /delete-property/marvell,xenon-phy-slow-mode;
> + * Starting from B0 revision, the AP SDHCI can run with HS400 timing.
> + */
> + marvell,xenon-phy-slow-mode;
> +};
> diff --git a/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi b/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
> index 12e477f1aeb9..edd6131a0587 100644
> --- a/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
> @@ -257,7 +257,6 @@
> clock-names = "core";
> clocks = <&ap_clk 4>;
> dma-coherent;
> - marvell,xenon-phy-slow-mode;
> status = "disabled";
> };
>
> --
> 2.17.1
>
>
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH v2 03/12] dts: mvebu: Add pin control definitions for SDIO interafce
2021-02-10 14:09 [PATCH v2 00/12] Device tree fixes for Armada family kostap
2021-02-10 14:09 ` [PATCH v2 01/12] fix: arm64: dts: replace wrong regulator on ap emmc kostap
2021-02-10 14:09 ` [PATCH v2 02/12] dts: mvebu: Update A8K AP806/AP807 SDHCI settings kostap
@ 2021-02-10 14:09 ` kostap
2021-02-10 14:09 ` [PATCH v2 04/12] fix: dts: a8k: Add CP eMMC regulator and update device parameters kostap
` (8 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: kostap @ 2021-02-10 14:09 UTC (permalink / raw)
To: linux-kernel, devicetree, linux-arm-kernel
Cc: linux, robh+dt, sebastian.hesselbarth, gregory.clement, andrew,
mw, jaz, nadavh, stefanc, bpeled, Konstantin Porotchkin
From: Konstantin Porotchkin <kostap@marvell.com>
Add SDIO mode pin control configuration for CP0 in Armada
70x0 and 80x0 SoCs.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
---
arch/arm64/boot/dts/marvell/armada-70x0.dtsi | 6 ++++++
arch/arm64/boot/dts/marvell/armada-80x0.dtsi | 6 ++++++
2 files changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
index 293403a1a333..f22b6b8f5086 100644
--- a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
@@ -47,6 +47,12 @@
cp0_pinctrl: pinctrl {
compatible = "marvell,armada-7k-pinctrl";
+ sdhci_pins: sdhci-pins {
+ marvell,pins = "mpp56", "mpp57", "mpp58",
+ "mpp59", "mpp60", "mpp61", "mpp62";
+ marvell,function = "sdio";
+ };
+
nand_pins: nand-pins {
marvell,pins =
"mpp15", "mpp16", "mpp17", "mpp18",
diff --git a/arch/arm64/boot/dts/marvell/armada-80x0.dtsi b/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
index ee67c70bf02e..04a6142a0286 100644
--- a/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
@@ -70,6 +70,12 @@
&cp0_syscon0 {
cp0_pinctrl: pinctrl {
compatible = "marvell,armada-8k-cpm-pinctrl";
+
+ sdhci_pins: sdhci-pins {
+ marvell,pins = "mpp56", "mpp57", "mpp58",
+ "mpp59", "mpp60", "mpp61", "mpp62";
+ marvell,function = "sdio";
+ };
};
};
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v2 04/12] fix: dts: a8k: Add CP eMMC regulator and update device parameters
2021-02-10 14:09 [PATCH v2 00/12] Device tree fixes for Armada family kostap
` (2 preceding siblings ...)
2021-02-10 14:09 ` [PATCH v2 03/12] dts: mvebu: Add pin control definitions for SDIO interafce kostap
@ 2021-02-10 14:09 ` kostap
2021-02-10 14:09 ` [PATCH v2 05/12] arm64: dts: marvell: armada-3720-db: add comphy references kostap
` (7 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: kostap @ 2021-02-10 14:09 UTC (permalink / raw)
To: linux-kernel, devicetree, linux-arm-kernel
Cc: linux, robh+dt, sebastian.hesselbarth, gregory.clement, andrew,
mw, jaz, nadavh, stefanc, bpeled, Konstantin Porotchkin
From: Konstantin Porotchkin <kostap@marvell.com>
Add GPIO regulator for controlling CP0 eMMC voltage (3.3V/1.8V)
Update CP0 SDHCI parameters in A7K/A8K boards DTS files.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
---
arch/arm64/boot/dts/marvell/armada-7040-db.dts | 17 ++++++++++++++++-
arch/arm64/boot/dts/marvell/armada-8040-db.dts | 18 +++++++++++++++++-
2 files changed, 33 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/marvell/armada-7040-db.dts b/arch/arm64/boot/dts/marvell/armada-7040-db.dts
index a7eb4e7697a2..f8179cadc610 100644
--- a/arch/arm64/boot/dts/marvell/armada-7040-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-7040-db.dts
@@ -28,6 +28,19 @@
ethernet2 = &cp0_eth2;
};
+ cp0_vccq_sd0_reg: cp0_vccq_sd0 {
+ compatible = "regulator-gpio";
+ regulator-name = "cp0-vccq-sd0";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ gpios = <&expander0 15 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0>;
+ states = <1800000 0x1
+ 3300000 0x0>;
+ enable-active-high;
+ };
+
cp0_exp_usb3_0_current_regulator: gpio-regulator {
compatible = "regulator-gpio";
regulator-name = "cp0-usb3-0-current-regulator";
@@ -253,8 +266,10 @@
&cp0_sdhci0 {
status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdhci_pins>;
bus-width = <4>;
- no-1-8-v;
+ vqmmc-supply = <&cp0_vccq_sd0_reg>;
cd-gpios = <&expander0 12 GPIO_ACTIVE_LOW>;
};
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-db.dts b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
index 09fb5256f1db..790c7ab0b816 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
@@ -31,6 +31,19 @@
i2c2 = &cp1_i2c0;
};
+ cp0_vccq_sd0_reg: cp0_vccq_sd0 {
+ compatible = "regulator-gpio";
+ regulator-name = "cp0-vccq-sd0";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ gpios = <&expander0 15 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0>;
+ states = <1800000 0x1
+ 3300000 0x0>;
+ enable-active-high;
+ };
+
cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus {
compatible = "regulator-fixed";
regulator-name = "cp0-usb3h0-vbus";
@@ -353,6 +366,9 @@
&cp0_sdhci0 {
status = "okay";
- bus-width = <8>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdhci_pins>;
+ bus-width = <4>;
+ vqmmc-supply = <&cp0_vccq_sd0_reg>;
non-removable;
};
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v2 05/12] arm64: dts: marvell: armada-3720-db: add comphy references
2021-02-10 14:09 [PATCH v2 00/12] Device tree fixes for Armada family kostap
` (3 preceding siblings ...)
2021-02-10 14:09 ` [PATCH v2 04/12] fix: dts: a8k: Add CP eMMC regulator and update device parameters kostap
@ 2021-02-10 14:09 ` kostap
2021-02-11 23:31 ` Pali Rohár
2021-02-10 14:09 ` [PATCH v2 06/12] arm64: dts: marvell: armada-3270-espressobin: " kostap
` (6 subsequent siblings)
11 siblings, 1 reply; 19+ messages in thread
From: kostap @ 2021-02-10 14:09 UTC (permalink / raw)
To: linux-kernel, devicetree, linux-arm-kernel
Cc: linux, robh+dt, sebastian.hesselbarth, gregory.clement, andrew,
mw, jaz, nadavh, stefanc, bpeled, Konstantin Porotchkin
From: Grzegorz Jaszczyk <jaz@semihalf.com>
Adding phy description to pcie, sata and usb will allow appropriate drivers
to configure marvell comphy-a3700 accordingly.
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
---
arch/arm64/boot/dts/marvell/armada-3720-db.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
index 3e5789f37206..15e923f945d4 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
@@ -132,11 +132,15 @@
pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
status = "okay";
+ /* Generic PHY, providing serdes lanes */
+ phys = <&comphy1 0>;
};
/* CON3 */
&sata {
status = "okay";
+ /* Generic PHY, providing serdes lanes */
+ phys = <&comphy2 0>;
};
&sdhci0 {
@@ -217,4 +221,7 @@
&usb3 {
status = "okay";
usb-phy = <&usb3_phy>;
+ /* Generic PHY, providing serdes lanes */
+ phys = <&comphy0 0>;
+ phy-names = "usb";
};
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [PATCH v2 05/12] arm64: dts: marvell: armada-3720-db: add comphy references
2021-02-10 14:09 ` [PATCH v2 05/12] arm64: dts: marvell: armada-3720-db: add comphy references kostap
@ 2021-02-11 23:31 ` Pali Rohár
0 siblings, 0 replies; 19+ messages in thread
From: Pali Rohár @ 2021-02-11 23:31 UTC (permalink / raw)
To: kostap
Cc: linux-kernel, devicetree, linux-arm-kernel, linux, robh+dt,
sebastian.hesselbarth, gregory.clement, andrew, mw, jaz, nadavh,
stefanc, bpeled
On Wednesday 10 February 2021 16:09:42 kostap@marvell.com wrote:
> From: Grzegorz Jaszczyk <jaz@semihalf.com>
>
> Adding phy description to pcie, sata and usb will allow appropriate drivers
> to configure marvell comphy-a3700 accordingly.
>
> Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Hello! This patch is not needed too as Gregory already included into his
tree alternative patch which defines SATA PHY globally into main include
file armada-37xx.dtsi:
https://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu.git/commit/?h=for-next&id=6ece0f7dbd558670ec72ba390379949a4d4dc5c0
And PCIe and USB 3.0 PHY definitions are already in include file.
> ---
> arch/arm64/boot/dts/marvell/armada-3720-db.dts | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
> index 3e5789f37206..15e923f945d4 100644
> --- a/arch/arm64/boot/dts/marvell/armada-3720-db.dts
> +++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
> @@ -132,11 +132,15 @@
> pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
> reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
> status = "okay";
> + /* Generic PHY, providing serdes lanes */
> + phys = <&comphy1 0>;
> };
>
> /* CON3 */
> &sata {
> status = "okay";
> + /* Generic PHY, providing serdes lanes */
> + phys = <&comphy2 0>;
> };
>
> &sdhci0 {
> @@ -217,4 +221,7 @@
> &usb3 {
> status = "okay";
> usb-phy = <&usb3_phy>;
> + /* Generic PHY, providing serdes lanes */
> + phys = <&comphy0 0>;
> + phy-names = "usb";
> };
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH v2 06/12] arm64: dts: marvell: armada-3270-espressobin: add comphy references
2021-02-10 14:09 [PATCH v2 00/12] Device tree fixes for Armada family kostap
` (4 preceding siblings ...)
2021-02-10 14:09 ` [PATCH v2 05/12] arm64: dts: marvell: armada-3720-db: add comphy references kostap
@ 2021-02-10 14:09 ` kostap
2021-02-11 23:28 ` Pali Rohár
2021-02-10 14:09 ` [PATCH v2 07/12] fix: ARM64: dts: cp110: Switch to 8-bit ECC NAND setting kostap
` (5 subsequent siblings)
11 siblings, 1 reply; 19+ messages in thread
From: kostap @ 2021-02-10 14:09 UTC (permalink / raw)
To: linux-kernel, devicetree, linux-arm-kernel
Cc: linux, robh+dt, sebastian.hesselbarth, gregory.clement, andrew,
mw, jaz, nadavh, stefanc, bpeled, Konstantin Porotchkin
From: Grzegorz Jaszczyk <jaz@semihalf.com>
Add "phys" entries pointing to COMPHYs to PCIe and USB3 nodes
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
---
arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
index daffe136c523..bbd955909813 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
@@ -59,6 +59,8 @@
/* J9 */
&pcie0 {
status = "okay";
+ /* Generic PHY, providing serdes lanes */
+ phys = <&comphy1 0>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
@@ -139,6 +141,9 @@
/* J7 */
&usb3 {
status = "okay";
+ /* Generic PHY, providing serdes lanes */
+ phys = <&comphy0 0>;
+ phy-names = "usb";
};
/* J8 */
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [PATCH v2 06/12] arm64: dts: marvell: armada-3270-espressobin: add comphy references
2021-02-10 14:09 ` [PATCH v2 06/12] arm64: dts: marvell: armada-3270-espressobin: " kostap
@ 2021-02-11 23:28 ` Pali Rohár
0 siblings, 0 replies; 19+ messages in thread
From: Pali Rohár @ 2021-02-11 23:28 UTC (permalink / raw)
To: kostap
Cc: linux-kernel, devicetree, linux-arm-kernel, linux, robh+dt,
sebastian.hesselbarth, gregory.clement, andrew, mw, jaz, nadavh,
stefanc, bpeled
On Wednesday 10 February 2021 16:09:43 kostap@marvell.com wrote:
> From: Grzegorz Jaszczyk <jaz@semihalf.com>
>
> Add "phys" entries pointing to COMPHYs to PCIe and USB3 nodes
>
> Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Hello! This patch is not needed and now does nothing.
> ---
> arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
> index daffe136c523..bbd955909813 100644
> --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
> @@ -59,6 +59,8 @@
> /* J9 */
> &pcie0 {
> status = "okay";
> + /* Generic PHY, providing serdes lanes */
> + phys = <&comphy1 0>;
In mainline kernel is PCIe PHY already provided in armada-37xx.dtsi:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/marvell/armada-37xx.dtsi#n497
> pinctrl-names = "default";
> pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
> reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
> @@ -139,6 +141,9 @@
> /* J7 */
> &usb3 {
> status = "okay";
> + /* Generic PHY, providing serdes lanes */
> + phys = <&comphy0 0>;
> + phy-names = "usb";
In mainline kernel is USB 3.0 PHY already provided in armada-37xx.dtsi:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/marvell/armada-37xx.dtsi#n359
> };
>
> /* J8 */
> --
> 2.17.1
>
So final binary espressobin DTB files are same with and without this
patch.
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH v2 07/12] fix: ARM64: dts: cp110: Switch to 8-bit ECC NAND setting
2021-02-10 14:09 [PATCH v2 00/12] Device tree fixes for Armada family kostap
` (5 preceding siblings ...)
2021-02-10 14:09 ` [PATCH v2 06/12] arm64: dts: marvell: armada-3270-espressobin: " kostap
@ 2021-02-10 14:09 ` kostap
2021-02-10 14:09 ` [PATCH v2 08/12] arm64: dts: marvell: armada-3720-db: add eeprom description kostap
` (4 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: kostap @ 2021-02-10 14:09 UTC (permalink / raw)
To: linux-kernel, devicetree, linux-arm-kernel
Cc: linux, robh+dt, sebastian.hesselbarth, gregory.clement, andrew,
mw, jaz, nadavh, stefanc, bpeled, Konstantin Porotchkin
From: Konstantin Porotchkin <kostap@marvell.com>
All A7K/A8K boards are using NAND chip that supports
8 bit ECC strength. Using lower ECC strength is not recommended
by the flash manufacturer and may cause data corruption.
This patch changes the nand-ecc-strength value from 4 to 8.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
---
arch/arm64/boot/dts/marvell/armada-7040-db.dts | 2 +-
arch/arm64/boot/dts/marvell/armada-8040-db.dts | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/marvell/armada-7040-db.dts b/arch/arm64/boot/dts/marvell/armada-7040-db.dts
index f8179cadc610..39f1d393664f 100644
--- a/arch/arm64/boot/dts/marvell/armada-7040-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-7040-db.dts
@@ -169,7 +169,7 @@
label = "pxa3xx_nand-0";
nand-rb = <0>;
nand-on-flash-bbt;
- nand-ecc-strength = <4>;
+ nand-ecc-strength = <8>;
nand-ecc-step-size = <512>;
partitions {
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-db.dts b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
index 790c7ab0b816..372eda1f8898 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
@@ -281,7 +281,7 @@
reg = <0>;
nand-rb = <0>;
nand-on-flash-bbt;
- nand-ecc-strength = <4>;
+ nand-ecc-strength = <8>;
nand-ecc-step-size = <512>;
partitions {
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v2 08/12] arm64: dts: marvell: armada-3720-db: add eeprom description
2021-02-10 14:09 [PATCH v2 00/12] Device tree fixes for Armada family kostap
` (6 preceding siblings ...)
2021-02-10 14:09 ` [PATCH v2 07/12] fix: ARM64: dts: cp110: Switch to 8-bit ECC NAND setting kostap
@ 2021-02-10 14:09 ` kostap
2021-02-10 14:09 ` [PATCH v2 09/12] dts: a3700: enable dma coherence kostap
` (3 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: kostap @ 2021-02-10 14:09 UTC (permalink / raw)
To: linux-kernel, devicetree, linux-arm-kernel
Cc: linux, robh+dt, sebastian.hesselbarth, gregory.clement, andrew,
mw, jaz, nadavh, stefanc, bpeled, Konstantin Porotchkin
From: Grzegorz Jaszczyk <jaz@semihalf.com>
On Armada 3720 board there is serial emprom M24C64 at address 0x57,
reflect it in device-tree.
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
---
arch/arm64/boot/dts/marvell/armada-3720-db.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
index 15e923f945d4..f2435537c1d3 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
@@ -113,6 +113,12 @@
compatible = "dallas,ds1337";
reg = <0x68>;
};
+
+ eeprom@57 {
+ compatible = "atmel,24c64";
+ reg = <0x57>;
+ pagesize = <32>;
+ };
};
&mdio {
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v2 09/12] dts: a3700: enable dma coherence
2021-02-10 14:09 [PATCH v2 00/12] Device tree fixes for Armada family kostap
` (7 preceding siblings ...)
2021-02-10 14:09 ` [PATCH v2 08/12] arm64: dts: marvell: armada-3720-db: add eeprom description kostap
@ 2021-02-10 14:09 ` kostap
2021-02-10 14:09 ` [PATCH v2 10/12] dts: marvell: add 2 eeprom properties to A8K DB device tree kostap
` (2 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: kostap @ 2021-02-10 14:09 UTC (permalink / raw)
To: linux-kernel, devicetree, linux-arm-kernel
Cc: linux, robh+dt, sebastian.hesselbarth, gregory.clement, andrew,
mw, jaz, nadavh, stefanc, bpeled, Konstantin Porotchkin
From: Stefan Chulski <stefanc@marvell.com>
Enable dma coherence for PCIe and memory-mapped devices
on A3700 platform
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
---
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index d5b6c0a1c54a..c01351172875 100644
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -71,6 +71,7 @@
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
+ dma-coherent;
ranges;
internal-regs@d0000000 {
@@ -486,6 +487,7 @@
#interrupt-cells = <1>;
msi-parent = <&pcie0>;
msi-controller;
+ dma-coherent;
ranges = <0x82000000 0 0xe8000000 0 0xe8000000 0 0x1000000 /* Port 0 MEM */
0x81000000 0 0xe9000000 0 0xe9000000 0 0x10000>; /* Port 0 IO*/
interrupt-map-mask = <0 0 0 7>;
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v2 10/12] dts: marvell: add 2 eeprom properties to A8K DB device tree
2021-02-10 14:09 [PATCH v2 00/12] Device tree fixes for Armada family kostap
` (8 preceding siblings ...)
2021-02-10 14:09 ` [PATCH v2 09/12] dts: a3700: enable dma coherence kostap
@ 2021-02-10 14:09 ` kostap
2021-02-10 14:09 ` [PATCH v2 11/12] dts: marvell: add 2 eeprom properties to A7K " kostap
2021-02-10 14:09 ` [PATCH v2 12/12] arm64: dts: fix the Armada 8040 DB AP SDHCI bus width kostap
11 siblings, 0 replies; 19+ messages in thread
From: kostap @ 2021-02-10 14:09 UTC (permalink / raw)
To: linux-kernel, devicetree, linux-arm-kernel
Cc: linux, robh+dt, sebastian.hesselbarth, gregory.clement, andrew,
mw, jaz, nadavh, stefanc, bpeled, Konstantin Porotchkin
From: Ben Peled <bpeled@marvell.com>
Add on-board i2c EEPROMs U41 and U51
Signed-off-by: Ben Peled <bpeled@marvell.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
---
arch/arm64/boot/dts/marvell/armada-8040-db.dts | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-db.dts b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
index 372eda1f8898..0a3b3afe0e9c 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
@@ -150,6 +150,19 @@
reg = <0x25>;
};
+ /* U51 */
+ eeprom0: eeprom@50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ pagesize = <0x20>;
+ };
+
+ /* U41 */
+ eeprom1: eeprom@57 {
+ compatible = "atmel,24c64";
+ reg = <0x57>;
+ pagesize = <0x20>;
+ };
};
/* CON4 on CP0 expansion */
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v2 11/12] dts: marvell: add 2 eeprom properties to A7K DB device tree
2021-02-10 14:09 [PATCH v2 00/12] Device tree fixes for Armada family kostap
` (9 preceding siblings ...)
2021-02-10 14:09 ` [PATCH v2 10/12] dts: marvell: add 2 eeprom properties to A8K DB device tree kostap
@ 2021-02-10 14:09 ` kostap
2021-02-10 14:09 ` [PATCH v2 12/12] arm64: dts: fix the Armada 8040 DB AP SDHCI bus width kostap
11 siblings, 0 replies; 19+ messages in thread
From: kostap @ 2021-02-10 14:09 UTC (permalink / raw)
To: linux-kernel, devicetree, linux-arm-kernel
Cc: linux, robh+dt, sebastian.hesselbarth, gregory.clement, andrew,
mw, jaz, nadavh, stefanc, bpeled, Konstantin Porotchkin
From: Ben Peled <bpeled@marvell.com>
Add on-board i2c EEPROMs U37 and U38
Signed-off-by: Ben Peled <bpeled@marvell.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
---
arch/arm64/boot/dts/marvell/armada-7040-db.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-7040-db.dts b/arch/arm64/boot/dts/marvell/armada-7040-db.dts
index 39f1d393664f..c8258defa9e5 100644
--- a/arch/arm64/boot/dts/marvell/armada-7040-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-7040-db.dts
@@ -152,6 +152,20 @@
* IO0_7: IO1_7: SDIO_Vcntrl
*/
};
+
+ /* U38 */
+ eeprom0: eeprom@50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ pagesize = <0x20>;
+ };
+
+ /* U37 */
+ eeprom1: eeprom@57 {
+ compatible = "atmel,24c64";
+ reg = <0x57>;
+ pagesize = <0x20>;
+ };
};
&cp0_nand_controller {
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v2 12/12] arm64: dts: fix the Armada 8040 DB AP SDHCI bus width
2021-02-10 14:09 [PATCH v2 00/12] Device tree fixes for Armada family kostap
` (10 preceding siblings ...)
2021-02-10 14:09 ` [PATCH v2 11/12] dts: marvell: add 2 eeprom properties to A7K " kostap
@ 2021-02-10 14:09 ` kostap
11 siblings, 0 replies; 19+ messages in thread
From: kostap @ 2021-02-10 14:09 UTC (permalink / raw)
To: linux-kernel, devicetree, linux-arm-kernel
Cc: linux, robh+dt, sebastian.hesselbarth, gregory.clement, andrew,
mw, jaz, nadavh, stefanc, bpeled, Konstantin Porotchkin
From: Konstantin Porotchkin <kostap@marvell.com>
The AP SDHCI on Armada 8040 DB board utilizes 8-bit data lines.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
---
arch/arm64/boot/dts/marvell/armada-8040-db.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-db.dts b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
index 0a3b3afe0e9c..7559f901ffae 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
@@ -373,7 +373,7 @@
&ap_sdhci0 {
status = "okay";
- bus-width = <4>;
+ bus-width = <8>;
non-removable;
};
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread