* [PATCH v3 1/9] arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip
2021-02-19 14:30 [PATCH v3 0/9] Add peripheral support for imx8mm-nitrogen-r2 board Adrien Grassein
@ 2021-02-19 14:30 ` Adrien Grassein
2021-02-20 19:22 ` Krzysztof Kozlowski
2021-02-19 14:30 ` [PATCH v3 2/9] arm64: dts: imx8mm-nitrogen-r2: add USB support Adrien Grassein
` (7 subsequent siblings)
8 siblings, 1 reply; 13+ messages in thread
From: Adrien Grassein @ 2021-02-19 14:30 UTC (permalink / raw)
Cc: krzk, robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
catalin.marinas, will, devicetree, linux-arm-kernel,
linux-kernel, Adrien Grassein
Add usdhc3 description which corresponds to the wifi/bt chip
Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
---
.../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 38 +++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
index c0c384d76147..4a3dabeb8c85 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
@@ -9,6 +9,24 @@
/ {
model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2";
compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm";
+
+ reg_vref_1v8: regulator-vref-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "vref-1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ reg_wlan_vmmc: regulator-wlan-vmmc {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_reg_wlan_vmmc>;
+ regulator-name = "reg_wlan_vmmc";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
};
&A53_0 {
@@ -206,6 +224,20 @@ &usdhc2 {
status = "okay";
};
+/* wlan */
+&usdhc3 {
+ bus-width = <4>;
+ sdhci-caps-mask = <0x2 0x0>;
+ non-removable;
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc3>;
+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+ vmmc-supply = <®_wlan_vmmc>;
+ vqmmc-supply = <®_vref_1v8>;
+ status = "okay";
+};
+
&wdog1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog>;
@@ -264,6 +296,12 @@ MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x1c0
>;
};
+ pinctrl_reg_wlan_vmmc: reg-wlan-vmmcgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16
+ >;
+ };
+
pinctrl_uart2: uart2grp {
fsl,pins = <
MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH v3 1/9] arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip
2021-02-19 14:30 ` [PATCH v3 1/9] arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip Adrien Grassein
@ 2021-02-20 19:22 ` Krzysztof Kozlowski
0 siblings, 0 replies; 13+ messages in thread
From: Krzysztof Kozlowski @ 2021-02-20 19:22 UTC (permalink / raw)
To: Adrien Grassein
Cc: robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
catalin.marinas, will, devicetree, linux-arm-kernel,
linux-kernel
On Fri, Feb 19, 2021 at 03:30:20PM +0100, Adrien Grassein wrote:
> Add usdhc3 description which corresponds to the wifi/bt chip
>
> Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
> ---
> .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 38 +++++++++++++++++++
> 1 file changed, 38 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> index c0c384d76147..4a3dabeb8c85 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> @@ -9,6 +9,24 @@
> / {
> model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2";
> compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm";
> +
> + reg_vref_1v8: regulator-vref-1v8 {
> + compatible = "regulator-fixed";
> + regulator-name = "vref-1v8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + reg_wlan_vmmc: regulator-wlan-vmmc {
> + compatible = "regulator-fixed";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_reg_wlan_vmmc>;
> + regulator-name = "reg_wlan_vmmc";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + };
> };
>
> &A53_0 {
> @@ -206,6 +224,20 @@ &usdhc2 {
> status = "okay";
> };
>
> +/* wlan */
> +&usdhc3 {
> + bus-width = <4>;
> + sdhci-caps-mask = <0x2 0x0>;
> + non-removable;
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc3>;
> + pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
> + vmmc-supply = <®_wlan_vmmc>;
> + vqmmc-supply = <®_vref_1v8>;
You sent v3 before I replied on your comments. I don't think there is
any benefit in fixed-regulator which cannot be controlled. Are you sure
vqmmc (the bus clock, host interface, controller core?) does not go from
the PMIC?
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v3 2/9] arm64: dts: imx8mm-nitrogen-r2: add USB support
2021-02-19 14:30 [PATCH v3 0/9] Add peripheral support for imx8mm-nitrogen-r2 board Adrien Grassein
2021-02-19 14:30 ` [PATCH v3 1/9] arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip Adrien Grassein
@ 2021-02-19 14:30 ` Adrien Grassein
2021-02-19 14:30 ` [PATCH v3 3/9] arm64: dts: imx8mm-nitrogen-r2: add espi2 support Adrien Grassein
` (6 subsequent siblings)
8 siblings, 0 replies; 13+ messages in thread
From: Adrien Grassein @ 2021-02-19 14:30 UTC (permalink / raw)
Cc: krzk, robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
catalin.marinas, will, devicetree, linux-arm-kernel,
linux-kernel, Adrien Grassein
Add description of USB.
usbotg2 seems to not working on all boards (including ones
from variscite).
Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
---
.../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 42 +++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
index 4a3dabeb8c85..48b3bf4316b8 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
@@ -238,6 +238,34 @@ &usdhc3 {
status = "okay";
};
+/* USB OTG port */
+&usbotg1 {
+ dr_mode = "otg";
+ over-current-active-low;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg1>;
+ power-active-high;
+ status = "okay";
+};
+
+/* USB Host port */
+&usbotg2 {
+ dr_mode = "host";
+ over-current-active-low;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg2>;
+ power-active-high;
+ /*
+ * FIXME: having USB2 enabled hangs the boot just after:
+ *[ 1.655941] ci_hdrc ci_hdrc.1: EHCI Host Controller
+ *[ 1.660880] ci_hdrc ci_hdrc.1: new USB bus registered, assigned bus number 2
+ *[ 1.681505] ci_hdrc ci_hdrc.1: USB 2.0 started, EHCI 1.00
+ *[ 1.687730] hub 2-0:1.0: USB hub found
+ *[ 1.691528] hub 2-0:1.0: 1 port detected
+ */
+ status = "disabled";
+};
+
&wdog1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog>;
@@ -309,6 +337,20 @@ MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
>;
};
+ pinctrl_usbotg1: usbotg1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO12_USB1_OTG_PWR 0x16
+ MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x156
+ >;
+ };
+
+ pinctrl_usbotg2: usbotg2grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO14_USB2_OTG_PWR 0x16
+ MX8MM_IOMUXC_GPIO1_IO15_USB2_OTG_OC 0x15
+ >;
+ };
+
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v3 3/9] arm64: dts: imx8mm-nitrogen-r2: add espi2 support
2021-02-19 14:30 [PATCH v3 0/9] Add peripheral support for imx8mm-nitrogen-r2 board Adrien Grassein
2021-02-19 14:30 ` [PATCH v3 1/9] arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip Adrien Grassein
2021-02-19 14:30 ` [PATCH v3 2/9] arm64: dts: imx8mm-nitrogen-r2: add USB support Adrien Grassein
@ 2021-02-19 14:30 ` Adrien Grassein
2021-02-19 14:30 ` [PATCH v3 4/9] arm64: dts: imx8mm-nitrogen-r2: add UARTs Adrien Grassein
` (5 subsequent siblings)
8 siblings, 0 replies; 13+ messages in thread
From: Adrien Grassein @ 2021-02-19 14:30 UTC (permalink / raw)
Cc: krzk, robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
catalin.marinas, will, devicetree, linux-arm-kernel,
linux-kernel, Adrien Grassein
Add the description for espi support.
Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
---
.../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 22 +++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
index 48b3bf4316b8..af740170569c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
@@ -45,6 +45,19 @@ &A53_3 {
cpu-supply = <®_buck3>;
};
+/* J15 */
+&ecspi2 {
+ assigned-clocks = <&clk IMX8MM_CLK_ECSPI2>;
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_40M>;
+ assigned-clock-rates = <40000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi2>;
+ cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+};
+
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec1>;
@@ -277,6 +290,15 @@ &iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
+ pinctrl_ecspi2: ecspi2grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x140
+ MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x19
+ MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x19
+ MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x19
+ >;
+ };
+
pinctrl_fec1: fec1grp {
fsl,pins = <
MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v3 4/9] arm64: dts: imx8mm-nitrogen-r2: add UARTs
2021-02-19 14:30 [PATCH v3 0/9] Add peripheral support for imx8mm-nitrogen-r2 board Adrien Grassein
` (2 preceding siblings ...)
2021-02-19 14:30 ` [PATCH v3 3/9] arm64: dts: imx8mm-nitrogen-r2: add espi2 support Adrien Grassein
@ 2021-02-19 14:30 ` Adrien Grassein
2021-02-20 19:23 ` Krzysztof Kozlowski
2021-02-19 14:30 ` [PATCH v3 5/9] arm64: dts: imx8mm-nitrogen-r2: rework UART 2 Adrien Grassein
` (4 subsequent siblings)
8 siblings, 1 reply; 13+ messages in thread
From: Adrien Grassein @ 2021-02-19 14:30 UTC (permalink / raw)
Cc: krzk, robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
catalin.marinas, will, devicetree, linux-arm-kernel,
linux-kernel, Adrien Grassein
Add description and pin muxing for UARTs.
Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
---
.../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 48 +++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
index af740170569c..9ef1c4994e8c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
@@ -204,6 +204,14 @@ rtc@68 {
};
};
+/* BT */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ uart-has-rtscts;
+ status = "okay";
+};
+
/* console */
&uart2 {
pinctrl-names = "default";
@@ -213,6 +221,21 @@ &uart2 {
status = "okay";
};
+/* J15 */
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ uart-has-rtscts;
+ status = "okay";
+};
+
+/* J9 */
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+ status = "okay";
+};
+
/* eMMC */
&usdhc1 {
bus-width = <8>;
@@ -352,6 +375,15 @@ MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16
>;
};
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
+ MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
+ MX8MM_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140
+ MX8MM_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140
+ >;
+ };
+
pinctrl_uart2: uart2grp {
fsl,pins = <
MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
@@ -359,6 +391,22 @@ MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
>;
};
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x140
+ MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x140
+ MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x140
+ MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x140
+ >;
+ };
+
+ pinctrl_uart4: uart4grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140
+ MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140
+ >;
+ };
+
pinctrl_usbotg1: usbotg1grp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO12_USB1_OTG_PWR 0x16
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH v3 4/9] arm64: dts: imx8mm-nitrogen-r2: add UARTs
2021-02-19 14:30 ` [PATCH v3 4/9] arm64: dts: imx8mm-nitrogen-r2: add UARTs Adrien Grassein
@ 2021-02-20 19:23 ` Krzysztof Kozlowski
0 siblings, 0 replies; 13+ messages in thread
From: Krzysztof Kozlowski @ 2021-02-20 19:23 UTC (permalink / raw)
To: Adrien Grassein
Cc: robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
catalin.marinas, will, devicetree, linux-arm-kernel,
linux-kernel
On Fri, Feb 19, 2021 at 03:30:23PM +0100, Adrien Grassein wrote:
> Add description and pin muxing for UARTs.
>
> Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
> ---
> .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 48 +++++++++++++++++++
> 1 file changed, 48 insertions(+)
>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v3 5/9] arm64: dts: imx8mm-nitrogen-r2: rework UART 2
2021-02-19 14:30 [PATCH v3 0/9] Add peripheral support for imx8mm-nitrogen-r2 board Adrien Grassein
` (3 preceding siblings ...)
2021-02-19 14:30 ` [PATCH v3 4/9] arm64: dts: imx8mm-nitrogen-r2: add UARTs Adrien Grassein
@ 2021-02-19 14:30 ` Adrien Grassein
2021-02-20 19:54 ` Krzysztof Kozlowski
2021-02-19 14:30 ` [PATCH v3 6/9] arm64: dts: imx8mm-nitrogen-r2: add PWMs Adrien Grassein
` (3 subsequent siblings)
8 siblings, 1 reply; 13+ messages in thread
From: Adrien Grassein @ 2021-02-19 14:30 UTC (permalink / raw)
Cc: krzk, robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
catalin.marinas, will, devicetree, linux-arm-kernel,
linux-kernel, Adrien Grassein
Remove useless clocks in UART 2
Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
---
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
index 9ef1c4994e8c..5c4085a8e76e 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
@@ -216,8 +216,6 @@ &uart1 {
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
- assigned-clocks = <&clk IMX8MM_CLK_UART2>;
- assigned-clock-parents = <&clk IMX8MM_CLK_24M>;
status = "okay";
};
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH v3 5/9] arm64: dts: imx8mm-nitrogen-r2: rework UART 2
2021-02-19 14:30 ` [PATCH v3 5/9] arm64: dts: imx8mm-nitrogen-r2: rework UART 2 Adrien Grassein
@ 2021-02-20 19:54 ` Krzysztof Kozlowski
0 siblings, 0 replies; 13+ messages in thread
From: Krzysztof Kozlowski @ 2021-02-20 19:54 UTC (permalink / raw)
To: Adrien Grassein
Cc: robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
catalin.marinas, will, devicetree, linux-arm-kernel,
linux-kernel
On Fri, Feb 19, 2021 at 03:30:24PM +0100, Adrien Grassein wrote:
> Remove useless clocks in UART 2
>
> Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts | 2 --
> 1 file changed, 2 deletions(-)
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v3 6/9] arm64: dts: imx8mm-nitrogen-r2: add PWMs
2021-02-19 14:30 [PATCH v3 0/9] Add peripheral support for imx8mm-nitrogen-r2 board Adrien Grassein
` (4 preceding siblings ...)
2021-02-19 14:30 ` [PATCH v3 5/9] arm64: dts: imx8mm-nitrogen-r2: rework UART 2 Adrien Grassein
@ 2021-02-19 14:30 ` Adrien Grassein
2021-02-19 14:30 ` [PATCH v3 7/9] arm64: dts: imx8mm-nitrogen-r2: add FlexSPI Adrien Grassein
` (2 subsequent siblings)
8 siblings, 0 replies; 13+ messages in thread
From: Adrien Grassein @ 2021-02-19 14:30 UTC (permalink / raw)
Cc: krzk, robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
catalin.marinas, will, devicetree, linux-arm-kernel,
linux-kernel, Adrien Grassein
Add description for the four PWMs.
Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
---
.../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 51 +++++++++++++++++++
1 file changed, 51 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
index 5c4085a8e76e..9a210ca63731 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
@@ -204,6 +204,33 @@ rtc@68 {
};
};
+&pwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm1>;
+ status = "okay";
+};
+
+&pwm2 {
+ assigned-clocks = <&clk IMX8MM_CLK_PWM2>;
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_40M>;
+ assigned-clock-rates = <40000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm2>;
+ status = "okay";
+};
+
+&pwm3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm3>;
+ status = "okay";
+};
+
+&pwm4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm4>;
+ status = "okay";
+};
+
/* BT */
&uart1 {
pinctrl-names = "default";
@@ -367,6 +394,30 @@ MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x1c0
>;
};
+ pinctrl_pwm1: pwm1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT 0x16
+ >;
+ };
+
+ pinctrl_pwm2: pwm2grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SPDIF_RX_PWM2_OUT 0x16
+ >;
+ };
+
+ pinctrl_pwm3: pwm3grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SPDIF_TX_PWM3_OUT 0x16
+ >;
+ };
+
+ pinctrl_pwm4: pwm4grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SAI3_MCLK_PWM4_OUT 0x16
+ >;
+ };
+
pinctrl_reg_wlan_vmmc: reg-wlan-vmmcgrp {
fsl,pins = <
MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v3 7/9] arm64: dts: imx8mm-nitrogen-r2: add FlexSPI
2021-02-19 14:30 [PATCH v3 0/9] Add peripheral support for imx8mm-nitrogen-r2 board Adrien Grassein
` (5 preceding siblings ...)
2021-02-19 14:30 ` [PATCH v3 6/9] arm64: dts: imx8mm-nitrogen-r2: add PWMs Adrien Grassein
@ 2021-02-19 14:30 ` Adrien Grassein
2021-02-19 14:30 ` [PATCH v3 8/9] arm64: dts: imx8mm-nitrogen-r2: add audio Adrien Grassein
2021-02-19 14:30 ` [PATCH v3 9/9] arm64: defconfig: Enable wm8960 audio driver Adrien Grassein
8 siblings, 0 replies; 13+ messages in thread
From: Adrien Grassein @ 2021-02-19 14:30 UTC (permalink / raw)
Cc: krzk, robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
catalin.marinas, will, devicetree, linux-arm-kernel,
linux-kernel, Adrien Grassein
Add FlexSPI description an pin muxing.
Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
---
.../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
index 9a210ca63731..0fd8e2a54073 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
@@ -78,6 +78,12 @@ ethphy0: ethernet-phy@4 {
};
};
+&flexspi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexspi>;
+ status = "okay";
+};
+
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
@@ -367,6 +373,17 @@ MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x159
>;
};
+ pinctrl_flexspi: flexspigrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2
+ MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82
+ MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
+ MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
+ MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
+ MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
+ >;
+ };
+
pinctrl_hog: hoggrp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x09
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v3 8/9] arm64: dts: imx8mm-nitrogen-r2: add audio
2021-02-19 14:30 [PATCH v3 0/9] Add peripheral support for imx8mm-nitrogen-r2 board Adrien Grassein
` (6 preceding siblings ...)
2021-02-19 14:30 ` [PATCH v3 7/9] arm64: dts: imx8mm-nitrogen-r2: add FlexSPI Adrien Grassein
@ 2021-02-19 14:30 ` Adrien Grassein
2021-02-19 14:30 ` [PATCH v3 9/9] arm64: defconfig: Enable wm8960 audio driver Adrien Grassein
8 siblings, 0 replies; 13+ messages in thread
From: Adrien Grassein @ 2021-02-19 14:30 UTC (permalink / raw)
Cc: krzk, robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
catalin.marinas, will, devicetree, linux-arm-kernel,
linux-kernel, Adrien Grassein
Add audio description and pin muxing.
Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
---
.../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 86 +++++++++++++++++++
1 file changed, 86 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
index 0fd8e2a54073..961818598247 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
@@ -27,6 +27,29 @@ reg_wlan_vmmc: regulator-wlan-vmmc {
gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
+
+ sound-wm8960 {
+ audio-cpu = <&sai1>;
+ audio-codec = <&wm8960>;
+ audio-routing =
+ "Headphone Jack", "HP_L",
+ "Headphone Jack", "HP_R",
+ "Ext Spk", "SPK_LP",
+ "Ext Spk", "SPK_LN",
+ "Ext Spk", "SPK_RP",
+ "Ext Spk", "SPK_RN",
+ "RINPUT1", "Mic Jack",
+ "Mic Jack", "MICB";
+ codec-master;
+ compatible = "fsl,imx-audio-wm8960";
+ /* JD2: hp detect high for headphone*/
+ hp-det-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
+ /* Jack is not stuffed */
+ mic-det-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
+ model = "wm8960-audio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sound_wm8960>;
+ };
};
&A53_0 {
@@ -210,6 +233,22 @@ rtc@68 {
};
};
+&i2c4 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c4>;
+ status = "okay";
+
+ wm8960: codec@1a {
+ compatible = "wlf,wm8960";
+ reg = <0x1a>;
+ clocks = <&clk IMX8MM_CLK_SAI1_ROOT>;
+ clock-names = "mclk1";
+ wlf,shared-lrclk;
+ #sound-dai-cells = <0>;
+ };
+};
+
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
@@ -237,6 +276,18 @@ &pwm4 {
status = "okay";
};
+&sai1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sai1>;
+ status = "okay";
+};
+
+&sai2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sai2>;
+ status = "okay";
+};
+
/* BT */
&uart1 {
pinctrl-names = "default";
@@ -405,6 +456,13 @@ MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
>;
};
+ pinctrl_i2c4: i2c4grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3
+ MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3
+ >;
+ };
+
pinctrl_i2c3a_rv4162: i2c3a-rv4162grp {
fsl,pins = <
MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x1c0
@@ -441,6 +499,34 @@ MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16
>;
};
+ pinctrl_sai1: sai1grp {
+ fsl,pins = <
+ /* wm8960 */
+ MX8MM_IOMUXC_SAI1_MCLK_SAI1_MCLK 0xd6
+ MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC 0xd6
+ MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK 0xd6
+ MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0 0xd6
+ MX8MM_IOMUXC_SAI1_RXD0_SAI1_RX_DATA0 0xd6
+ >;
+ };
+
+ pinctrl_sai2: sai2grp {
+ fsl,pins = <
+ /* Bluetooth PCM */
+ MX8MM_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6
+ MX8MM_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6
+ MX8MM_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6
+ MX8MM_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6
+ >;
+ };
+
+ pinctrl_sound_wm8960: sound-wm8960grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x80
+ MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x80
+ >;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins = <
MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v3 9/9] arm64: defconfig: Enable wm8960 audio driver.
2021-02-19 14:30 [PATCH v3 0/9] Add peripheral support for imx8mm-nitrogen-r2 board Adrien Grassein
` (7 preceding siblings ...)
2021-02-19 14:30 ` [PATCH v3 8/9] arm64: dts: imx8mm-nitrogen-r2: add audio Adrien Grassein
@ 2021-02-19 14:30 ` Adrien Grassein
8 siblings, 0 replies; 13+ messages in thread
From: Adrien Grassein @ 2021-02-19 14:30 UTC (permalink / raw)
Cc: krzk, robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
catalin.marinas, will, devicetree, linux-arm-kernel,
linux-kernel, Adrien Grassein
This driver is used by the Nitrogen8m Mini SBC.
Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 292c00f893fc..bd310e91d4ed 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -764,6 +764,7 @@ CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m
CONFIG_SND_SOC_TAS571X=m
CONFIG_SND_SOC_WCD934X=m
CONFIG_SND_SOC_WM8904=m
+CONFIG_SND_SOC_WM8960=m
CONFIG_SND_SOC_WM8962=m
CONFIG_SND_SOC_WSA881X=m
CONFIG_SND_SOC_LPASS_WSA_MACRO=m
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread