* [PATCH] arm64: Add part number for Arm Cortex-A78
@ 2021-02-17 16:44 Neeraj Upadhyay
2021-02-17 17:06 ` Will Deacon
0 siblings, 1 reply; 4+ messages in thread
From: Neeraj Upadhyay @ 2021-02-17 16:44 UTC (permalink / raw)
To: catalin.marinas, will, saiprakash.ranjan, robh, konrad.dybcio
Cc: linux-arm-kernel, linux-kernel, Neeraj Upadhyay
Add the MIDR part number info for the Arm Cortex-A78.
Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
---
arch/arm64/include/asm/cputype.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index ef5b040..3aced88 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -72,6 +72,7 @@
#define ARM_CPU_PART_CORTEX_A76 0xD0B
#define ARM_CPU_PART_NEOVERSE_N1 0xD0C
#define ARM_CPU_PART_CORTEX_A77 0xD0D
+#define ARM_CPU_PART_CORTEX_A78 0xD41
#define APM_CPU_PART_POTENZA 0x000
@@ -109,6 +110,7 @@
#define MIDR_CORTEX_A76 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A76)
#define MIDR_NEOVERSE_N1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N1)
#define MIDR_CORTEX_A77 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A77)
+#define MIDR_CORTEX_A78 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78)
#define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
#define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
#define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] arm64: Add part number for Arm Cortex-A78
2021-02-17 16:44 [PATCH] arm64: Add part number for Arm Cortex-A78 Neeraj Upadhyay
@ 2021-02-17 17:06 ` Will Deacon
2021-02-17 18:07 ` Neeraj Upadhyay
0 siblings, 1 reply; 4+ messages in thread
From: Will Deacon @ 2021-02-17 17:06 UTC (permalink / raw)
To: Neeraj Upadhyay
Cc: catalin.marinas, saiprakash.ranjan, robh, konrad.dybcio,
linux-arm-kernel, linux-kernel
On Wed, Feb 17, 2021 at 10:14:11PM +0530, Neeraj Upadhyay wrote:
> Add the MIDR part number info for the Arm Cortex-A78.
>
> Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
> ---
> arch/arm64/include/asm/cputype.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
> index ef5b040..3aced88 100644
> --- a/arch/arm64/include/asm/cputype.h
> +++ b/arch/arm64/include/asm/cputype.h
> @@ -72,6 +72,7 @@
> #define ARM_CPU_PART_CORTEX_A76 0xD0B
> #define ARM_CPU_PART_NEOVERSE_N1 0xD0C
> #define ARM_CPU_PART_CORTEX_A77 0xD0D
> +#define ARM_CPU_PART_CORTEX_A78 0xD41
>
> #define APM_CPU_PART_POTENZA 0x000
>
> @@ -109,6 +110,7 @@
> #define MIDR_CORTEX_A76 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A76)
> #define MIDR_NEOVERSE_N1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N1)
> #define MIDR_CORTEX_A77 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A77)
> +#define MIDR_CORTEX_A78 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78)
> #define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
> #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
> #define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)
This usually means there's an erratum to work around. What are you hiding ;)
Will
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] arm64: Add part number for Arm Cortex-A78
2021-02-17 17:06 ` Will Deacon
@ 2021-02-17 18:07 ` Neeraj Upadhyay
2021-02-19 17:52 ` Will Deacon
0 siblings, 1 reply; 4+ messages in thread
From: Neeraj Upadhyay @ 2021-02-17 18:07 UTC (permalink / raw)
To: Will Deacon
Cc: catalin.marinas, saiprakash.ranjan, robh, konrad.dybcio,
linux-arm-kernel, linux-kernel
On 2/17/2021 10:36 PM, Will Deacon wrote:
> On Wed, Feb 17, 2021 at 10:14:11PM +0530, Neeraj Upadhyay wrote:
>> Add the MIDR part number info for the Arm Cortex-A78.
>>
>> Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
>> ---
>> arch/arm64/include/asm/cputype.h | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
>> index ef5b040..3aced88 100644
>> --- a/arch/arm64/include/asm/cputype.h
>> +++ b/arch/arm64/include/asm/cputype.h
>> @@ -72,6 +72,7 @@
>> #define ARM_CPU_PART_CORTEX_A76 0xD0B
>> #define ARM_CPU_PART_NEOVERSE_N1 0xD0C
>> #define ARM_CPU_PART_CORTEX_A77 0xD0D
>> +#define ARM_CPU_PART_CORTEX_A78 0xD41
>>
>> #define APM_CPU_PART_POTENZA 0x000
>>
>> @@ -109,6 +110,7 @@
>> #define MIDR_CORTEX_A76 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A76)
>> #define MIDR_NEOVERSE_N1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N1)
>> #define MIDR_CORTEX_A77 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A77)
>> +#define MIDR_CORTEX_A78 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78)
>> #define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
>> #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
>> #define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)
>
> This usually means there's an erratum to work around. What are you hiding ;)
>
> Will
>
:) . This is needed for supporting implementation defined AMU counters
in A78 [1]. However, there is no upstream user of it.
[1] https://www.spinics.net/lists/arm-kernel/msg856989.html
Thanks
Neeraj
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a
member of the Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] arm64: Add part number for Arm Cortex-A78
2021-02-17 18:07 ` Neeraj Upadhyay
@ 2021-02-19 17:52 ` Will Deacon
0 siblings, 0 replies; 4+ messages in thread
From: Will Deacon @ 2021-02-19 17:52 UTC (permalink / raw)
To: Neeraj Upadhyay
Cc: catalin.marinas, saiprakash.ranjan, robh, konrad.dybcio,
linux-arm-kernel, linux-kernel
On Wed, Feb 17, 2021 at 11:37:04PM +0530, Neeraj Upadhyay wrote:
>
>
> On 2/17/2021 10:36 PM, Will Deacon wrote:
> > On Wed, Feb 17, 2021 at 10:14:11PM +0530, Neeraj Upadhyay wrote:
> > > Add the MIDR part number info for the Arm Cortex-A78.
> > >
> > > Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
> > > ---
> > > arch/arm64/include/asm/cputype.h | 2 ++
> > > 1 file changed, 2 insertions(+)
> > >
> > > diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
> > > index ef5b040..3aced88 100644
> > > --- a/arch/arm64/include/asm/cputype.h
> > > +++ b/arch/arm64/include/asm/cputype.h
> > > @@ -72,6 +72,7 @@
> > > #define ARM_CPU_PART_CORTEX_A76 0xD0B
> > > #define ARM_CPU_PART_NEOVERSE_N1 0xD0C
> > > #define ARM_CPU_PART_CORTEX_A77 0xD0D
> > > +#define ARM_CPU_PART_CORTEX_A78 0xD41
> > > #define APM_CPU_PART_POTENZA 0x000
> > > @@ -109,6 +110,7 @@
> > > #define MIDR_CORTEX_A76 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A76)
> > > #define MIDR_NEOVERSE_N1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N1)
> > > #define MIDR_CORTEX_A77 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A77)
> > > +#define MIDR_CORTEX_A78 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78)
> > > #define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
> > > #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
> > > #define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)
> >
> > This usually means there's an erratum to work around. What are you hiding ;)
> >
> > Will
> >
>
> :) . This is needed for supporting implementation defined AMU counters in
> A78 [1]. However, there is no upstream user of it.
I don't think we should add this upstream without a user.
Will
^ permalink raw reply [flat|nested] 4+ messages in thread
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2021-02-17 16:44 [PATCH] arm64: Add part number for Arm Cortex-A78 Neeraj Upadhyay
2021-02-17 17:06 ` Will Deacon
2021-02-17 18:07 ` Neeraj Upadhyay
2021-02-19 17:52 ` Will Deacon
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