From: Benjamin Gaignard <benjamin.gaignard@collabora.com>
To: ezequiel@collabora.com, p.zabel@pengutronix.de,
mchehab@kernel.org, robh+dt@kernel.org, shawnguo@kernel.org,
s.hauer@pengutronix.de, kernel@pengutronix.de,
festevam@gmail.com, linux-imx@nxp.com,
gregkh@linuxfoundation.org, mripard@kernel.org,
paul.kocialkowski@bootlin.com, wens@csie.org,
jernej.skrabec@siol.net, peng.fan@nxp.com,
hverkuil-cisco@xs4all.nl, dan.carpenter@oracle.com
Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@collabora.com,
Benjamin Gaignard <benjamin.gaignard@collabora.com>
Subject: [PATCH v4 11/11] arm64: dts: imx8mq: Add node to G2 hardware
Date: Wed, 3 Mar 2021 12:39:52 +0100 [thread overview]
Message-ID: <20210303113952.178519-12-benjamin.gaignard@collabora.com> (raw)
In-Reply-To: <20210303113952.178519-1-benjamin.gaignard@collabora.com>
Split VPU node in two: one for G1 and one for G2 since they are
different hardware blocks.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
version 4:
- rebase the change on top of VPU reset patches:
https://www.spinics.net/lists/arm-kernel/msg878440.html
version 2:
- remove useless clocks in VPUs nodes
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 41 +++++++++++++++++------
1 file changed, 31 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index d9d9efc8592d..8358e214d696 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -1287,17 +1287,15 @@ vpu_reset: vpu-reset@38320000 {
#reset-cells = <1>;
};
- vpu: video-codec@38300000 {
+ vpu_g1: video-codec@38300000 {
compatible = "nxp,imx8mq-vpu";
- reg = <0x38300000 0x10000>,
- <0x38310000 0x10000>;
- reg-names = "g1", "g2";
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "g1", "g2";
+ reg = <0x38300000 0x10000>;
+ reg-names = "g1";
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "g1";
clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
- <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
- clock-names = "g1", "g2";
+ <&clk IMX8MQ_CLK_VPU_DEC_ROOT>;
+ clock-names = "g1", "bus";
assigned-clocks = <&clk IMX8MQ_CLK_VPU_G1>,
<&clk IMX8MQ_CLK_VPU_G2>,
<&clk IMX8MQ_CLK_VPU_BUS>,
@@ -1306,12 +1304,35 @@ vpu: video-codec@38300000 {
<&clk IMX8MQ_VPU_PLL_OUT>,
<&clk IMX8MQ_SYS1_PLL_800M>,
<&clk IMX8MQ_VPU_PLL>;
- assigned-clock-rates = <600000000>, <600000000>,
+ assigned-clock-rates = <600000000>, <300000000>,
<800000000>, <0>;
resets = <&vpu_reset IMX8MQ_RESET_VPU_RESET_G1>;
power-domains = <&pgc_vpu>;
};
+ vpu_g2: video-codec@38310000 {
+ compatible = "nxp,imx8mq-vpu-g2";
+ reg = <0x38310000 0x10000>;
+ reg-names = "g2";
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "g2";
+ clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>,
+ <&clk IMX8MQ_CLK_VPU_DEC_ROOT>;
+ clock-names = "g2", "bus";
+ assigned-clocks = <&clk IMX8MQ_CLK_VPU_G1>,
+ <&clk IMX8MQ_CLK_VPU_G2>,
+ <&clk IMX8MQ_CLK_VPU_BUS>,
+ <&clk IMX8MQ_VPU_PLL_BYPASS>;
+ assigned-clock-parents = <&clk IMX8MQ_VPU_PLL_OUT>,
+ <&clk IMX8MQ_VPU_PLL_OUT>,
+ <&clk IMX8MQ_SYS1_PLL_800M>,
+ <&clk IMX8MQ_VPU_PLL>;
+ assigned-clock-rates = <600000000>, <300000000>,
+ <800000000>, <0>;
+ resets = <&vpu_reset IMX8MQ_RESET_VPU_RESET_G2>;
+ power-domains = <&pgc_vpu>;
+ };
+
pcie0: pcie@33800000 {
compatible = "fsl,imx8mq-pcie";
reg = <0x33800000 0x400000>,
--
2.25.1
prev parent reply other threads:[~2021-03-03 16:22 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-03 11:39 [PATCH v4 00/11] Add HANTRO G2/HEVC decoder support for IMX8MQ Benjamin Gaignard
2021-03-03 11:39 ` [PATCH v4 01/11] media: hevc: Add fields and flags for hevc PPS Benjamin Gaignard
2021-03-03 11:39 ` [PATCH v4 02/11] media: hevc: Add decode params control Benjamin Gaignard
2021-03-03 11:39 ` [PATCH v4 03/11] media: hantro: change hantro_codec_ops run prototype to return errors Benjamin Gaignard
2021-03-03 21:56 ` Ezequiel Garcia
2021-03-05 9:24 ` Benjamin Gaignard
2021-03-03 11:39 ` [PATCH v4 04/11] media: hantro: Define HEVC codec profiles and supported features Benjamin Gaignard
2021-03-03 11:39 ` [PATCH v4 05/11] media: hantro: Add a field to distinguish the hardware versions Benjamin Gaignard
2021-03-03 22:05 ` Ezequiel Garcia
2021-03-05 9:27 ` Benjamin Gaignard
2021-03-03 11:39 ` [PATCH v4 06/11] media: uapi: Add a control for HANTRO driver Benjamin Gaignard
2021-03-03 11:39 ` [PATCH v4 07/11] media: hantro: Introduce G2/HEVC decoder Benjamin Gaignard
2021-03-16 18:46 ` Ezequiel Garcia
2021-03-16 20:19 ` Benjamin Gaignard
2021-03-16 20:35 ` Ezequiel Garcia
2021-03-03 11:39 ` [PATCH v4 08/11] media: hantro: handle V4L2_PIX_FMT_HEVC_SLICE control Benjamin Gaignard
2021-03-03 11:39 ` [PATCH v4 09/11] media: hantro: IMX8M: add variant for G2/HEVC codec Benjamin Gaignard
2021-03-03 22:08 ` Ezequiel Garcia
2021-03-05 9:32 ` Benjamin Gaignard
2021-03-03 11:39 ` [PATCH v4 10/11] dt-bindings: media: nxp,imx8mq-vpu: Update bindings Benjamin Gaignard
2021-03-08 20:08 ` Rob Herring
2021-03-03 11:39 ` Benjamin Gaignard [this message]
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