* [RFT 0/3] clk: socfpga: minor cleanups and compile testing
@ 2021-03-08 18:23 Krzysztof Kozlowski
2021-03-08 18:23 ` [PATCH 1/3] clk: socfpga: allow building N5X clocks with ARCH_N5X Krzysztof Kozlowski
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Krzysztof Kozlowski @ 2021-03-08 18:23 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, Dinh Nguyen, linux-kernel,
linux-clk, Arnd Bergmann
Cc: linux-arm-kernel, Krzysztof Kozlowski
Hi,
A fix, cleanup and finally compile testing for SoCFPGA clock drivers.
I don't expect any functional impact, however please test on real
hardware.
I tested compile builds on few configuratins, so I hope kbuild 0-day
will check more options (please give it few days on the lists).
Best regards,
Krzysztof
Krzysztof Kozlowski (3):
clk: socfpga: allow building N5X clocks with ARCH_N5X
clk: socfpga: drop duplicated lines in Makefile
clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile | 4 +---
drivers/clk/socfpga/Kconfig | 23 +++++++++++++++++++++++
drivers/clk/socfpga/Makefile | 5 ++---
4 files changed, 27 insertions(+), 6 deletions(-)
create mode 100644 drivers/clk/socfpga/Kconfig
--
2.25.1
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH 1/3] clk: socfpga: allow building N5X clocks with ARCH_N5X
2021-03-08 18:23 [RFT 0/3] clk: socfpga: minor cleanups and compile testing Krzysztof Kozlowski
@ 2021-03-08 18:23 ` Krzysztof Kozlowski
2021-03-08 18:23 ` [PATCH 2/3] clk: socfpga: drop duplicated lines in Makefile Krzysztof Kozlowski
2021-03-08 18:23 ` [PATCH 3/3] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks Krzysztof Kozlowski
2 siblings, 0 replies; 7+ messages in thread
From: Krzysztof Kozlowski @ 2021-03-08 18:23 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, Dinh Nguyen, linux-kernel,
linux-clk, Arnd Bergmann
Cc: linux-arm-kernel, Krzysztof Kozlowski
The Intel's eASIC N5X (ARCH_N5X) architecture shares a lot with Agilex
(ARCH_AGILEX) so it uses the same socfpga_agilex.dtsi, with minor
changes. Also the clock drivers are the same.
However the clock drivers won't be build without ARCH_AGILEX. One could
assume that ARCH_N5X simply depends on ARCH_AGILEX but this was not
modeled in Kconfig. In current stage the ARCH_N5X is simply
unbootable.
Add a separate Kconfig entry for clocks used by both ARCH_N5X and
ARCH_AGILEX so the necessary objects will be built if either of them is
selected.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile | 1 +
drivers/clk/socfpga/Kconfig | 6 ++++++
drivers/clk/socfpga/Makefile | 4 ++--
4 files changed, 10 insertions(+), 2 deletions(-)
create mode 100644 drivers/clk/socfpga/Kconfig
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index a588d56502d4..1d1891b9cad2 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -394,6 +394,7 @@ source "drivers/clk/renesas/Kconfig"
source "drivers/clk/rockchip/Kconfig"
source "drivers/clk/samsung/Kconfig"
source "drivers/clk/sifive/Kconfig"
+source "drivers/clk/socfpga/Kconfig"
source "drivers/clk/sprd/Kconfig"
source "drivers/clk/sunxi/Kconfig"
source "drivers/clk/sunxi-ng/Kconfig"
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index b22ae4f81e0b..12e46b12e587 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -106,6 +106,7 @@ obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/
obj-$(CONFIG_CLK_SIFIVE) += sifive/
obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/
obj-$(CONFIG_ARCH_AGILEX) += socfpga/
+obj-$(CONFIG_ARCH_N5X) += socfpga/
obj-$(CONFIG_ARCH_STRATIX10) += socfpga/
obj-$(CONFIG_PLAT_SPEAR) += spear/
obj-y += sprd/
diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig
new file mode 100644
index 000000000000..cae6fd9fac64
--- /dev/null
+++ b/drivers/clk/socfpga/Kconfig
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0
+config COMMON_CLK_AGILEX
+ bool
+ # Intel Agilex / N5X clock controller support
+ default y if ARCH_AGILEX || ARCH_N5X
+ depends on ARCH_AGILEX || ARCH_N5X
diff --git a/drivers/clk/socfpga/Makefile b/drivers/clk/socfpga/Makefile
index bf736f8d201a..e3614f758184 100644
--- a/drivers/clk/socfpga/Makefile
+++ b/drivers/clk/socfpga/Makefile
@@ -3,5 +3,5 @@ obj-$(CONFIG_ARCH_SOCFPGA) += clk.o clk-gate.o clk-pll.o clk-periph.o
obj-$(CONFIG_ARCH_SOCFPGA) += clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o
obj-$(CONFIG_ARCH_STRATIX10) += clk-s10.o
obj-$(CONFIG_ARCH_STRATIX10) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o
-obj-$(CONFIG_ARCH_AGILEX) += clk-agilex.o
-obj-$(CONFIG_ARCH_AGILEX) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o
+obj-$(CONFIG_COMMON_CLK_AGILEX) += clk-agilex.o
+obj-$(CONFIG_COMMON_CLK_AGILEX) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o
--
2.25.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/3] clk: socfpga: drop duplicated lines in Makefile
2021-03-08 18:23 [RFT 0/3] clk: socfpga: minor cleanups and compile testing Krzysztof Kozlowski
2021-03-08 18:23 ` [PATCH 1/3] clk: socfpga: allow building N5X clocks with ARCH_N5X Krzysztof Kozlowski
@ 2021-03-08 18:23 ` Krzysztof Kozlowski
2021-03-08 18:23 ` [PATCH 3/3] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks Krzysztof Kozlowski
2 siblings, 0 replies; 7+ messages in thread
From: Krzysztof Kozlowski @ 2021-03-08 18:23 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, Dinh Nguyen, linux-kernel,
linux-clk, Arnd Bergmann
Cc: linux-arm-kernel, Krzysztof Kozlowski
Three clock drivers are used by Stratix 10, Agilex and N5X, so use
separate dedicated Kconfig entry to get rid of duplicated Makefile
lines. This will also allow later compile testing.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
drivers/clk/socfpga/Kconfig | 7 +++++++
drivers/clk/socfpga/Makefile | 3 +--
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig
index cae6fd9fac64..4922cc35f4cc 100644
--- a/drivers/clk/socfpga/Kconfig
+++ b/drivers/clk/socfpga/Kconfig
@@ -1,6 +1,13 @@
# SPDX-License-Identifier: GPL-2.0
+config COMMON_CLK_STRATIX10
+ bool
+ # Intel Stratix / Agilex / N5X clock controller support
+ default y if ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10
+ depends on ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10
+
config COMMON_CLK_AGILEX
bool
# Intel Agilex / N5X clock controller support
default y if ARCH_AGILEX || ARCH_N5X
depends on ARCH_AGILEX || ARCH_N5X
+ select COMMON_CLK_STRATIX10
diff --git a/drivers/clk/socfpga/Makefile b/drivers/clk/socfpga/Makefile
index e3614f758184..8a875de971fc 100644
--- a/drivers/clk/socfpga/Makefile
+++ b/drivers/clk/socfpga/Makefile
@@ -2,6 +2,5 @@
obj-$(CONFIG_ARCH_SOCFPGA) += clk.o clk-gate.o clk-pll.o clk-periph.o
obj-$(CONFIG_ARCH_SOCFPGA) += clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o
obj-$(CONFIG_ARCH_STRATIX10) += clk-s10.o
-obj-$(CONFIG_ARCH_STRATIX10) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o
+obj-$(CONFIG_COMMON_CLK_STRATIX10) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o
obj-$(CONFIG_COMMON_CLK_AGILEX) += clk-agilex.o
-obj-$(CONFIG_COMMON_CLK_AGILEX) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o
--
2.25.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 3/3] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks
2021-03-08 18:23 [RFT 0/3] clk: socfpga: minor cleanups and compile testing Krzysztof Kozlowski
2021-03-08 18:23 ` [PATCH 1/3] clk: socfpga: allow building N5X clocks with ARCH_N5X Krzysztof Kozlowski
2021-03-08 18:23 ` [PATCH 2/3] clk: socfpga: drop duplicated lines in Makefile Krzysztof Kozlowski
@ 2021-03-08 18:23 ` Krzysztof Kozlowski
2021-03-09 8:49 ` Krzysztof Kozlowski
2 siblings, 1 reply; 7+ messages in thread
From: Krzysztof Kozlowski @ 2021-03-08 18:23 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, Dinh Nguyen, linux-kernel,
linux-clk, Arnd Bergmann
Cc: linux-arm-kernel, Krzysztof Kozlowski
The Stratix 10 / Agilex / N5X clocks do not use anything other than OF
or COMMON_CLK so they should be compile testable on most of the
platforms.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
drivers/clk/Makefile | 5 +----
drivers/clk/socfpga/Kconfig | 22 ++++++++++++++++------
2 files changed, 17 insertions(+), 10 deletions(-)
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 12e46b12e587..9b582b3fca34 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -104,10 +104,7 @@ obj-y += renesas/
obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/
obj-$(CONFIG_CLK_SIFIVE) += sifive/
-obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/
-obj-$(CONFIG_ARCH_AGILEX) += socfpga/
-obj-$(CONFIG_ARCH_N5X) += socfpga/
-obj-$(CONFIG_ARCH_STRATIX10) += socfpga/
+obj-y += socfpga/
obj-$(CONFIG_PLAT_SPEAR) += spear/
obj-y += sprd/
obj-$(CONFIG_ARCH_STI) += st/
diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig
index 4922cc35f4cc..de7b3137e215 100644
--- a/drivers/clk/socfpga/Kconfig
+++ b/drivers/clk/socfpga/Kconfig
@@ -1,13 +1,23 @@
# SPDX-License-Identifier: GPL-2.0
+config COMMON_CLK_SOCFPGA
+ bool "Intel SoCFPGA family clock support" if COMPILE_TEST
+ depends on ARCH_AGILEX || ARCH_N5X || ARCH_SOCFPGA || ARCH_STRATIX10 || COMPILE_TEST
+ default y if ARCH_AGILEX || ARCH_N5X || ARCH_SOCFPGA || ARCH_STRATIX10
+ help
+ Support for the clock controllers present on Intel SoCFPGA and eASIC
+ devices like Stratix 10, Agilex and N5X eASIC.
+
+if COMMON_CLK_SOCFPGA
+
config COMMON_CLK_STRATIX10
- bool
- # Intel Stratix / Agilex / N5X clock controller support
+ bool "Intel Stratix / Agilex / N5X clock controller support" if COMPILE_TEST
default y if ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10
- depends on ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10
+ depends on ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10 || COMPILE_TEST
config COMMON_CLK_AGILEX
- bool
- # Intel Agilex / N5X clock controller support
+ bool "Intel Agilex / N5X clock controller support" if COMPILE_TEST
default y if ARCH_AGILEX || ARCH_N5X
- depends on ARCH_AGILEX || ARCH_N5X
+ depends on ARCH_AGILEX || ARCH_N5X || COMPILE_TEST
select COMMON_CLK_STRATIX10
+
+endif # COMMON_CLK_SOCFPGA
--
2.25.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 3/3] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks
2021-03-08 18:23 ` [PATCH 3/3] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks Krzysztof Kozlowski
@ 2021-03-09 8:49 ` Krzysztof Kozlowski
2021-03-09 9:02 ` Krzysztof Kozlowski
0 siblings, 1 reply; 7+ messages in thread
From: Krzysztof Kozlowski @ 2021-03-09 8:49 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, Dinh Nguyen, linux-kernel,
linux-clk, Arnd Bergmann
Cc: linux-arm-kernel
On 08/03/2021 19:23, Krzysztof Kozlowski wrote:
> The Stratix 10 / Agilex / N5X clocks do not use anything other than OF
> or COMMON_CLK so they should be compile testable on most of the
> platforms.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> ---
> drivers/clk/Makefile | 5 +----
> drivers/clk/socfpga/Kconfig | 22 ++++++++++++++++------
> 2 files changed, 17 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
> index 12e46b12e587..9b582b3fca34 100644
> --- a/drivers/clk/Makefile
> +++ b/drivers/clk/Makefile
> @@ -104,10 +104,7 @@ obj-y += renesas/
> obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
> obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/
> obj-$(CONFIG_CLK_SIFIVE) += sifive/
> -obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/
> -obj-$(CONFIG_ARCH_AGILEX) += socfpga/
> -obj-$(CONFIG_ARCH_N5X) += socfpga/
> -obj-$(CONFIG_ARCH_STRATIX10) += socfpga/
> +obj-y += socfpga/
> obj-$(CONFIG_PLAT_SPEAR) += spear/
> obj-y += sprd/
> obj-$(CONFIG_ARCH_STI) += st/
> diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig
> index 4922cc35f4cc..de7b3137e215 100644
> --- a/drivers/clk/socfpga/Kconfig
> +++ b/drivers/clk/socfpga/Kconfig
> @@ -1,13 +1,23 @@
> # SPDX-License-Identifier: GPL-2.0
> +config COMMON_CLK_SOCFPGA
> + bool "Intel SoCFPGA family clock support" if COMPILE_TEST
Kernel test robot found here wrong configuration - possibility to
disable the clocks with compile test. I'll send a v2.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 3/3] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks
2021-03-09 8:49 ` Krzysztof Kozlowski
@ 2021-03-09 9:02 ` Krzysztof Kozlowski
2021-03-09 10:11 ` Arnd Bergmann
0 siblings, 1 reply; 7+ messages in thread
From: Krzysztof Kozlowski @ 2021-03-09 9:02 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, Dinh Nguyen, linux-kernel,
linux-clk, Arnd Bergmann
Cc: linux-arm-kernel
On 09/03/2021 09:49, Krzysztof Kozlowski wrote:
> On 08/03/2021 19:23, Krzysztof Kozlowski wrote:
>> The Stratix 10 / Agilex / N5X clocks do not use anything other
>> than OF or COMMON_CLK so they should be compile testable on most of
>> the platforms.
>>
>> Signed-off-by: Krzysztof Kozlowski
>> <krzysztof.kozlowski@canonical.com> --- drivers/clk/Makefile | 5
>> +---- drivers/clk/socfpga/Kconfig | 22 ++++++++++++++++------ 2
>> files changed, 17 insertions(+), 10 deletions(-)
>>
>> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index
>> 12e46b12e587..9b582b3fca34 100644 --- a/drivers/clk/Makefile +++
>> b/drivers/clk/Makefile @@ -104,10 +104,7 @@ obj-y += renesas/
>> obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
>> obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/
>> obj-$(CONFIG_CLK_SIFIVE) += sifive/ -obj-$(CONFIG_ARCH_SOCFPGA) +=
>> socfpga/ -obj-$(CONFIG_ARCH_AGILEX) += socfpga/
>> -obj-$(CONFIG_ARCH_N5X) += socfpga/
>> -obj-$(CONFIG_ARCH_STRATIX10) += socfpga/ +obj-y += socfpga/
>> obj-$(CONFIG_PLAT_SPEAR) += spear/ obj-y += sprd/
>> obj-$(CONFIG_ARCH_STI) += st/ diff --git
>> a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig index
>> 4922cc35f4cc..de7b3137e215 100644 --- a/drivers/clk/socfpga/Kconfig
>> +++ b/drivers/clk/socfpga/Kconfig @@ -1,13 +1,23 @@ #
>> SPDX-License-Identifier: GPL-2.0 +config COMMON_CLK_SOCFPGA + bool
>> "Intel SoCFPGA family clock support" if COMPILE_TEST
>
> Kernel test robot found here wrong configuration - possibility to
> disable the clocks with compile test. I'll send a v2.
Uh, that's not that easy. Intel created three different arm64 architectures
for one real arm64 architecture... I guess it was driven by
the marketing but here we are - the solution would be to have entries like:
bool "Intel SoCFPGA family clock support" if COMPILE_TEST && !ARCH_AGILEX && !ARCH_N5X && !ARCH_SOCFPGA && !ARCH_STRATIX10
...
bool "Intel Stratix / Agilex / N5X clock controller support" if COMPILE_TEST && !ARCH_AGILEX && !ARCH_N5X && !ARCH_STRATIX10
...
bool "Intel Agilex / N5X clock controller support" if COMPILE_TEST && !ARCH_AGILEX && !ARCH_N5X
...
I think it looks wrong. The stratix/agilex/n5x are basically flavors of
socfpga from Linux point of view. This is the same architecture for Linux
kernel, from high level point of view. Instead of going with unified ARCH_SOCFPGA
(like all other platforms, e.g. Renesas, NXP), the Intel create three
different kernel-wide arm64 ARCH_xxx symbols.
It's too much. How about converting all these arm64 Intel platforms to ARCH_SOCFPGA?
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 3/3] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks
2021-03-09 9:02 ` Krzysztof Kozlowski
@ 2021-03-09 10:11 ` Arnd Bergmann
0 siblings, 0 replies; 7+ messages in thread
From: Arnd Bergmann @ 2021-03-09 10:11 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Michael Turquette, Stephen Boyd, Dinh Nguyen, linux-kernel,
linux-clk, Linux ARM
On Tue, Mar 9, 2021 at 10:02 AM Krzysztof Kozlowski
<krzysztof.kozlowski@canonical.com> wrote:
> >
> > Kernel test robot found here wrong configuration - possibility to
> > disable the clocks with compile test. I'll send a v2.
>
> Uh, that's not that easy. Intel created three different arm64 architectures
> for one real arm64 architecture... I guess it was driven by
> the marketing but here we are - the solution would be to have entries like:
>
> bool "Intel SoCFPGA family clock support" if COMPILE_TEST && !ARCH_AGILEX && !ARCH_N5X && !ARCH_SOCFPGA && !ARCH_STRATIX10
> ...
> bool "Intel Stratix / Agilex / N5X clock controller support" if COMPILE_TEST && !ARCH_AGILEX && !ARCH_N5X && !ARCH_STRATIX10
> ...
> bool "Intel Agilex / N5X clock controller support" if COMPILE_TEST && !ARCH_AGILEX && !ARCH_N5X
> ...
>
> I think it looks wrong. The stratix/agilex/n5x are basically flavors of
> socfpga from Linux point of view. This is the same architecture for Linux
> kernel, from high level point of view. Instead of going with unified ARCH_SOCFPGA
> (like all other platforms, e.g. Renesas, NXP), the Intel create three
> different kernel-wide arm64 ARCH_xxx symbols.
>
> It's too much. How about converting all these arm64 Intel platforms to ARCH_SOCFPGA?
Agreed, that seems best here. There is no need at all to have multiple
top-level Kconfig symbols when these are all part of one SoC family.
Arnd
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2021-03-09 10:13 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
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2021-03-08 18:23 [RFT 0/3] clk: socfpga: minor cleanups and compile testing Krzysztof Kozlowski
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2021-03-08 18:23 ` [PATCH 2/3] clk: socfpga: drop duplicated lines in Makefile Krzysztof Kozlowski
2021-03-08 18:23 ` [PATCH 3/3] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks Krzysztof Kozlowski
2021-03-09 8:49 ` Krzysztof Kozlowski
2021-03-09 9:02 ` Krzysztof Kozlowski
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