[PATCH v3] irqchip/xilinx: Expose Kconfig option for Zynq/ZynqMP

[PATCH v3] irqchip/xilinx: Expose Kconfig option for Zynq/ZynqMP

[Robert Hancock]

Previously the XILINX_INTC config option was hidden and only
auto-selected on the MicroBlaze platform. However, this IP can also be
used on the Zynq and ZynqMP platforms as a secondary cascaded
controller. Allow this option to be user-enabled on those platforms.

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
---

Changes since v2: Removed COMPILE_TEST dependency

Changes since v1: Allow only Zynq/ZynqMP platforms

 drivers/irqchip/Kconfig | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 15536e321df5..53f81a0d161e 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -279,8 +279,13 @@ config XTENSA_MX
 	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
 
 config XILINX_INTC
-	bool
+	bool "Xilinx Interrupt Controller IP"
+	depends on MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP
 	select IRQ_DOMAIN
+	help
+	  Support for the Xilinx Interrupt Controller IP core.
+	  This is used as a primary controller with MicroBlaze and can also
+	  be used as a secondary chained controller on other platforms.
 
 config IRQ_CROSSBAR
 	bool
-- 
2.27.0

[irqchip: irq/irqchip-next] irqchip/xilinx: Expose Kconfig option for Zynq/ZynqMP

[irqchip-bot for Robert Hancock]

The following commit has been merged into the irq/irqchip-next branch of irqchip:

Commit-ID:     debf69cfd4c618c7036a13cc4edd1faf87ce7d53
Gitweb:        https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/debf69cfd4c618c7036a13cc4edd1faf87ce7d53
Author:        Robert Hancock <robert.hancock@calian.com>
AuthorDate:    Fri, 23 Apr 2021 12:58:53 -06:00
Committer:     Marc Zyngier <maz@kernel.org>
CommitterDate: Sat, 24 Apr 2021 09:50:03 +01:00

irqchip/xilinx: Expose Kconfig option for Zynq/ZynqMP

Previously the XILINX_INTC config option was hidden and only
auto-selected on the MicroBlaze platform. However, this IP can also be
used on the Zynq and ZynqMP platforms as a secondary cascaded
controller. Allow this option to be user-enabled on those platforms.

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20210423185853.2556087-1-robert.hancock@calian.com
---
 drivers/irqchip/Kconfig | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 18b0d0b..c8f57e3 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -279,8 +279,13 @@ config XTENSA_MX
 	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
 
 config XILINX_INTC
-	bool
+	bool "Xilinx Interrupt Controller IP"
+	depends on MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP
 	select IRQ_DOMAIN
+	help
+	  Support for the Xilinx Interrupt Controller IP core.
+	  This is used as a primary controller with MicroBlaze and can also
+	  be used as a secondary chained controller on other platforms.
 
 config IRQ_CROSSBAR
 	bool