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* [PATCH 0/3] MIPS: kernel: proc: fix style and add CPU option reporting
@ 2021-04-24 20:51 Ilya Lipnitskiy
  2021-04-24 20:51 ` [PATCH 1/3] MIPS: kernel: proc: fix trivial style errors Ilya Lipnitskiy
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Ilya Lipnitskiy @ 2021-04-24 20:51 UTC (permalink / raw)
  To: Thomas Bogendoerfer, Jiri Kosina, Ilya Lipnitskiy,
	Alexey Malahov, Serge Semin, Hauke Mehrtens, linux-mips,
	linux-kernel

Fix checkpatch errors and use seq_puts instead of seq_printf where
possible.

Re-send an old patch that adds CPU option reporting.

Tested against MT7621 on OpenWrt running v5.10 kernel.

MT7621 output:
  Options implemented	: tlb 4kex 4k_cache prefetch mcheck ejtag llsc
  pindexed_dcache userlocal vint perf_cntr_intr_bit cdmm perf

Hauke Mehrtens (1):
  MIPS: kernel: proc: add CPU option reporting

Ilya Lipnitskiy (2):
  MIPS: kernel: proc: fix trivial style errors
  MIPS: kernel: proc: use seq_puts instead of seq_printf

 arch/mips/kernel/proc.c | 215 ++++++++++++++++++++++++++++++++--------
 1 file changed, 172 insertions(+), 43 deletions(-)

-- 
2.31.1


^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PATCH 1/3] MIPS: kernel: proc: fix trivial style errors
  2021-04-24 20:51 [PATCH 0/3] MIPS: kernel: proc: fix style and add CPU option reporting Ilya Lipnitskiy
@ 2021-04-24 20:51 ` Ilya Lipnitskiy
  2021-04-24 20:51 ` [PATCH 2/3] MIPS: kernel: proc: use seq_puts instead of seq_printf Ilya Lipnitskiy
  2021-04-24 20:51 ` [PATCH 3/3] MIPS: kernel: proc: add CPU option reporting Ilya Lipnitskiy
  2 siblings, 0 replies; 4+ messages in thread
From: Ilya Lipnitskiy @ 2021-04-24 20:51 UTC (permalink / raw)
  To: Thomas Bogendoerfer, Jiri Kosina, Ilya Lipnitskiy,
	Alexey Malahov, Serge Semin, Hauke Mehrtens, linux-mips,
	linux-kernel

Fix the following checkpatch errors - no logic changes:

WARNING: Block comments use a trailing */ on a separate line
+ *   */
ERROR: space prohibited before open square bracket '['
+	char fmt [64];
ERROR: space prohibited before that ',' (ctx:WxE)
+			seq_printf(m, "%s0x%04x", i ? ", " : "" ,
ERROR: trailing whitespace
+^Iseq_printf(m, "isa\t\t\t:"); $
ERROR: trailing statements should be on next line

Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
---
 arch/mips/kernel/proc.c | 67 ++++++++++++++++++++++++++---------------
 1 file changed, 43 insertions(+), 24 deletions(-)

diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index 4184d641f05e..053847c0d4cd 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -19,8 +19,8 @@
 unsigned int vced_count, vcei_count;
 
 /*
- *  * No lock; only written during early bootup by CPU 0.
- *   */
+ * No lock; only written during early bootup by CPU 0.
+ */
 static RAW_NOTIFIER_HEAD(proc_cpuinfo_chain);
 
 int __ref register_proc_cpuinfo_notifier(struct notifier_block *nb)
@@ -39,7 +39,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
 	unsigned long n = (unsigned long) v - 1;
 	unsigned int version = cpu_data[n].processor_id;
 	unsigned int fp_vers = cpu_data[n].fpu_id;
-	char fmt [64];
+	char fmt[64];
 	int i;
 
 #ifdef CONFIG_SMP
@@ -78,12 +78,12 @@ static int show_cpuinfo(struct seq_file *m, void *v)
 		seq_printf(m, "count: %d, address/irw mask: [",
 		      cpu_data[n].watch_reg_count);
 		for (i = 0; i < cpu_data[n].watch_reg_count; i++)
-			seq_printf(m, "%s0x%04x", i ? ", " : "" ,
+			seq_printf(m, "%s0x%04x", i ? ", " : "",
 				cpu_data[n].watch_reg_masks[i]);
 		seq_printf(m, "]\n");
 	}
 
-	seq_printf(m, "isa\t\t\t:"); 
+	seq_printf(m, "isa\t\t\t:");
 	if (cpu_has_mips_1)
 		seq_printf(m, " mips1");
 	if (cpu_has_mips_2)
@@ -113,25 +113,44 @@ static int show_cpuinfo(struct seq_file *m, void *v)
 	seq_printf(m, "\n");
 
 	seq_printf(m, "ASEs implemented\t:");
-	if (cpu_has_mips16)	seq_printf(m, "%s", " mips16");
-	if (cpu_has_mips16e2)	seq_printf(m, "%s", " mips16e2");
-	if (cpu_has_mdmx)	seq_printf(m, "%s", " mdmx");
-	if (cpu_has_mips3d)	seq_printf(m, "%s", " mips3d");
-	if (cpu_has_smartmips)	seq_printf(m, "%s", " smartmips");
-	if (cpu_has_dsp)	seq_printf(m, "%s", " dsp");
-	if (cpu_has_dsp2)	seq_printf(m, "%s", " dsp2");
-	if (cpu_has_dsp3)	seq_printf(m, "%s", " dsp3");
-	if (cpu_has_mipsmt)	seq_printf(m, "%s", " mt");
-	if (cpu_has_mmips)	seq_printf(m, "%s", " micromips");
-	if (cpu_has_vz)		seq_printf(m, "%s", " vz");
-	if (cpu_has_msa)	seq_printf(m, "%s", " msa");
-	if (cpu_has_eva)	seq_printf(m, "%s", " eva");
-	if (cpu_has_htw)	seq_printf(m, "%s", " htw");
-	if (cpu_has_xpa)	seq_printf(m, "%s", " xpa");
-	if (cpu_has_loongson_mmi)	seq_printf(m, "%s", " loongson-mmi");
-	if (cpu_has_loongson_cam)	seq_printf(m, "%s", " loongson-cam");
-	if (cpu_has_loongson_ext)	seq_printf(m, "%s", " loongson-ext");
-	if (cpu_has_loongson_ext2)	seq_printf(m, "%s", " loongson-ext2");
+	if (cpu_has_mips16)
+		seq_printf(m, "%s", " mips16");
+	if (cpu_has_mips16e2)
+		seq_printf(m, "%s", " mips16e2");
+	if (cpu_has_mdmx)
+		seq_printf(m, "%s", " mdmx");
+	if (cpu_has_mips3d)
+		seq_printf(m, "%s", " mips3d");
+	if (cpu_has_smartmips)
+		seq_printf(m, "%s", " smartmips");
+	if (cpu_has_dsp)
+		seq_printf(m, "%s", " dsp");
+	if (cpu_has_dsp2)
+		seq_printf(m, "%s", " dsp2");
+	if (cpu_has_dsp3)
+		seq_printf(m, "%s", " dsp3");
+	if (cpu_has_mipsmt)
+		seq_printf(m, "%s", " mt");
+	if (cpu_has_mmips)
+		seq_printf(m, "%s", " micromips");
+	if (cpu_has_vz)
+		seq_printf(m, "%s", " vz");
+	if (cpu_has_msa)
+		seq_printf(m, "%s", " msa");
+	if (cpu_has_eva)
+		seq_printf(m, "%s", " eva");
+	if (cpu_has_htw)
+		seq_printf(m, "%s", " htw");
+	if (cpu_has_xpa)
+		seq_printf(m, "%s", " xpa");
+	if (cpu_has_loongson_mmi)
+		seq_printf(m, "%s", " loongson-mmi");
+	if (cpu_has_loongson_cam)
+		seq_printf(m, "%s", " loongson-cam");
+	if (cpu_has_loongson_ext)
+		seq_printf(m, "%s", " loongson-ext");
+	if (cpu_has_loongson_ext2)
+		seq_printf(m, "%s", " loongson-ext2");
 	seq_printf(m, "\n");
 
 	if (cpu_has_mmips) {
-- 
2.31.1


^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH 2/3] MIPS: kernel: proc: use seq_puts instead of seq_printf
  2021-04-24 20:51 [PATCH 0/3] MIPS: kernel: proc: fix style and add CPU option reporting Ilya Lipnitskiy
  2021-04-24 20:51 ` [PATCH 1/3] MIPS: kernel: proc: fix trivial style errors Ilya Lipnitskiy
@ 2021-04-24 20:51 ` Ilya Lipnitskiy
  2021-04-24 20:51 ` [PATCH 3/3] MIPS: kernel: proc: add CPU option reporting Ilya Lipnitskiy
  2 siblings, 0 replies; 4+ messages in thread
From: Ilya Lipnitskiy @ 2021-04-24 20:51 UTC (permalink / raw)
  To: Thomas Bogendoerfer, Jiri Kosina, Ilya Lipnitskiy,
	Alexey Malahov, Serge Semin, Hauke Mehrtens, linux-mips,
	linux-kernel

Fix checkpatch WARNING: Prefer seq_puts to seq_printf

Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
---
 arch/mips/kernel/proc.c | 76 ++++++++++++++++++++---------------------
 1 file changed, 38 insertions(+), 38 deletions(-)

diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index 053847c0d4cd..7d8481d9acc3 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -80,78 +80,78 @@ static int show_cpuinfo(struct seq_file *m, void *v)
 		for (i = 0; i < cpu_data[n].watch_reg_count; i++)
 			seq_printf(m, "%s0x%04x", i ? ", " : "",
 				cpu_data[n].watch_reg_masks[i]);
-		seq_printf(m, "]\n");
+		seq_puts(m, "]\n");
 	}
 
-	seq_printf(m, "isa\t\t\t:");
+	seq_puts(m, "isa\t\t\t:");
 	if (cpu_has_mips_1)
-		seq_printf(m, " mips1");
+		seq_puts(m, " mips1");
 	if (cpu_has_mips_2)
-		seq_printf(m, "%s", " mips2");
+		seq_puts(m, " mips2");
 	if (cpu_has_mips_3)
-		seq_printf(m, "%s", " mips3");
+		seq_puts(m, " mips3");
 	if (cpu_has_mips_4)
-		seq_printf(m, "%s", " mips4");
+		seq_puts(m, " mips4");
 	if (cpu_has_mips_5)
-		seq_printf(m, "%s", " mips5");
+		seq_puts(m, " mips5");
 	if (cpu_has_mips32r1)
-		seq_printf(m, "%s", " mips32r1");
+		seq_puts(m, " mips32r1");
 	if (cpu_has_mips32r2)
-		seq_printf(m, "%s", " mips32r2");
+		seq_puts(m, " mips32r2");
 	if (cpu_has_mips32r5)
-		seq_printf(m, "%s", " mips32r5");
+		seq_puts(m, " mips32r5");
 	if (cpu_has_mips32r6)
-		seq_printf(m, "%s", " mips32r6");
+		seq_puts(m, " mips32r6");
 	if (cpu_has_mips64r1)
-		seq_printf(m, "%s", " mips64r1");
+		seq_puts(m, " mips64r1");
 	if (cpu_has_mips64r2)
-		seq_printf(m, "%s", " mips64r2");
+		seq_puts(m, " mips64r2");
 	if (cpu_has_mips64r5)
-		seq_printf(m, "%s", " mips64r5");
+		seq_puts(m, " mips64r5");
 	if (cpu_has_mips64r6)
-		seq_printf(m, "%s", " mips64r6");
-	seq_printf(m, "\n");
+		seq_puts(m, " mips64r6");
+	seq_puts(m, "\n");
 
-	seq_printf(m, "ASEs implemented\t:");
+	seq_puts(m, "ASEs implemented\t:");
 	if (cpu_has_mips16)
-		seq_printf(m, "%s", " mips16");
+		seq_puts(m, " mips16");
 	if (cpu_has_mips16e2)
-		seq_printf(m, "%s", " mips16e2");
+		seq_puts(m, " mips16e2");
 	if (cpu_has_mdmx)
-		seq_printf(m, "%s", " mdmx");
+		seq_puts(m, " mdmx");
 	if (cpu_has_mips3d)
-		seq_printf(m, "%s", " mips3d");
+		seq_puts(m, " mips3d");
 	if (cpu_has_smartmips)
-		seq_printf(m, "%s", " smartmips");
+		seq_puts(m, " smartmips");
 	if (cpu_has_dsp)
-		seq_printf(m, "%s", " dsp");
+		seq_puts(m, " dsp");
 	if (cpu_has_dsp2)
-		seq_printf(m, "%s", " dsp2");
+		seq_puts(m, " dsp2");
 	if (cpu_has_dsp3)
-		seq_printf(m, "%s", " dsp3");
+		seq_puts(m, " dsp3");
 	if (cpu_has_mipsmt)
-		seq_printf(m, "%s", " mt");
+		seq_puts(m, " mt");
 	if (cpu_has_mmips)
-		seq_printf(m, "%s", " micromips");
+		seq_puts(m, " micromips");
 	if (cpu_has_vz)
-		seq_printf(m, "%s", " vz");
+		seq_puts(m, " vz");
 	if (cpu_has_msa)
-		seq_printf(m, "%s", " msa");
+		seq_puts(m, " msa");
 	if (cpu_has_eva)
-		seq_printf(m, "%s", " eva");
+		seq_puts(m, " eva");
 	if (cpu_has_htw)
-		seq_printf(m, "%s", " htw");
+		seq_puts(m, " htw");
 	if (cpu_has_xpa)
-		seq_printf(m, "%s", " xpa");
+		seq_puts(m, " xpa");
 	if (cpu_has_loongson_mmi)
-		seq_printf(m, "%s", " loongson-mmi");
+		seq_puts(m, " loongson-mmi");
 	if (cpu_has_loongson_cam)
-		seq_printf(m, "%s", " loongson-cam");
+		seq_puts(m, " loongson-cam");
 	if (cpu_has_loongson_ext)
-		seq_printf(m, "%s", " loongson-ext");
+		seq_puts(m, " loongson-ext");
 	if (cpu_has_loongson_ext2)
-		seq_printf(m, "%s", " loongson-ext2");
-	seq_printf(m, "\n");
+		seq_puts(m, " loongson-ext2");
+	seq_puts(m, "\n");
 
 	if (cpu_has_mmips) {
 		seq_printf(m, "micromips kernel\t: %s\n",
@@ -182,7 +182,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
 	raw_notifier_call_chain(&proc_cpuinfo_chain, 0,
 				&proc_cpuinfo_notifier_args);
 
-	seq_printf(m, "\n");
+	seq_puts(m, "\n");
 
 	return 0;
 }
-- 
2.31.1


^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH 3/3] MIPS: kernel: proc: add CPU option reporting
  2021-04-24 20:51 [PATCH 0/3] MIPS: kernel: proc: fix style and add CPU option reporting Ilya Lipnitskiy
  2021-04-24 20:51 ` [PATCH 1/3] MIPS: kernel: proc: fix trivial style errors Ilya Lipnitskiy
  2021-04-24 20:51 ` [PATCH 2/3] MIPS: kernel: proc: use seq_puts instead of seq_printf Ilya Lipnitskiy
@ 2021-04-24 20:51 ` Ilya Lipnitskiy
  2 siblings, 0 replies; 4+ messages in thread
From: Ilya Lipnitskiy @ 2021-04-24 20:51 UTC (permalink / raw)
  To: Thomas Bogendoerfer, Jiri Kosina, Ilya Lipnitskiy,
	Alexey Malahov, Serge Semin, Hauke Mehrtens, linux-mips,
	linux-kernel

From: Hauke Mehrtens <hauke@hauke-m.de>

Many MIPS CPUs have optional CPU features which are not activated for
all CPU cores. Print the CPU options, which are implemented in the core,
in /proc/cpuinfo. This makes it possible to see which features are
supported and which are not supported. This should cover all standard
MIPS extensions. Before, it only printed information about the main MIPS
ASEs.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

Changes from original patch[0]:
- Remove cpu_has_6k_cache and cpu_has_8k_cache due to commit 6ce91ba8589a
  ("MIPS: Remove cpu_has_6k_cache and cpu_has_8k_cache in cpu_cache_init()")
- Use seq_puts instead of seq_printf as suggested by checkpatch.
- Minor commit message reword

[0]: https://lore.kernel.org/linux-mips/20181223225224.23042-1-hauke@hauke-m.de/
Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
---
 arch/mips/kernel/proc.c | 110 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 110 insertions(+)

diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index 7d8481d9acc3..68ad09cc6516 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -157,6 +157,116 @@ static int show_cpuinfo(struct seq_file *m, void *v)
 		seq_printf(m, "micromips kernel\t: %s\n",
 		      (read_c0_config3() & MIPS_CONF3_ISA_OE) ?  "yes" : "no");
 	}
+
+	seq_puts(m, "Options implemented\t:");
+	if (cpu_has_tlb)
+		seq_puts(m, " tlb");
+	if (cpu_has_ftlb)
+		seq_puts(m, " ftlb");
+	if (cpu_has_tlbinv)
+		seq_puts(m, " tlbinv");
+	if (cpu_has_segments)
+		seq_puts(m, " segments");
+	if (cpu_has_rixiex)
+		seq_puts(m, " rixiex");
+	if (cpu_has_ldpte)
+		seq_puts(m, " ldpte");
+	if (cpu_has_maar)
+		seq_puts(m, " maar");
+	if (cpu_has_rw_llb)
+		seq_puts(m, " rw_llb");
+	if (cpu_has_4kex)
+		seq_puts(m, " 4kex");
+	if (cpu_has_3k_cache)
+		seq_puts(m, " 3k_cache");
+	if (cpu_has_4k_cache)
+		seq_puts(m, " 4k_cache");
+	if (cpu_has_tx39_cache)
+		seq_puts(m, " tx39_cache");
+	if (cpu_has_octeon_cache)
+		seq_puts(m, " octeon_cache");
+	if (cpu_has_fpu)
+		seq_puts(m, " fpu");
+	if (cpu_has_32fpr)
+		seq_puts(m, " 32fpr");
+	if (cpu_has_cache_cdex_p)
+		seq_puts(m, " cache_cdex_p");
+	if (cpu_has_cache_cdex_s)
+		seq_puts(m, " cache_cdex_s");
+	if (cpu_has_prefetch)
+		seq_puts(m, " prefetch");
+	if (cpu_has_mcheck)
+		seq_puts(m, " mcheck");
+	if (cpu_has_ejtag)
+		seq_puts(m, " ejtag");
+	if (cpu_has_llsc)
+		seq_puts(m, " llsc");
+	if (cpu_has_guestctl0ext)
+		seq_puts(m, " guestctl0ext");
+	if (cpu_has_guestctl1)
+		seq_puts(m, " guestctl1");
+	if (cpu_has_guestctl2)
+		seq_puts(m, " guestctl2");
+	if (cpu_has_guestid)
+		seq_puts(m, " guestid");
+	if (cpu_has_drg)
+		seq_puts(m, " drg");
+	if (cpu_has_rixi)
+		seq_puts(m, " rixi");
+	if (cpu_has_lpa)
+		seq_puts(m, " lpa");
+	if (cpu_has_mvh)
+		seq_puts(m, " mvh");
+	if (cpu_has_vtag_icache)
+		seq_puts(m, " vtag_icache");
+	if (cpu_has_dc_aliases)
+		seq_puts(m, " dc_aliases");
+	if (cpu_has_ic_fills_f_dc)
+		seq_puts(m, " ic_fills_f_dc");
+	if (cpu_has_pindexed_dcache)
+		seq_puts(m, " pindexed_dcache");
+	if (cpu_has_userlocal)
+		seq_puts(m, " userlocal");
+	if (cpu_has_nofpuex)
+		seq_puts(m, " nofpuex");
+	if (cpu_has_vint)
+		seq_puts(m, " vint");
+	if (cpu_has_veic)
+		seq_puts(m, " veic");
+	if (cpu_has_inclusive_pcaches)
+		seq_puts(m, " inclusive_pcaches");
+	if (cpu_has_perf_cntr_intr_bit)
+		seq_puts(m, " perf_cntr_intr_bit");
+	if (cpu_has_ufr)
+		seq_puts(m, " ufr");
+	if (cpu_has_fre)
+		seq_puts(m, " fre");
+	if (cpu_has_cdmm)
+		seq_puts(m, " cdmm");
+	if (cpu_has_small_pages)
+		seq_puts(m, " small_pages");
+	if (cpu_has_nan_legacy)
+		seq_puts(m, " nan_legacy");
+	if (cpu_has_nan_2008)
+		seq_puts(m, " nan_2008");
+	if (cpu_has_ebase_wg)
+		seq_puts(m, " ebase_wg");
+	if (cpu_has_badinstr)
+		seq_puts(m, " badinstr");
+	if (cpu_has_badinstrp)
+		seq_puts(m, " badinstrp");
+	if (cpu_has_contextconfig)
+		seq_puts(m, " contextconfig");
+	if (cpu_has_perf)
+		seq_puts(m, " perf");
+	if (cpu_has_shared_ftlb_ram)
+		seq_puts(m, " shared_ftlb_ram");
+	if (cpu_has_shared_ftlb_entries)
+		seq_puts(m, " shared_ftlb_entries");
+	if (cpu_has_mipsmt_pertccounters)
+		seq_puts(m, " mipsmt_pertccounters");
+	seq_puts(m, "\n");
+
 	seq_printf(m, "shadow register sets\t: %d\n",
 		      cpu_data[n].srsets);
 	seq_printf(m, "kscratch registers\t: %d\n",
-- 
2.31.1


^ permalink raw reply related	[flat|nested] 4+ messages in thread

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2021-04-24 20:51 ` [PATCH 1/3] MIPS: kernel: proc: fix trivial style errors Ilya Lipnitskiy
2021-04-24 20:51 ` [PATCH 2/3] MIPS: kernel: proc: use seq_puts instead of seq_printf Ilya Lipnitskiy
2021-04-24 20:51 ` [PATCH 3/3] MIPS: kernel: proc: add CPU option reporting Ilya Lipnitskiy

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