* [PATCH v1] clk: rockchip: Optimize PLL table memory usage
@ 2021-05-11 9:07 Elaine, Zhang
2021-05-14 12:05 ` Heiko Stuebner
0 siblings, 1 reply; 2+ messages in thread
From: Elaine, Zhang @ 2021-05-11 9:07 UTC (permalink / raw)
To: mturquette, sboyd, heiko
Cc: linux-clk, linux-arm-kernel, linux-rockchip, linux-kernel,
huangtao, kever.yang, tony.xie, finley.xiao, Elaine Zhang
From: Elaine Zhang <zhangqing@rock-chips.com>
Before the change: The sizeof rk3568_pll_rates = 2544
Use union: The sizeof rk3568_pll_rates = 1696
In future Soc, more PLL types will be added, and the
rockchip_pll_rate_table will add more members,
and the space savings will be even more pronounced
by using union.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
drivers/clk/rockchip/clk.h | 29 ++++++++++++++++++-----------
1 file changed, 18 insertions(+), 11 deletions(-)
diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
index 571cee7bbfdc..7aa45cc70287 100644
--- a/drivers/clk/rockchip/clk.h
+++ b/drivers/clk/rockchip/clk.h
@@ -271,17 +271,24 @@ struct rockchip_clk_provider {
struct rockchip_pll_rate_table {
unsigned long rate;
- unsigned int nr;
- unsigned int nf;
- unsigned int no;
- unsigned int nb;
- /* for RK3036/RK3399 */
- unsigned int fbdiv;
- unsigned int postdiv1;
- unsigned int refdiv;
- unsigned int postdiv2;
- unsigned int dsmpd;
- unsigned int frac;
+ union {
+ struct {
+ /* for RK3066 */
+ unsigned int nr;
+ unsigned int nf;
+ unsigned int no;
+ unsigned int nb;
+ };
+ struct {
+ /* for RK3036/RK3399 */
+ unsigned int fbdiv;
+ unsigned int postdiv1;
+ unsigned int refdiv;
+ unsigned int postdiv2;
+ unsigned int dsmpd;
+ unsigned int frac;
+ };
+ };
};
/**
--
2.17.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v1] clk: rockchip: Optimize PLL table memory usage
2021-05-11 9:07 [PATCH v1] clk: rockchip: Optimize PLL table memory usage Elaine, Zhang
@ 2021-05-14 12:05 ` Heiko Stuebner
0 siblings, 0 replies; 2+ messages in thread
From: Heiko Stuebner @ 2021-05-14 12:05 UTC (permalink / raw)
To: mturquette, Elaine, sboyd
Cc: Heiko Stuebner, linux-arm-kernel, Elaine Zhang, linux-clk,
kever.yang, huangtao, tony.xie, linux-kernel, finley.xiao,
linux-rockchip
On Tue, 11 May 2021 17:07:26 +0800, Elaine@vger.kernel.org wrote:
> Before the change: The sizeof rk3568_pll_rates = 2544
> Use union: The sizeof rk3568_pll_rates = 1696
>
> In future Soc, more PLL types will be added, and the
> rockchip_pll_rate_table will add more members,
> and the space savings will be even more pronounced
> by using union.
Applied, thanks!
[1/1] clk: rockchip: Optimize PLL table memory usage
commit: 23029150a05b59ebacca6dd76f6c14dc67a95877
Best regards,
--
Heiko Stuebner <heiko@sntech.de>
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