* [PATCH v2 1/6] dt-bindings: mux: Convert reg-mux DT bindings to YAML
2021-05-17 6:17 [PATCH v2 0/6] AM64: EVM/SK: Enable PCIe and USB Kishon Vijay Abraham I
@ 2021-05-17 6:17 ` Kishon Vijay Abraham I
2021-05-17 14:07 ` Nishanth Menon
` (2 more replies)
2021-05-17 6:17 ` [PATCH v2 2/6] arm64: dts: ti: k3-am64-main: Add SERDES DT node Kishon Vijay Abraham I
` (4 subsequent siblings)
5 siblings, 3 replies; 11+ messages in thread
From: Kishon Vijay Abraham I @ 2021-05-17 6:17 UTC (permalink / raw)
To: Nishanth Menon, Tero Kristo, Rob Herring
Cc: linux-arm-kernel, devicetree, linux-kernel,
Kishon Vijay Abraham I, Lokesh Vutla, a-govindraju
Convert reg-mux DT bindings to YAML. Move the examples provided in
reg-mux.txt to mux-controller.txt and remove reg-mux.txt
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
.../bindings/mux/mux-controller.txt | 113 ++++++++++++++-
.../devicetree/bindings/mux/reg-mux.txt | 129 ------------------
.../devicetree/bindings/mux/reg-mux.yaml | 47 +++++++
3 files changed, 159 insertions(+), 130 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/mux/reg-mux.txt
create mode 100644 Documentation/devicetree/bindings/mux/reg-mux.yaml
diff --git a/Documentation/devicetree/bindings/mux/mux-controller.txt b/Documentation/devicetree/bindings/mux/mux-controller.txt
index 4f47e4bd2fa0..6f1e83367d52 100644
--- a/Documentation/devicetree/bindings/mux/mux-controller.txt
+++ b/Documentation/devicetree/bindings/mux/mux-controller.txt
@@ -38,7 +38,7 @@ mux-ctrl-specifier typically encodes the chip-relative mux controller number.
If the mux controller chip only provides a single mux controller, the
mux-ctrl-specifier can typically be left out.
-Example:
+Example 1:
/* One consumer of a 2-way mux controller (one GPIO-line) */
mux: mux-controller {
@@ -64,6 +64,8 @@ because there is only one mux controller in the list. However, if the driver
for the consumer node in fact asks for a named mux controller, that name is of
course still required.
+Example 2:
+
/*
* Two consumers (one for an ADC line and one for an i2c bus) of
* parallel 4-way multiplexers controlled by the same two GPIO-lines.
@@ -116,6 +118,115 @@ course still required.
};
};
+Example 3:
+
+The parent device of mux controller is not a syscon device.
+
+&i2c0 {
+ fpga@66 { // fpga connected to i2c
+ compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
+ "simple-mfd";
+ reg = <0x66>;
+
+ mux: mux-controller {
+ compatible = "reg-mux";
+ #mux-control-cells = <1>;
+ mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
+ <0x54 0x07>; /* 1: reg 0x54, bits 2:0 */
+ };
+ };
+};
+
+mdio-mux-1 {
+ compatible = "mdio-mux-multiplexer";
+ mux-controls = <&mux 0>;
+ mdio-parent-bus = <&emdio1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mdio@0 {
+ reg = <0x0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@8 {
+ reg = <0x8>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ ..
+ ..
+};
+
+mdio-mux-2 {
+ compatible = "mdio-mux-multiplexer";
+ mux-controls = <&mux 1>;
+ mdio-parent-bus = <&emdio2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mdio@0 {
+ reg = <0x0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1 {
+ reg = <0x1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ ..
+ ..
+};
+
+Example 4:
+
+The parent device of mux controller is syscon device.
+
+syscon {
+ compatible = "syscon";
+
+ mux: mux-controller {
+ compatible = "mmio-mux";
+ #mux-control-cells = <1>;
+
+ mux-reg-masks = <0x3 0x30>, /* 0: reg 0x3, bits 5:4 */
+ <0x3 0x40>, /* 1: reg 0x3, bit 6 */
+ idle-states = <MUX_IDLE_AS_IS>, <0>;
+ };
+};
+
+video-mux {
+ compatible = "video-mux";
+ mux-controls = <&mux 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ports {
+ /* inputs 0..3 */
+ port@0 {
+ reg = <0>;
+ };
+ port@1 {
+ reg = <1>;
+ };
+ port@2 {
+ reg = <2>;
+ };
+ port@3 {
+ reg = <3>;
+ };
+
+ /* output */
+ port@4 {
+ reg = <4>;
+ };
+ };
+};
Mux controller nodes
--------------------
diff --git a/Documentation/devicetree/bindings/mux/reg-mux.txt b/Documentation/devicetree/bindings/mux/reg-mux.txt
deleted file mode 100644
index 4afd7ba73d60..000000000000
--- a/Documentation/devicetree/bindings/mux/reg-mux.txt
+++ /dev/null
@@ -1,129 +0,0 @@
-Generic register bitfield-based multiplexer controller bindings
-
-Define register bitfields to be used to control multiplexers. The parent
-device tree node must be a device node to provide register r/w access.
-
-Required properties:
-- compatible : should be one of
- "reg-mux" : if parent device of mux controller is not syscon device
- "mmio-mux" : if parent device of mux controller is syscon device
-- #mux-control-cells : <1>
-- mux-reg-masks : an array of register offset and pre-shifted bitfield mask
- pairs, each describing a single mux control.
-* Standard mux-controller bindings as decribed in mux-controller.txt
-
-Optional properties:
-- idle-states : if present, the state the muxes will have when idle. The
- special state MUX_IDLE_AS_IS is the default.
-
-The multiplexer state of each multiplexer is defined as the value of the
-bitfield described by the corresponding register offset and bitfield mask
-pair in the mux-reg-masks array.
-
-Example 1:
-The parent device of mux controller is not a syscon device.
-
-&i2c0 {
- fpga@66 { // fpga connected to i2c
- compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
- "simple-mfd";
- reg = <0x66>;
-
- mux: mux-controller {
- compatible = "reg-mux";
- #mux-control-cells = <1>;
- mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
- <0x54 0x07>; /* 1: reg 0x54, bits 2:0 */
- };
- };
-};
-
-mdio-mux-1 {
- compatible = "mdio-mux-multiplexer";
- mux-controls = <&mux 0>;
- mdio-parent-bus = <&emdio1>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- mdio@0 {
- reg = <0x0>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- mdio@8 {
- reg = <0x8>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- ..
- ..
-};
-
-mdio-mux-2 {
- compatible = "mdio-mux-multiplexer";
- mux-controls = <&mux 1>;
- mdio-parent-bus = <&emdio2>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- mdio@0 {
- reg = <0x0>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- mdio@1 {
- reg = <0x1>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- ..
- ..
-};
-
-Example 2:
-The parent device of mux controller is syscon device.
-
-syscon {
- compatible = "syscon";
-
- mux: mux-controller {
- compatible = "mmio-mux";
- #mux-control-cells = <1>;
-
- mux-reg-masks = <0x3 0x30>, /* 0: reg 0x3, bits 5:4 */
- <0x3 0x40>, /* 1: reg 0x3, bit 6 */
- idle-states = <MUX_IDLE_AS_IS>, <0>;
- };
-};
-
-video-mux {
- compatible = "video-mux";
- mux-controls = <&mux 0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- ports {
- /* inputs 0..3 */
- port@0 {
- reg = <0>;
- };
- port@1 {
- reg = <1>;
- };
- port@2 {
- reg = <2>;
- };
- port@3 {
- reg = <3>;
- };
-
- /* output */
- port@4 {
- reg = <4>;
- };
- };
-};
diff --git a/Documentation/devicetree/bindings/mux/reg-mux.yaml b/Documentation/devicetree/bindings/mux/reg-mux.yaml
new file mode 100644
index 000000000000..54583aafa9de
--- /dev/null
+++ b/Documentation/devicetree/bindings/mux/reg-mux.yaml
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/mux/reg-mux.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Generic register bitfield-based multiplexer controller bindings
+
+maintainers:
+ - Peter Rosin <peda@axentia.se>
+
+properties:
+ compatible:
+ enum:
+ - reg-mux
+ - mmio-mux
+
+ "#mux-control-cells": true
+
+ mux-reg-masks:
+ minItems: 2
+ maxItems: 32
+ description:
+ An array of register offset and pre-shifted bitfield mask pairs, each describing a
+ single mux control.
+
+ idle-states:
+ allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32-array
+
+required:
+ - compatible
+ - mux-reg-masks
+
+additionalProperties: false
+
+examples:
+ - |
+ serdes_ln_ctrl: mux {
+ compatible = "mmio-mux";
+ #mux-control-cells = <1>;
+ mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
+ <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */
+ <0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */
+ <0x40b0 0x3>, <0x40b4 0x3>, /* SERDES3 lane0/1 select */
+ <0x40c0 0x3>, <0x40c4 0x3>, <0x40c8 0x3>, <0x40cc 0x3>;
+ };
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH v2 1/6] dt-bindings: mux: Convert reg-mux DT bindings to YAML
2021-05-17 6:17 ` [PATCH v2 1/6] dt-bindings: mux: Convert reg-mux DT bindings to YAML Kishon Vijay Abraham I
@ 2021-05-17 14:07 ` Nishanth Menon
2021-05-18 10:12 ` Peter Rosin
2021-05-17 15:46 ` Rob Herring
2021-05-17 21:06 ` Rob Herring
2 siblings, 1 reply; 11+ messages in thread
From: Nishanth Menon @ 2021-05-17 14:07 UTC (permalink / raw)
To: Kishon Vijay Abraham I, Rob Herring, Peter Rosin
Cc: Tero Kristo, Rob Herring, linux-arm-kernel, devicetree,
linux-kernel, Lokesh Vutla, a-govindraju
On 11:47-20210517, Kishon Vijay Abraham I wrote:
> Convert reg-mux DT bindings to YAML. Move the examples provided in
> reg-mux.txt to mux-controller.txt and remove reg-mux.txt
--to 'Rob Herring <robh+dt@kernel.org>' --to 'Peter Rosin
<peda@axentia.se>' please.
If Peter and Rob request me, then I can pick into my tree..
>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
> .../bindings/mux/mux-controller.txt | 113 ++++++++++++++-
> .../devicetree/bindings/mux/reg-mux.txt | 129 ------------------
> .../devicetree/bindings/mux/reg-mux.yaml | 47 +++++++
> 3 files changed, 159 insertions(+), 130 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/mux/reg-mux.txt
> create mode 100644 Documentation/devicetree/bindings/mux/reg-mux.yaml
>
> diff --git a/Documentation/devicetree/bindings/mux/mux-controller.txt b/Documentation/devicetree/bindings/mux/mux-controller.txt
> index 4f47e4bd2fa0..6f1e83367d52 100644
> --- a/Documentation/devicetree/bindings/mux/mux-controller.txt
> +++ b/Documentation/devicetree/bindings/mux/mux-controller.txt
> @@ -38,7 +38,7 @@ mux-ctrl-specifier typically encodes the chip-relative mux controller number.
> If the mux controller chip only provides a single mux controller, the
> mux-ctrl-specifier can typically be left out.
>
> -Example:
> +Example 1:
>
> /* One consumer of a 2-way mux controller (one GPIO-line) */
> mux: mux-controller {
> @@ -64,6 +64,8 @@ because there is only one mux controller in the list. However, if the driver
> for the consumer node in fact asks for a named mux controller, that name is of
> course still required.
>
> +Example 2:
> +
> /*
> * Two consumers (one for an ADC line and one for an i2c bus) of
> * parallel 4-way multiplexers controlled by the same two GPIO-lines.
> @@ -116,6 +118,115 @@ course still required.
> };
> };
>
> +Example 3:
> +
> +The parent device of mux controller is not a syscon device.
> +
> +&i2c0 {
> + fpga@66 { // fpga connected to i2c
> + compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
> + "simple-mfd";
> + reg = <0x66>;
> +
> + mux: mux-controller {
> + compatible = "reg-mux";
> + #mux-control-cells = <1>;
> + mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
> + <0x54 0x07>; /* 1: reg 0x54, bits 2:0 */
> + };
> + };
> +};
> +
> +mdio-mux-1 {
> + compatible = "mdio-mux-multiplexer";
> + mux-controls = <&mux 0>;
> + mdio-parent-bus = <&emdio1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + mdio@0 {
> + reg = <0x0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@8 {
> + reg = <0x8>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + ..
> + ..
> +};
> +
> +mdio-mux-2 {
> + compatible = "mdio-mux-multiplexer";
> + mux-controls = <&mux 1>;
> + mdio-parent-bus = <&emdio2>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + mdio@0 {
> + reg = <0x0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@1 {
> + reg = <0x1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + ..
> + ..
> +};
> +
> +Example 4:
> +
> +The parent device of mux controller is syscon device.
> +
> +syscon {
> + compatible = "syscon";
> +
> + mux: mux-controller {
> + compatible = "mmio-mux";
> + #mux-control-cells = <1>;
> +
> + mux-reg-masks = <0x3 0x30>, /* 0: reg 0x3, bits 5:4 */
> + <0x3 0x40>, /* 1: reg 0x3, bit 6 */
> + idle-states = <MUX_IDLE_AS_IS>, <0>;
> + };
> +};
> +
> +video-mux {
> + compatible = "video-mux";
> + mux-controls = <&mux 0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + ports {
> + /* inputs 0..3 */
> + port@0 {
> + reg = <0>;
> + };
> + port@1 {
> + reg = <1>;
> + };
> + port@2 {
> + reg = <2>;
> + };
> + port@3 {
> + reg = <3>;
> + };
> +
> + /* output */
> + port@4 {
> + reg = <4>;
> + };
> + };
> +};
>
> Mux controller nodes
> --------------------
> diff --git a/Documentation/devicetree/bindings/mux/reg-mux.txt b/Documentation/devicetree/bindings/mux/reg-mux.txt
> deleted file mode 100644
> index 4afd7ba73d60..000000000000
> --- a/Documentation/devicetree/bindings/mux/reg-mux.txt
> +++ /dev/null
> @@ -1,129 +0,0 @@
> -Generic register bitfield-based multiplexer controller bindings
> -
> -Define register bitfields to be used to control multiplexers. The parent
> -device tree node must be a device node to provide register r/w access.
> -
> -Required properties:
> -- compatible : should be one of
> - "reg-mux" : if parent device of mux controller is not syscon device
> - "mmio-mux" : if parent device of mux controller is syscon device
> -- #mux-control-cells : <1>
> -- mux-reg-masks : an array of register offset and pre-shifted bitfield mask
> - pairs, each describing a single mux control.
> -* Standard mux-controller bindings as decribed in mux-controller.txt
> -
> -Optional properties:
> -- idle-states : if present, the state the muxes will have when idle. The
> - special state MUX_IDLE_AS_IS is the default.
> -
> -The multiplexer state of each multiplexer is defined as the value of the
> -bitfield described by the corresponding register offset and bitfield mask
> -pair in the mux-reg-masks array.
> -
> -Example 1:
> -The parent device of mux controller is not a syscon device.
> -
> -&i2c0 {
> - fpga@66 { // fpga connected to i2c
> - compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
> - "simple-mfd";
> - reg = <0x66>;
> -
> - mux: mux-controller {
> - compatible = "reg-mux";
> - #mux-control-cells = <1>;
> - mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
> - <0x54 0x07>; /* 1: reg 0x54, bits 2:0 */
> - };
> - };
> -};
> -
> -mdio-mux-1 {
> - compatible = "mdio-mux-multiplexer";
> - mux-controls = <&mux 0>;
> - mdio-parent-bus = <&emdio1>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - mdio@0 {
> - reg = <0x0>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - };
> -
> - mdio@8 {
> - reg = <0x8>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - };
> -
> - ..
> - ..
> -};
> -
> -mdio-mux-2 {
> - compatible = "mdio-mux-multiplexer";
> - mux-controls = <&mux 1>;
> - mdio-parent-bus = <&emdio2>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - mdio@0 {
> - reg = <0x0>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - };
> -
> - mdio@1 {
> - reg = <0x1>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - };
> -
> - ..
> - ..
> -};
> -
> -Example 2:
> -The parent device of mux controller is syscon device.
> -
> -syscon {
> - compatible = "syscon";
> -
> - mux: mux-controller {
> - compatible = "mmio-mux";
> - #mux-control-cells = <1>;
> -
> - mux-reg-masks = <0x3 0x30>, /* 0: reg 0x3, bits 5:4 */
> - <0x3 0x40>, /* 1: reg 0x3, bit 6 */
> - idle-states = <MUX_IDLE_AS_IS>, <0>;
> - };
> -};
> -
> -video-mux {
> - compatible = "video-mux";
> - mux-controls = <&mux 0>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - ports {
> - /* inputs 0..3 */
> - port@0 {
> - reg = <0>;
> - };
> - port@1 {
> - reg = <1>;
> - };
> - port@2 {
> - reg = <2>;
> - };
> - port@3 {
> - reg = <3>;
> - };
> -
> - /* output */
> - port@4 {
> - reg = <4>;
> - };
> - };
> -};
> diff --git a/Documentation/devicetree/bindings/mux/reg-mux.yaml b/Documentation/devicetree/bindings/mux/reg-mux.yaml
> new file mode 100644
> index 000000000000..54583aafa9de
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mux/reg-mux.yaml
> @@ -0,0 +1,47 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/mux/reg-mux.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Generic register bitfield-based multiplexer controller bindings
> +
> +maintainers:
> + - Peter Rosin <peda@axentia.se>
> +
> +properties:
> + compatible:
> + enum:
> + - reg-mux
> + - mmio-mux
> +
> + "#mux-control-cells": true
> +
> + mux-reg-masks:
> + minItems: 2
> + maxItems: 32
> + description:
> + An array of register offset and pre-shifted bitfield mask pairs, each describing a
> + single mux control.
> +
> + idle-states:
> + allOf:
> + - $ref: /schemas/types.yaml#/definitions/uint32-array
> +
> +required:
> + - compatible
> + - mux-reg-masks
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + serdes_ln_ctrl: mux {
> + compatible = "mmio-mux";
> + #mux-control-cells = <1>;
> + mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
> + <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */
> + <0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */
> + <0x40b0 0x3>, <0x40b4 0x3>, /* SERDES3 lane0/1 select */
> + <0x40c0 0x3>, <0x40c4 0x3>, <0x40c8 0x3>, <0x40cc 0x3>;
> + };
> --
> 2.17.1
>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH v2 1/6] dt-bindings: mux: Convert reg-mux DT bindings to YAML
2021-05-17 14:07 ` Nishanth Menon
@ 2021-05-18 10:12 ` Peter Rosin
0 siblings, 0 replies; 11+ messages in thread
From: Peter Rosin @ 2021-05-18 10:12 UTC (permalink / raw)
To: Nishanth Menon, Kishon Vijay Abraham I, Rob Herring
Cc: Tero Kristo, linux-arm-kernel, devicetree, linux-kernel,
Lokesh Vutla, a-govindraju
Hi!
On 2021-05-17 16:07, Nishanth Menon wrote:
> On 11:47-20210517, Kishon Vijay Abraham I wrote:
>> Convert reg-mux DT bindings to YAML. Move the examples provided in
>> reg-mux.txt to mux-controller.txt and remove reg-mux.txt
>
> --to 'Rob Herring <robh+dt@kernel.org>' --to 'Peter Rosin
> <peda@axentia.se>' please.
>
>
> If Peter and Rob request me, then I can pick into my tree..
It would make more sense to me to convert the common mux controller node
bindings in mux-controller.txt to yaml first, and only then convert the
reg-mux bindings. I.e. duplicating some of the info common to all muxes
from mux-contoller.txt in reg-mux.yaml looks like a failure to me. I
understand that as long as not all bindings are converted to yaml in one
go, there will be some duplicate information, but in this case info that
is common to all muxes are moved into the "leaf" binding and will result
in duplication once more mux bindings are converted.
But I don't know the yaml rules, so I might easily just not get it. I have
some other questions below...
>
>>
>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>> ---
>> .../bindings/mux/mux-controller.txt | 113 ++++++++++++++-
>> .../devicetree/bindings/mux/reg-mux.txt | 129 ------------------
>> .../devicetree/bindings/mux/reg-mux.yaml | 47 +++++++
>> 3 files changed, 159 insertions(+), 130 deletions(-)
>> delete mode 100644 Documentation/devicetree/bindings/mux/reg-mux.txt
>> create mode 100644 Documentation/devicetree/bindings/mux/reg-mux.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/mux/mux-controller.txt b/Documentation/devicetree/bindings/mux/mux-controller.txt
>> index 4f47e4bd2fa0..6f1e83367d52 100644
>> --- a/Documentation/devicetree/bindings/mux/mux-controller.txt
>> +++ b/Documentation/devicetree/bindings/mux/mux-controller.txt
>> @@ -38,7 +38,7 @@ mux-ctrl-specifier typically encodes the chip-relative mux controller number.
>> If the mux controller chip only provides a single mux controller, the
>> mux-ctrl-specifier can typically be left out.
>>
>> -Example:
>> +Example 1:
>>
>> /* One consumer of a 2-way mux controller (one GPIO-line) */
>> mux: mux-controller {
>> @@ -64,6 +64,8 @@ because there is only one mux controller in the list. However, if the driver
>> for the consumer node in fact asks for a named mux controller, that name is of
>> course still required.
>>
>> +Example 2:
>> +
>> /*
>> * Two consumers (one for an ADC line and one for an i2c bus) of
>> * parallel 4-way multiplexers controlled by the same two GPIO-lines.
>> @@ -116,6 +118,115 @@ course still required.
>> };
>> };
>>
>> +Example 3:
>> +
>> +The parent device of mux controller is not a syscon device.
>> +
>> +&i2c0 {
>> + fpga@66 { // fpga connected to i2c
>> + compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
>> + "simple-mfd";
>> + reg = <0x66>;
>> +
>> + mux: mux-controller {
>> + compatible = "reg-mux";
>> + #mux-control-cells = <1>;
>> + mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
>> + <0x54 0x07>; /* 1: reg 0x54, bits 2:0 */
>> + };
>> + };
>> +};
>> +
>> +mdio-mux-1 {
>> + compatible = "mdio-mux-multiplexer";
>> + mux-controls = <&mux 0>;
>> + mdio-parent-bus = <&emdio1>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + mdio@0 {
>> + reg = <0x0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + };
>> +
>> + mdio@8 {
>> + reg = <0x8>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + };
>> +
>> + ..
>> + ..
>> +};
>> +
>> +mdio-mux-2 {
>> + compatible = "mdio-mux-multiplexer";
>> + mux-controls = <&mux 1>;
>> + mdio-parent-bus = <&emdio2>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + mdio@0 {
>> + reg = <0x0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + };
>> +
>> + mdio@1 {
>> + reg = <0x1>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + };
>> +
>> + ..
>> + ..
>> +};
>> +
>> +Example 4:
>> +
>> +The parent device of mux controller is syscon device.
>> +
>> +syscon {
>> + compatible = "syscon";
>> +
>> + mux: mux-controller {
>> + compatible = "mmio-mux";
>> + #mux-control-cells = <1>;
>> +
>> + mux-reg-masks = <0x3 0x30>, /* 0: reg 0x3, bits 5:4 */
>> + <0x3 0x40>, /* 1: reg 0x3, bit 6 */
>> + idle-states = <MUX_IDLE_AS_IS>, <0>;
>> + };
>> +};
>> +
>> +video-mux {
>> + compatible = "video-mux";
>> + mux-controls = <&mux 0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + ports {
>> + /* inputs 0..3 */
>> + port@0 {
>> + reg = <0>;
>> + };
>> + port@1 {
>> + reg = <1>;
>> + };
>> + port@2 {
>> + reg = <2>;
>> + };
>> + port@3 {
>> + reg = <3>;
>> + };
>> +
>> + /* output */
>> + port@4 {
>> + reg = <4>;
>> + };
>> + };
>> +};
>>
>> Mux controller nodes
>> --------------------
>> diff --git a/Documentation/devicetree/bindings/mux/reg-mux.txt b/Documentation/devicetree/bindings/mux/reg-mux.txt
>> deleted file mode 100644
>> index 4afd7ba73d60..000000000000
>> --- a/Documentation/devicetree/bindings/mux/reg-mux.txt
>> +++ /dev/null
>> @@ -1,129 +0,0 @@
>> -Generic register bitfield-based multiplexer controller bindings
>> -
>> -Define register bitfields to be used to control multiplexers. The parent
>> -device tree node must be a device node to provide register r/w access.
>> -
>> -Required properties:
>> -- compatible : should be one of
>> - "reg-mux" : if parent device of mux controller is not syscon device
>> - "mmio-mux" : if parent device of mux controller is syscon device
>> -- #mux-control-cells : <1>
>> -- mux-reg-masks : an array of register offset and pre-shifted bitfield mask
>> - pairs, each describing a single mux control.
>> -* Standard mux-controller bindings as decribed in mux-controller.txt
>> -
>> -Optional properties:
>> -- idle-states : if present, the state the muxes will have when idle. The
>> - special state MUX_IDLE_AS_IS is the default.
>> -
>> -The multiplexer state of each multiplexer is defined as the value of the
>> -bitfield described by the corresponding register offset and bitfield mask
>> -pair in the mux-reg-masks array.
>> -
>> -Example 1:
>> -The parent device of mux controller is not a syscon device.
>> -
>> -&i2c0 {
>> - fpga@66 { // fpga connected to i2c
>> - compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
>> - "simple-mfd";
>> - reg = <0x66>;
>> -
>> - mux: mux-controller {
>> - compatible = "reg-mux";
>> - #mux-control-cells = <1>;
>> - mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
>> - <0x54 0x07>; /* 1: reg 0x54, bits 2:0 */
>> - };
>> - };
>> -};
>> -
>> -mdio-mux-1 {
>> - compatible = "mdio-mux-multiplexer";
>> - mux-controls = <&mux 0>;
>> - mdio-parent-bus = <&emdio1>;
>> - #address-cells = <1>;
>> - #size-cells = <0>;
>> -
>> - mdio@0 {
>> - reg = <0x0>;
>> - #address-cells = <1>;
>> - #size-cells = <0>;
>> - };
>> -
>> - mdio@8 {
>> - reg = <0x8>;
>> - #address-cells = <1>;
>> - #size-cells = <0>;
>> - };
>> -
>> - ..
>> - ..
>> -};
>> -
>> -mdio-mux-2 {
>> - compatible = "mdio-mux-multiplexer";
>> - mux-controls = <&mux 1>;
>> - mdio-parent-bus = <&emdio2>;
>> - #address-cells = <1>;
>> - #size-cells = <0>;
>> -
>> - mdio@0 {
>> - reg = <0x0>;
>> - #address-cells = <1>;
>> - #size-cells = <0>;
>> - };
>> -
>> - mdio@1 {
>> - reg = <0x1>;
>> - #address-cells = <1>;
>> - #size-cells = <0>;
>> - };
>> -
>> - ..
>> - ..
>> -};
>> -
>> -Example 2:
>> -The parent device of mux controller is syscon device.
>> -
>> -syscon {
>> - compatible = "syscon";
>> -
>> - mux: mux-controller {
>> - compatible = "mmio-mux";
>> - #mux-control-cells = <1>;
>> -
>> - mux-reg-masks = <0x3 0x30>, /* 0: reg 0x3, bits 5:4 */
>> - <0x3 0x40>, /* 1: reg 0x3, bit 6 */
>> - idle-states = <MUX_IDLE_AS_IS>, <0>;
>> - };
>> -};
>> -
>> -video-mux {
>> - compatible = "video-mux";
>> - mux-controls = <&mux 0>;
>> - #address-cells = <1>;
>> - #size-cells = <0>;
>> -
>> - ports {
>> - /* inputs 0..3 */
>> - port@0 {
>> - reg = <0>;
>> - };
>> - port@1 {
>> - reg = <1>;
>> - };
>> - port@2 {
>> - reg = <2>;
>> - };
>> - port@3 {
>> - reg = <3>;
>> - };
>> -
>> - /* output */
>> - port@4 {
>> - reg = <4>;
>> - };
>> - };
>> -};
>> diff --git a/Documentation/devicetree/bindings/mux/reg-mux.yaml b/Documentation/devicetree/bindings/mux/reg-mux.yaml
>> new file mode 100644
>> index 000000000000..54583aafa9de
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/mux/reg-mux.yaml
>> @@ -0,0 +1,47 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: "http://devicetree.org/schemas/mux/reg-mux.yaml#"
>> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
>> +
>> +title: Generic register bitfield-based multiplexer controller bindings
>> +
>> +maintainers:
>> + - Peter Rosin <peda@axentia.se>
>> +
>> +properties:
>> + compatible:
>> + enum:
>> + - reg-mux
>> + - mmio-mux
>> +
>> + "#mux-control-cells": true
true? It has to be exactly 1 for this binding. Is that enforced somewhere?
>> +
>> + mux-reg-masks:
>> + minItems: 2
>> + maxItems: 32
>> + description:
>> + An array of register offset and pre-shifted bitfield mask pairs, each describing a
>> + single mux control.
Is there a way to specify that it has to be an even number of items?
Cheers,
Peter
>> +
>> + idle-states:
>> + allOf:
>> + - $ref: /schemas/types.yaml#/definitions/uint32-array
>> +
>> +required:
>> + - compatible
>> + - mux-reg-masks
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + serdes_ln_ctrl: mux {
>> + compatible = "mmio-mux";
>> + #mux-control-cells = <1>;
>> + mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
>> + <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */
>> + <0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */
>> + <0x40b0 0x3>, <0x40b4 0x3>, /* SERDES3 lane0/1 select */
>> + <0x40c0 0x3>, <0x40c4 0x3>, <0x40c8 0x3>, <0x40cc 0x3>;
>> + };
>> --
>> 2.17.1
>>
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 1/6] dt-bindings: mux: Convert reg-mux DT bindings to YAML
2021-05-17 6:17 ` [PATCH v2 1/6] dt-bindings: mux: Convert reg-mux DT bindings to YAML Kishon Vijay Abraham I
2021-05-17 14:07 ` Nishanth Menon
@ 2021-05-17 15:46 ` Rob Herring
2021-05-17 21:06 ` Rob Herring
2 siblings, 0 replies; 11+ messages in thread
From: Rob Herring @ 2021-05-17 15:46 UTC (permalink / raw)
To: Kishon Vijay Abraham I
Cc: a-govindraju, Lokesh Vutla, Rob Herring, Tero Kristo,
linux-arm-kernel, linux-kernel, Nishanth Menon, devicetree
On Mon, 17 May 2021 11:47:34 +0530, Kishon Vijay Abraham I wrote:
> Convert reg-mux DT bindings to YAML. Move the examples provided in
> reg-mux.txt to mux-controller.txt and remove reg-mux.txt
>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
> .../bindings/mux/mux-controller.txt | 113 ++++++++++++++-
> .../devicetree/bindings/mux/reg-mux.txt | 129 ------------------
> .../devicetree/bindings/mux/reg-mux.yaml | 47 +++++++
> 3 files changed, 159 insertions(+), 130 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/mux/reg-mux.txt
> create mode 100644 Documentation/devicetree/bindings/mux/reg-mux.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.example.dt.yaml: serdes-ln-ctrl@4080: 'mux-reg-masks' is a required property
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mux/reg-mux.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.example.dt.yaml: serdes-ln-ctrl@4080: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mux/reg-mux.yaml
See https://patchwork.ozlabs.org/patch/1479231
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 1/6] dt-bindings: mux: Convert reg-mux DT bindings to YAML
2021-05-17 6:17 ` [PATCH v2 1/6] dt-bindings: mux: Convert reg-mux DT bindings to YAML Kishon Vijay Abraham I
2021-05-17 14:07 ` Nishanth Menon
2021-05-17 15:46 ` Rob Herring
@ 2021-05-17 21:06 ` Rob Herring
2 siblings, 0 replies; 11+ messages in thread
From: Rob Herring @ 2021-05-17 21:06 UTC (permalink / raw)
To: Kishon Vijay Abraham I
Cc: Nishanth Menon, Tero Kristo, linux-arm-kernel, devicetree,
linux-kernel, Lokesh Vutla, a-govindraju
On Mon, May 17, 2021 at 11:47:34AM +0530, Kishon Vijay Abraham I wrote:
> Convert reg-mux DT bindings to YAML. Move the examples provided in
> reg-mux.txt to mux-controller.txt and remove reg-mux.txt
>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
> .../bindings/mux/mux-controller.txt | 113 ++++++++++++++-
We don't want to be adding to this.
> .../devicetree/bindings/mux/reg-mux.txt | 129 ------------------
> .../devicetree/bindings/mux/reg-mux.yaml | 47 +++++++
> 3 files changed, 159 insertions(+), 130 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/mux/reg-mux.txt
> create mode 100644 Documentation/devicetree/bindings/mux/reg-mux.yaml
I have a more complete series converting mux bindings I'll send out.
Rob
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v2 2/6] arm64: dts: ti: k3-am64-main: Add SERDES DT node
2021-05-17 6:17 [PATCH v2 0/6] AM64: EVM/SK: Enable PCIe and USB Kishon Vijay Abraham I
2021-05-17 6:17 ` [PATCH v2 1/6] dt-bindings: mux: Convert reg-mux DT bindings to YAML Kishon Vijay Abraham I
@ 2021-05-17 6:17 ` Kishon Vijay Abraham I
2021-05-17 6:17 ` [PATCH v2 3/6] arm64: dts: ti: k3-am64-main: Add PCIe " Kishon Vijay Abraham I
` (3 subsequent siblings)
5 siblings, 0 replies; 11+ messages in thread
From: Kishon Vijay Abraham I @ 2021-05-17 6:17 UTC (permalink / raw)
To: Nishanth Menon, Tero Kristo, Rob Herring
Cc: linux-arm-kernel, devicetree, linux-kernel,
Kishon Vijay Abraham I, Lokesh Vutla, a-govindraju
AM64 has one SERDES 10G instance. Add SERDES DT node for it.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 56 ++++++++++++++++++++++++
1 file changed, 56 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index b2bcbf23eefd..d4b0ddcc22ed 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -5,6 +5,17 @@
* Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
*/
+#include <dt-bindings/phy/phy-cadence.h>
+#include <dt-bindings/phy/phy-ti.h>
+
+/ {
+ serdes_refclk: clock {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <0>;
+ };
+};
+
&cbass_main {
oc_sram: sram@70000000 {
compatible = "mmio-sram";
@@ -18,6 +29,20 @@
};
};
+ main_conf: syscon@43000000 {
+ compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
+ reg = <0x0 0x43000000 0x0 0x20000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x43000000 0x20000>;
+
+ serdes_ln_ctrl: mux {
+ compatible = "mmio-mux";
+ #mux-control-cells = <1>;
+ mux-reg-masks = <0x4080 0x3>; /* SERDES0 lane0 select */
+ };
+ };
+
gic500: interrupt-controller@1800000 {
compatible = "arm,gic-v3";
#address-cells = <2>;
@@ -672,4 +697,35 @@
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
};
+
+ serdes_wiz0: wiz@f000000 {
+ compatible = "ti,am64-wiz-10g";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ power-domains = <&k3_pds 162 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 162 0>, <&k3_clks 162 1>, <&serdes_refclk>;
+ clock-names = "fck", "core_ref_clk", "ext_ref_clk";
+ num-lanes = <1>;
+ #reset-cells = <1>;
+ #clock-cells = <1>;
+ ranges = <0x0f000000 0x0 0x0f000000 0x00010000>;
+
+ assigned-clocks = <&k3_clks 162 1>;
+ assigned-clock-parents = <&k3_clks 162 5>;
+
+ serdes0: serdes@f000000 {
+ compatible = "ti,j721e-serdes-10g";
+ reg = <0x0f000000 0x00010000>;
+ reg-names = "torrent_phy";
+ resets = <&serdes_wiz0 0>;
+ reset-names = "torrent_reset";
+ clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, <&serdes_wiz0 TI_WIZ_PHY_EN_REFCLK>;
+ clock-names = "refclk", "phy_en_refclk";
+ assigned-clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, <&serdes_wiz0 TI_WIZ_PLL1_REFCLK>, <&serdes_wiz0 TI_WIZ_REFCLK_DIG>;
+ assigned-clock-parents = <&k3_clks 162 1>, <&k3_clks 162 1>, <&k3_clks 162 1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #clock-cells = <1>;
+ };
+ };
};
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v2 3/6] arm64: dts: ti: k3-am64-main: Add PCIe DT node
2021-05-17 6:17 [PATCH v2 0/6] AM64: EVM/SK: Enable PCIe and USB Kishon Vijay Abraham I
2021-05-17 6:17 ` [PATCH v2 1/6] dt-bindings: mux: Convert reg-mux DT bindings to YAML Kishon Vijay Abraham I
2021-05-17 6:17 ` [PATCH v2 2/6] arm64: dts: ti: k3-am64-main: Add SERDES DT node Kishon Vijay Abraham I
@ 2021-05-17 6:17 ` Kishon Vijay Abraham I
2021-05-17 6:17 ` [PATCH v2 4/6] arm64: dts: ti: k3-am642-evm: Enable PCIe and SERDES Kishon Vijay Abraham I
` (2 subsequent siblings)
5 siblings, 0 replies; 11+ messages in thread
From: Kishon Vijay Abraham I @ 2021-05-17 6:17 UTC (permalink / raw)
To: Nishanth Menon, Tero Kristo, Rob Herring
Cc: linux-arm-kernel, devicetree, linux-kernel,
Kishon Vijay Abraham I, Lokesh Vutla, a-govindraju
AM64 has one PCIe instance which can be configured in either
host mode (RC) or device mode (EP). Add PCIe DT node for host
mode and device mode here.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 46 ++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index d4b0ddcc22ed..74fa6f918ec5 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -728,4 +728,50 @@
#clock-cells = <1>;
};
};
+
+ pcie0_rc: pcie@f102000 {
+ compatible = "ti,am64-pcie-host", "ti,j721e-pcie-host";
+ reg = <0x00 0x0f102000 0x00 0x1000>,
+ <0x00 0x0f100000 0x00 0x400>,
+ <0x00 0x0d000000 0x00 0x00800000>,
+ <0x00 0x68000000 0x00 0x00001000>;
+ reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
+ interrupt-names = "link_state";
+ interrupts = <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>;
+ device_type = "pci";
+ ti,syscon-pcie-ctrl = <&main_conf 0x4070>;
+ max-link-speed = <2>;
+ num-lanes = <1>;
+ power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 114 0>, <&serdes0 CDNS_TORRENT_REFCLK_DRIVER>;
+ clock-names = "fck", "pcie_refclk";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x0 0xff>;
+ cdns,no-bar-match-nbits = <64>;
+ vendor-id = <0x104c>;
+ device-id = <0xb010>;
+ msi-map = <0x0 &gic_its 0x0 0x10000>;
+ ranges = <0x01000000 0x00 0x68001000 0x00 0x68001000 0x00 0x0010000>,
+ <0x02000000 0x00 0x68011000 0x00 0x68011000 0x00 0x7fef000>;
+ dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x00000010 0x0>;
+ };
+
+ pcie0_ep: pcie-ep@f102000 {
+ compatible = "ti,am64-pcie-ep", "ti,j721e-pcie-ep";
+ reg = <0x00 0x0f102000 0x00 0x1000>,
+ <0x00 0x0f100000 0x00 0x400>,
+ <0x00 0x0d000000 0x00 0x00800000>,
+ <0x00 0x68000000 0x00 0x08000000>;
+ reg-names = "intd_cfg", "user_cfg", "reg", "mem";
+ interrupt-names = "link_state";
+ interrupts = <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>;
+ ti,syscon-pcie-ctrl = <&main_conf 0x4070>;
+ max-link-speed = <2>;
+ num-lanes = <1>;
+ power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 114 0>;
+ clock-names = "fck";
+ max-functions = /bits/ 8 <1>;
+ };
};
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v2 4/6] arm64: dts: ti: k3-am642-evm: Enable PCIe and SERDES
2021-05-17 6:17 [PATCH v2 0/6] AM64: EVM/SK: Enable PCIe and USB Kishon Vijay Abraham I
` (2 preceding siblings ...)
2021-05-17 6:17 ` [PATCH v2 3/6] arm64: dts: ti: k3-am64-main: Add PCIe " Kishon Vijay Abraham I
@ 2021-05-17 6:17 ` Kishon Vijay Abraham I
2021-05-17 6:17 ` [PATCH v2 5/6] arm64: dts: ti: k3-am642-sk: Enable USB Super-Speed HOST port Kishon Vijay Abraham I
2021-05-17 6:17 ` [PATCH v2 6/6] arm64: dts: ti: k3-am642-sk: Disable PCIe Kishon Vijay Abraham I
5 siblings, 0 replies; 11+ messages in thread
From: Kishon Vijay Abraham I @ 2021-05-17 6:17 UTC (permalink / raw)
To: Nishanth Menon, Tero Kristo, Rob Herring
Cc: linux-arm-kernel, devicetree, linux-kernel,
Kishon Vijay Abraham I, Lokesh Vutla, a-govindraju
AM642 EVM has a x4 lane PCIe connector. Enable PCIe in RC mode here.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
arch/arm64/boot/dts/ti/k3-am642-evm.dts | 30 +++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index dad0efa961ed..8c27f563a390 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -5,6 +5,8 @@
/dts-v1/;
+#include <dt-bindings/phy/phy.h>
+#include <dt-bindings/mux/ti-serdes.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/net/ti-dp83867.h>
@@ -466,3 +468,31 @@
&mailbox0_cluster7 {
status = "disabled";
};
+
+&serdes_ln_ctrl {
+ idle-states = <AM64_SERDES0_LANE0_PCIE0>;
+};
+
+&serdes0 {
+ serdes0_pcie_link: phy@0 {
+ reg = <0>;
+ cdns,num-lanes = <1>;
+ #phy-cells = <0>;
+ cdns,phy-type = <PHY_TYPE_PCIE>;
+ resets = <&serdes_wiz0 1>;
+ };
+};
+
+&pcie0_rc {
+ reset-gpios = <&exp1 5 GPIO_ACTIVE_HIGH>;
+ phys = <&serdes0_pcie_link>;
+ phy-names = "pcie-phy";
+ num-lanes = <1>;
+};
+
+&pcie0_ep {
+ phys = <&serdes0_pcie_link>;
+ phy-names = "pcie-phy";
+ num-lanes = <1>;
+ status = "disabled";
+};
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v2 5/6] arm64: dts: ti: k3-am642-sk: Enable USB Super-Speed HOST port
2021-05-17 6:17 [PATCH v2 0/6] AM64: EVM/SK: Enable PCIe and USB Kishon Vijay Abraham I
` (3 preceding siblings ...)
2021-05-17 6:17 ` [PATCH v2 4/6] arm64: dts: ti: k3-am642-evm: Enable PCIe and SERDES Kishon Vijay Abraham I
@ 2021-05-17 6:17 ` Kishon Vijay Abraham I
2021-05-17 6:17 ` [PATCH v2 6/6] arm64: dts: ti: k3-am642-sk: Disable PCIe Kishon Vijay Abraham I
5 siblings, 0 replies; 11+ messages in thread
From: Kishon Vijay Abraham I @ 2021-05-17 6:17 UTC (permalink / raw)
To: Nishanth Menon, Tero Kristo, Rob Herring
Cc: linux-arm-kernel, devicetree, linux-kernel,
Kishon Vijay Abraham I, Lokesh Vutla, a-govindraju
Enable USB Super-Speed HOST port.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
---
arch/arm64/boot/dts/ti/k3-am642-sk.dts | 35 ++++++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 8424cd071955..077b87656fbc 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -5,6 +5,8 @@
/dts-v1/;
+#include <dt-bindings/mux/ti-serdes.h>
+#include <dt-bindings/phy/phy.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/net/ti-dp83867.h>
#include "k3-am642.dtsi"
@@ -85,6 +87,12 @@
>;
};
+ main_usb0_pins_default: main-usb0-pins-default {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */
+ >;
+ };
+
main_i2c1_pins_default: main-i2c1-pins-default {
pinctrl-single,pins = <
AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */
@@ -235,6 +243,33 @@
disable-wp;
};
+&serdes_ln_ctrl {
+ idle-states = <AM64_SERDES0_LANE0_USB>;
+};
+
+&serdes0 {
+ serdes0_usb_link: phy@0 {
+ reg = <0>;
+ cdns,num-lanes = <1>;
+ #phy-cells = <0>;
+ cdns,phy-type = <PHY_TYPE_USB3>;
+ resets = <&serdes_wiz0 1>;
+ };
+};
+
+&usbss0 {
+ ti,vbus-divider;
+};
+
+&usb0 {
+ dr_mode = "host";
+ maximum-speed = "super-speed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_usb0_pins_default>;
+ phys = <&serdes0_usb_link>;
+ phy-names = "cdns3,usb3-phy";
+};
+
&cpsw3g {
pinctrl-names = "default";
pinctrl-0 = <&mdio1_pins_default
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v2 6/6] arm64: dts: ti: k3-am642-sk: Disable PCIe
2021-05-17 6:17 [PATCH v2 0/6] AM64: EVM/SK: Enable PCIe and USB Kishon Vijay Abraham I
` (4 preceding siblings ...)
2021-05-17 6:17 ` [PATCH v2 5/6] arm64: dts: ti: k3-am642-sk: Enable USB Super-Speed HOST port Kishon Vijay Abraham I
@ 2021-05-17 6:17 ` Kishon Vijay Abraham I
5 siblings, 0 replies; 11+ messages in thread
From: Kishon Vijay Abraham I @ 2021-05-17 6:17 UTC (permalink / raw)
To: Nishanth Menon, Tero Kristo, Rob Herring
Cc: linux-arm-kernel, devicetree, linux-kernel,
Kishon Vijay Abraham I, Lokesh Vutla, a-govindraju
AM642-SK has no PCIe slot. Disable it here.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
arch/arm64/boot/dts/ti/k3-am642-sk.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 077b87656fbc..40124007259d 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -367,3 +367,11 @@
&mailbox0_cluster7 {
status = "disabled";
};
+
+&pcie0_rc {
+ status = "disabled";
+};
+
+&pcie0_ep {
+ status = "disabled";
+};
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread