From: Steven Lee <steven_lee@aspeedtech.com>
To: Linus Walleij <linus.walleij@linaro.org>,
Bartosz Golaszewski <bgolaszewski@baylibre.com>,
Rob Herring <robh+dt@kernel.org>, Joel Stanley <joel@jms.id.au>,
Andrew Jeffery <andrew@aj.id.au>,
"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
"moderated list:ARM/ASPEED MACHINE SUPPORT"
<linux-arm-kernel@lists.infradead.org>,
"moderated list:ARM/ASPEED MACHINE SUPPORT"
<linux-aspeed@lists.ozlabs.org>,
open list <linux-kernel@vger.kernel.org>
Cc: <steven_lee@aspeedtech.com>, <Hongweiz@ami.com>,
<ryan_chen@aspeedtech.com>, <billy_tsai@aspeedtech.com>
Subject: [PATCH v4 2/7] dt-bindings: aspeed-sgpio: Add ast2600 sgpio compatibles.
Date: Mon, 7 Jun 2021 15:15:07 +0800 [thread overview]
Message-ID: <20210607071514.11727-3-steven_lee@aspeedtech.com> (raw)
In-Reply-To: <20210607071514.11727-1-steven_lee@aspeedtech.com>
AST2600 SoC has 2 SGPIO master interfaces one with 128 pins another one
with 80 pins. Add ast2600-sgpiom0-80 and ast2600-sgpiom-128 compatibles
and update descriptions to introduce the max number of available gpio
pins that AST2600 supported.
Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
---
Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml b/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml
index b2ae211411ff..0e42eded3c1e 100644
--- a/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml
+++ b/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml
@@ -10,9 +10,10 @@ maintainers:
- Andrew Jeffery <andrew@aj.id.au>
description:
- This SGPIO controller is for ASPEED AST2500 SoC, it supports up to 80 full
- featured Serial GPIOs. Each of the Serial GPIO pins can be programmed to
- support the following options
+ This SGPIO controller is for ASPEED AST2400, AST2500 and AST2600 SoC,
+ AST2600 have two sgpio master one with 128 pins another one with 80 pins,
+ AST2500/AST2400 have one sgpio master with 80 pins. Each of the Serial
+ GPIO pins can be programmed to support the following options
- Support interrupt option for each input port and various interrupt
sensitivity option (level-high, level-low, edge-high, edge-low)
- Support reset tolerance option for each output port
@@ -25,6 +26,8 @@ properties:
enum:
- aspeed,ast2400-sgpio
- aspeed,ast2500-sgpio
+ - aspeed,ast2600-sgpiom-80
+ - aspeed,ast2600-sgpiom-128
reg:
maxItems: 1
--
2.17.1
next prev parent reply other threads:[~2021-06-07 7:15 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-07 7:15 [PATCH v4 0/7] ASPEED sgpio driver enhancement Steven Lee
2021-06-07 7:15 ` [PATCH v4 1/7] dt-bindings: aspeed-sgpio: Convert txt bindings to yaml Steven Lee
2021-06-07 7:15 ` Steven Lee [this message]
2021-06-07 23:22 ` [PATCH v4 2/7] dt-bindings: aspeed-sgpio: Add ast2600 sgpio compatibles Andrew Jeffery
2021-06-07 7:15 ` [PATCH v4 3/7] ARM: dts: aspeed-g6: Add SGPIO node Steven Lee
2021-06-07 23:28 ` Andrew Jeffery
2021-06-08 2:25 ` Steven Lee
2021-06-07 7:15 ` [PATCH v4 4/7] gpio: gpio-aspeed-sgpio: Add AST2600 sgpio support Steven Lee
2021-06-07 23:43 ` Andrew Jeffery
2021-06-08 2:50 ` Steven Lee
2021-06-08 3:22 ` Andrew Jeffery
2021-06-07 7:15 ` [PATCH v4 5/7] gpio: gpio-aspeed-sgpio: Add set_config function Steven Lee
2021-06-07 23:48 ` Andrew Jeffery
2021-06-07 7:15 ` [PATCH v4 6/7] gpio: gpio-aspeed-sgpio: Move irq_chip to aspeed-sgpio struct Steven Lee
2021-06-07 7:15 ` [PATCH v4 7/7] gpio: gpio-aspeed-sgpio: Use generic device property APIs Steven Lee
2021-06-07 23:52 ` Andrew Jeffery
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210607071514.11727-3-steven_lee@aspeedtech.com \
--to=steven_lee@aspeedtech.com \
--cc=Hongweiz@ami.com \
--cc=andrew@aj.id.au \
--cc=bgolaszewski@baylibre.com \
--cc=billy_tsai@aspeedtech.com \
--cc=devicetree@vger.kernel.org \
--cc=joel@jms.id.au \
--cc=linus.walleij@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-aspeed@lists.ozlabs.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=robh+dt@kernel.org \
--cc=ryan_chen@aspeedtech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).