* [PATCH 1/3] dt-bindings: dma: ingenic: Add compatible strings for MDMA
@ 2021-07-18 12:20 Paul Cercueil
2021-07-18 12:20 ` [PATCH 2/3] dma: jz4780: Work around hardware bug on JZ4760 SoCs Paul Cercueil
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Paul Cercueil @ 2021-07-18 12:20 UTC (permalink / raw)
To: Vinod Koul, Rob Herring
Cc: dmaengine, devicetree, linux-kernel, linux-mips, list, Paul Cercueil
The JZ4760 and JZ4760B SoCs have an additional DMA controller, dubbed
MDMA, that only supports memcpy operations.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
Documentation/devicetree/bindings/dma/ingenic,dma.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/dma/ingenic,dma.yaml b/Documentation/devicetree/bindings/dma/ingenic,dma.yaml
index ac4d59494fc8..fe25af0dc0e7 100644
--- a/Documentation/devicetree/bindings/dma/ingenic,dma.yaml
+++ b/Documentation/devicetree/bindings/dma/ingenic,dma.yaml
@@ -18,7 +18,9 @@ properties:
- ingenic,jz4740-dma
- ingenic,jz4725b-dma
- ingenic,jz4760-dma
+ - ingenic,jz4760-mdma
- ingenic,jz4760b-dma
+ - ingenic,jz4760b-mdma
- ingenic,jz4770-dma
- ingenic,jz4780-dma
- ingenic,x1000-dma
--
2.30.2
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/3] dma: jz4780: Work around hardware bug on JZ4760 SoCs
2021-07-18 12:20 [PATCH 1/3] dt-bindings: dma: ingenic: Add compatible strings for MDMA Paul Cercueil
@ 2021-07-18 12:20 ` Paul Cercueil
2021-07-18 12:20 ` [PATCH 3/3] dma: jz4780: Add support for the MDMA in the JZ4760(B) Paul Cercueil
2021-07-29 18:41 ` [PATCH 1/3] dt-bindings: dma: ingenic: Add compatible strings for MDMA Rob Herring
2 siblings, 0 replies; 6+ messages in thread
From: Paul Cercueil @ 2021-07-18 12:20 UTC (permalink / raw)
To: Vinod Koul, Rob Herring
Cc: dmaengine, devicetree, linux-kernel, linux-mips, list, Paul Cercueil
The JZ4760 SoC has a hardware problem with chan0 not enabling properly
if it's enabled before chan1, after a reset (works fine afterwards).
This is worked around in the probe function by just enabling then
disabling chan1.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
drivers/dma/dma-jz4780.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/dma/dma-jz4780.c b/drivers/dma/dma-jz4780.c
index ebee94dbd630..d71bc7235959 100644
--- a/drivers/dma/dma-jz4780.c
+++ b/drivers/dma/dma-jz4780.c
@@ -937,6 +937,14 @@ static int jz4780_dma_probe(struct platform_device *pdev)
jzchan->vchan.desc_free = jz4780_dma_desc_free;
}
+ /*
+ * On JZ4760, chan0 won't enable properly the first time.
+ * Enabling then disabling chan1 will magically make chan0 work
+ * correctly.
+ */
+ jz4780_dma_chan_enable(jzdma, 1);
+ jz4780_dma_chan_disable(jzdma, 1);
+
ret = platform_get_irq(pdev, 0);
if (ret < 0)
goto err_disable_clk;
--
2.30.2
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 3/3] dma: jz4780: Add support for the MDMA in the JZ4760(B)
2021-07-18 12:20 [PATCH 1/3] dt-bindings: dma: ingenic: Add compatible strings for MDMA Paul Cercueil
2021-07-18 12:20 ` [PATCH 2/3] dma: jz4780: Work around hardware bug on JZ4760 SoCs Paul Cercueil
@ 2021-07-18 12:20 ` Paul Cercueil
2021-07-28 7:16 ` Vinod Koul
2021-07-29 18:41 ` [PATCH 1/3] dt-bindings: dma: ingenic: Add compatible strings for MDMA Rob Herring
2 siblings, 1 reply; 6+ messages in thread
From: Paul Cercueil @ 2021-07-18 12:20 UTC (permalink / raw)
To: Vinod Koul, Rob Herring
Cc: dmaengine, devicetree, linux-kernel, linux-mips, list, Paul Cercueil
The JZ4760 and JZ4760B SoCs have two regular DMA controllers with 6
channels each. They also have an extra DMA controller named MDMA
with only 2 channels, that only supports memcpy operations.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
drivers/dma/dma-jz4780.c | 22 ++++++++++++++++++++--
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/dma-jz4780.c b/drivers/dma/dma-jz4780.c
index d71bc7235959..eed505e3cce2 100644
--- a/drivers/dma/dma-jz4780.c
+++ b/drivers/dma/dma-jz4780.c
@@ -93,6 +93,7 @@
#define JZ_SOC_DATA_PER_CHAN_PM BIT(2)
#define JZ_SOC_DATA_NO_DCKES_DCKEC BIT(3)
#define JZ_SOC_DATA_BREAK_LINKS BIT(4)
+#define JZ_SOC_DATA_ONLY_MEMCPY BIT(5)
/**
* struct jz4780_dma_hwdesc - descriptor structure read by the DMA controller.
@@ -896,8 +897,10 @@ static int jz4780_dma_probe(struct platform_device *pdev)
dd = &jzdma->dma_device;
dma_cap_set(DMA_MEMCPY, dd->cap_mask);
- dma_cap_set(DMA_SLAVE, dd->cap_mask);
- dma_cap_set(DMA_CYCLIC, dd->cap_mask);
+ if (!(soc_data->flags & JZ_SOC_DATA_ONLY_MEMCPY)) {
+ dma_cap_set(DMA_SLAVE, dd->cap_mask);
+ dma_cap_set(DMA_CYCLIC, dd->cap_mask);
+ }
dd->dev = dev;
dd->copy_align = DMAENGINE_ALIGN_4_BYTES;
@@ -1018,12 +1021,25 @@ static const struct jz4780_dma_soc_data jz4760_dma_soc_data = {
.flags = JZ_SOC_DATA_PER_CHAN_PM | JZ_SOC_DATA_NO_DCKES_DCKEC,
};
+static const struct jz4780_dma_soc_data jz4760_mdma_soc_data = {
+ .nb_channels = 2,
+ .transfer_ord_max = 6,
+ .flags = JZ_SOC_DATA_PER_CHAN_PM | JZ_SOC_DATA_NO_DCKES_DCKEC |
+ JZ_SOC_DATA_ONLY_MEMCPY,
+};
+
static const struct jz4780_dma_soc_data jz4760b_dma_soc_data = {
.nb_channels = 5,
.transfer_ord_max = 6,
.flags = JZ_SOC_DATA_PER_CHAN_PM,
};
+static const struct jz4780_dma_soc_data jz4760b_mdma_soc_data = {
+ .nb_channels = 2,
+ .transfer_ord_max = 6,
+ .flags = JZ_SOC_DATA_PER_CHAN_PM | JZ_SOC_DATA_ONLY_MEMCPY,
+};
+
static const struct jz4780_dma_soc_data jz4770_dma_soc_data = {
.nb_channels = 6,
.transfer_ord_max = 6,
@@ -1052,7 +1068,9 @@ static const struct of_device_id jz4780_dma_dt_match[] = {
{ .compatible = "ingenic,jz4740-dma", .data = &jz4740_dma_soc_data },
{ .compatible = "ingenic,jz4725b-dma", .data = &jz4725b_dma_soc_data },
{ .compatible = "ingenic,jz4760-dma", .data = &jz4760_dma_soc_data },
+ { .compatible = "ingenic,jz4760-mdma", .data = &jz4760_mdma_soc_data },
{ .compatible = "ingenic,jz4760b-dma", .data = &jz4760b_dma_soc_data },
+ { .compatible = "ingenic,jz4760b-mdma", .data = &jz4760b_mdma_soc_data },
{ .compatible = "ingenic,jz4770-dma", .data = &jz4770_dma_soc_data },
{ .compatible = "ingenic,jz4780-dma", .data = &jz4780_dma_soc_data },
{ .compatible = "ingenic,x1000-dma", .data = &x1000_dma_soc_data },
--
2.30.2
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 3/3] dma: jz4780: Add support for the MDMA in the JZ4760(B)
2021-07-18 12:20 ` [PATCH 3/3] dma: jz4780: Add support for the MDMA in the JZ4760(B) Paul Cercueil
@ 2021-07-28 7:16 ` Vinod Koul
2021-07-28 8:22 ` Paul Cercueil
0 siblings, 1 reply; 6+ messages in thread
From: Vinod Koul @ 2021-07-28 7:16 UTC (permalink / raw)
To: Paul Cercueil
Cc: Rob Herring, dmaengine, devicetree, linux-kernel, linux-mips, list
On 18-07-21, 13:20, Paul Cercueil wrote:
> The JZ4760 and JZ4760B SoCs have two regular DMA controllers with 6
> channels each. They also have an extra DMA controller named MDMA
> with only 2 channels, that only supports memcpy operations.
It is dmaengine not dma:
>
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
> ---
> drivers/dma/dma-jz4780.c | 22 ++++++++++++++++++++--
> 1 file changed, 20 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/dma/dma-jz4780.c b/drivers/dma/dma-jz4780.c
> index d71bc7235959..eed505e3cce2 100644
> --- a/drivers/dma/dma-jz4780.c
> +++ b/drivers/dma/dma-jz4780.c
> @@ -93,6 +93,7 @@
> #define JZ_SOC_DATA_PER_CHAN_PM BIT(2)
> #define JZ_SOC_DATA_NO_DCKES_DCKEC BIT(3)
> #define JZ_SOC_DATA_BREAK_LINKS BIT(4)
> +#define JZ_SOC_DATA_ONLY_MEMCPY BIT(5)
Why -ve logic? Looks like MEMCPY is eveywhere and only peripheral is not
there at few SoC, so use JZ_SOC_DATA_PERIPHERAL
>
> /**
> * struct jz4780_dma_hwdesc - descriptor structure read by the DMA controller.
> @@ -896,8 +897,10 @@ static int jz4780_dma_probe(struct platform_device *pdev)
> dd = &jzdma->dma_device;
>
> dma_cap_set(DMA_MEMCPY, dd->cap_mask);
> - dma_cap_set(DMA_SLAVE, dd->cap_mask);
> - dma_cap_set(DMA_CYCLIC, dd->cap_mask);
> + if (!(soc_data->flags & JZ_SOC_DATA_ONLY_MEMCPY)) {
> + dma_cap_set(DMA_SLAVE, dd->cap_mask);
> + dma_cap_set(DMA_CYCLIC, dd->cap_mask);
> + }
and set this if JZ_SOC_DATA_PERIPHERAL is set?
>
> dd->dev = dev;
> dd->copy_align = DMAENGINE_ALIGN_4_BYTES;
> @@ -1018,12 +1021,25 @@ static const struct jz4780_dma_soc_data jz4760_dma_soc_data = {
> .flags = JZ_SOC_DATA_PER_CHAN_PM | JZ_SOC_DATA_NO_DCKES_DCKEC,
> };
>
> +static const struct jz4780_dma_soc_data jz4760_mdma_soc_data = {
> + .nb_channels = 2,
> + .transfer_ord_max = 6,
> + .flags = JZ_SOC_DATA_PER_CHAN_PM | JZ_SOC_DATA_NO_DCKES_DCKEC |
> + JZ_SOC_DATA_ONLY_MEMCPY,
> +};
> +
> static const struct jz4780_dma_soc_data jz4760b_dma_soc_data = {
> .nb_channels = 5,
> .transfer_ord_max = 6,
> .flags = JZ_SOC_DATA_PER_CHAN_PM,
> };
>
> +static const struct jz4780_dma_soc_data jz4760b_mdma_soc_data = {
> + .nb_channels = 2,
> + .transfer_ord_max = 6,
> + .flags = JZ_SOC_DATA_PER_CHAN_PM | JZ_SOC_DATA_ONLY_MEMCPY,
> +};
> +
> static const struct jz4780_dma_soc_data jz4770_dma_soc_data = {
> .nb_channels = 6,
> .transfer_ord_max = 6,
> @@ -1052,7 +1068,9 @@ static const struct of_device_id jz4780_dma_dt_match[] = {
> { .compatible = "ingenic,jz4740-dma", .data = &jz4740_dma_soc_data },
> { .compatible = "ingenic,jz4725b-dma", .data = &jz4725b_dma_soc_data },
> { .compatible = "ingenic,jz4760-dma", .data = &jz4760_dma_soc_data },
> + { .compatible = "ingenic,jz4760-mdma", .data = &jz4760_mdma_soc_data },
> { .compatible = "ingenic,jz4760b-dma", .data = &jz4760b_dma_soc_data },
> + { .compatible = "ingenic,jz4760b-mdma", .data = &jz4760b_mdma_soc_data },
> { .compatible = "ingenic,jz4770-dma", .data = &jz4770_dma_soc_data },
> { .compatible = "ingenic,jz4780-dma", .data = &jz4780_dma_soc_data },
> { .compatible = "ingenic,x1000-dma", .data = &x1000_dma_soc_data },
> --
> 2.30.2
--
~Vinod
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 3/3] dma: jz4780: Add support for the MDMA in the JZ4760(B)
2021-07-28 7:16 ` Vinod Koul
@ 2021-07-28 8:22 ` Paul Cercueil
0 siblings, 0 replies; 6+ messages in thread
From: Paul Cercueil @ 2021-07-28 8:22 UTC (permalink / raw)
To: Vinod Koul
Cc: Rob Herring, dmaengine, devicetree, linux-kernel, linux-mips, list
Hi Vinod,
Le mer., juil. 28 2021 at 12:46:20 +0530, Vinod Koul <vkoul@kernel.org>
a écrit :
> On 18-07-21, 13:20, Paul Cercueil wrote:
>> The JZ4760 and JZ4760B SoCs have two regular DMA controllers with 6
>> channels each. They also have an extra DMA controller named MDMA
>> with only 2 channels, that only supports memcpy operations.
>
> It is dmaengine not dma:
>
>>
>> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
>> ---
>> drivers/dma/dma-jz4780.c | 22 ++++++++++++++++++++--
>> 1 file changed, 20 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/dma/dma-jz4780.c b/drivers/dma/dma-jz4780.c
>> index d71bc7235959..eed505e3cce2 100644
>> --- a/drivers/dma/dma-jz4780.c
>> +++ b/drivers/dma/dma-jz4780.c
>> @@ -93,6 +93,7 @@
>> #define JZ_SOC_DATA_PER_CHAN_PM BIT(2)
>> #define JZ_SOC_DATA_NO_DCKES_DCKEC BIT(3)
>> #define JZ_SOC_DATA_BREAK_LINKS BIT(4)
>> +#define JZ_SOC_DATA_ONLY_MEMCPY BIT(5)
>
> Why -ve logic? Looks like MEMCPY is eveywhere and only peripheral is
> not
> there at few SoC, so use JZ_SOC_DATA_PERIPHERAL
That means touching every other jz4780_dma_soc_data structure in a
patch that's focused on one SoC. That means a messy patch, and I don't
like that.
Negative logic is a problem if it makes it harder to understand, I
don't think it's the case here. Besides, we already have
JZ_SOC_DATA_NO_DCKES_DCKEC.
Cheers,
-Paul
>>
>> /**
>> * struct jz4780_dma_hwdesc - descriptor structure read by the DMA
>> controller.
>> @@ -896,8 +897,10 @@ static int jz4780_dma_probe(struct
>> platform_device *pdev)
>> dd = &jzdma->dma_device;
>>
>> dma_cap_set(DMA_MEMCPY, dd->cap_mask);
>> - dma_cap_set(DMA_SLAVE, dd->cap_mask);
>> - dma_cap_set(DMA_CYCLIC, dd->cap_mask);
>> + if (!(soc_data->flags & JZ_SOC_DATA_ONLY_MEMCPY)) {
>> + dma_cap_set(DMA_SLAVE, dd->cap_mask);
>> + dma_cap_set(DMA_CYCLIC, dd->cap_mask);
>> + }
>
> and set this if JZ_SOC_DATA_PERIPHERAL is set?
>
>>
>> dd->dev = dev;
>> dd->copy_align = DMAENGINE_ALIGN_4_BYTES;
>> @@ -1018,12 +1021,25 @@ static const struct jz4780_dma_soc_data
>> jz4760_dma_soc_data = {
>> .flags = JZ_SOC_DATA_PER_CHAN_PM | JZ_SOC_DATA_NO_DCKES_DCKEC,
>> };
>>
>> +static const struct jz4780_dma_soc_data jz4760_mdma_soc_data = {
>> + .nb_channels = 2,
>> + .transfer_ord_max = 6,
>> + .flags = JZ_SOC_DATA_PER_CHAN_PM | JZ_SOC_DATA_NO_DCKES_DCKEC |
>> + JZ_SOC_DATA_ONLY_MEMCPY,
>> +};
>> +
>> static const struct jz4780_dma_soc_data jz4760b_dma_soc_data = {
>> .nb_channels = 5,
>> .transfer_ord_max = 6,
>> .flags = JZ_SOC_DATA_PER_CHAN_PM,
>> };
>>
>> +static const struct jz4780_dma_soc_data jz4760b_mdma_soc_data = {
>> + .nb_channels = 2,
>> + .transfer_ord_max = 6,
>> + .flags = JZ_SOC_DATA_PER_CHAN_PM | JZ_SOC_DATA_ONLY_MEMCPY,
>> +};
>> +
>> static const struct jz4780_dma_soc_data jz4770_dma_soc_data = {
>> .nb_channels = 6,
>> .transfer_ord_max = 6,
>> @@ -1052,7 +1068,9 @@ static const struct of_device_id
>> jz4780_dma_dt_match[] = {
>> { .compatible = "ingenic,jz4740-dma", .data =
>> &jz4740_dma_soc_data },
>> { .compatible = "ingenic,jz4725b-dma", .data =
>> &jz4725b_dma_soc_data },
>> { .compatible = "ingenic,jz4760-dma", .data =
>> &jz4760_dma_soc_data },
>> + { .compatible = "ingenic,jz4760-mdma", .data =
>> &jz4760_mdma_soc_data },
>> { .compatible = "ingenic,jz4760b-dma", .data =
>> &jz4760b_dma_soc_data },
>> + { .compatible = "ingenic,jz4760b-mdma", .data =
>> &jz4760b_mdma_soc_data },
>> { .compatible = "ingenic,jz4770-dma", .data =
>> &jz4770_dma_soc_data },
>> { .compatible = "ingenic,jz4780-dma", .data =
>> &jz4780_dma_soc_data },
>> { .compatible = "ingenic,x1000-dma", .data = &x1000_dma_soc_data
>> },
>> --
>> 2.30.2
>
> --
> ~Vinod
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/3] dt-bindings: dma: ingenic: Add compatible strings for MDMA
2021-07-18 12:20 [PATCH 1/3] dt-bindings: dma: ingenic: Add compatible strings for MDMA Paul Cercueil
2021-07-18 12:20 ` [PATCH 2/3] dma: jz4780: Work around hardware bug on JZ4760 SoCs Paul Cercueil
2021-07-18 12:20 ` [PATCH 3/3] dma: jz4780: Add support for the MDMA in the JZ4760(B) Paul Cercueil
@ 2021-07-29 18:41 ` Rob Herring
2 siblings, 0 replies; 6+ messages in thread
From: Rob Herring @ 2021-07-29 18:41 UTC (permalink / raw)
To: Paul Cercueil
Cc: list, Rob Herring, linux-mips, Vinod Koul, linux-kernel,
dmaengine, devicetree
On Sun, 18 Jul 2021 13:20:22 +0100, Paul Cercueil wrote:
> The JZ4760 and JZ4760B SoCs have an additional DMA controller, dubbed
> MDMA, that only supports memcpy operations.
>
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
> ---
> Documentation/devicetree/bindings/dma/ingenic,dma.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2021-07-29 18:42 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-07-18 12:20 [PATCH 1/3] dt-bindings: dma: ingenic: Add compatible strings for MDMA Paul Cercueil
2021-07-18 12:20 ` [PATCH 2/3] dma: jz4780: Work around hardware bug on JZ4760 SoCs Paul Cercueil
2021-07-18 12:20 ` [PATCH 3/3] dma: jz4780: Add support for the MDMA in the JZ4760(B) Paul Cercueil
2021-07-28 7:16 ` Vinod Koul
2021-07-28 8:22 ` Paul Cercueil
2021-07-29 18:41 ` [PATCH 1/3] dt-bindings: dma: ingenic: Add compatible strings for MDMA Rob Herring
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