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From: Douglas Anderson <dianders@chromium.org>
To: dri-devel@lists.freedesktop.org
Cc: tzimmermann@suse.de, linux-arm-msm@vger.kernel.org,
	a.hajda@samsung.com, sam@ravnborg.org, airlied@linux.ie,
	bjorn.andersson@linaro.org, daniel@ffwll.ch,
	devicetree@vger.kernel.org, rodrigo.vivi@intel.com,
	jonas@kwiboo.se, narmstrong@baylibre.com,
	Laurent.pinchart@ideasonboard.com, robert.foss@linaro.org,
	jernej.skrabec@gmail.com, mripard@kernel.org,
	linus.walleij@linaro.org, maarten.lankhorst@linux.intel.com,
	rajeevny@codeaurora.org, lyude@redhat.com,
	thierry.reding@gmail.com, steev@kali.org,
	Douglas Anderson <dianders@chromium.org>,
	linux-kernel@vger.kernel.org
Subject: [PATCH 3/6] drm/bridge: ti-sn65dsi86: Add some 100 us delays
Date: Wed, 28 Jul 2021 09:45:54 -0700	[thread overview]
Message-ID: <20210728094511.3.I842d483139531aa4651da8338512fdf0171ff23c@changeid> (raw)
In-Reply-To: <20210728164557.1882787-1-dianders@chromium.org>

The manual has always said that we need 100 us delays in a few
places. Though it hasn't seemed to be a big deal to skip these, let's
add them in case it makes something happier.

NOTE: this fixes no known issues but it seems good to make it right.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
---

 drivers/gpu/drm/bridge/ti-sn65dsi86.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
index 5e932070a1c3..cd0fccdd8dfd 100644
--- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
+++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
@@ -307,6 +307,9 @@ static int __maybe_unused ti_sn65dsi86_resume(struct device *dev)
 		return ret;
 	}
 
+	/* td2: min 100 us after regulators before enabling the GPIO */
+	usleep_range(100, 110);
+
 	gpiod_set_value(pdata->enable_gpio, 1);
 
 	/*
@@ -1096,6 +1099,9 @@ static void ti_sn_bridge_pre_enable(struct drm_bridge *bridge)
 
 	if (!pdata->refclk)
 		ti_sn65dsi86_enable_comms(pdata);
+
+	/* td7: min 100 us after enable before DSI data */
+	usleep_range(100, 110);
 }
 
 static void ti_sn_bridge_post_disable(struct drm_bridge *bridge)
-- 
2.32.0.432.gabb21c7263-goog


  parent reply	other threads:[~2021-07-28 16:46 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-28 16:45 [PATCH 0/6] drm/panel: atna33xc20: Fix the Samsung ATNA33XC20 panel Douglas Anderson
2021-07-28 16:45 ` [PATCH 1/6] drm/dp: Don't zero PWMGEN_BIT_COUNT when driver_pwm_freq_hz not specified Douglas Anderson
2021-07-28 16:45 ` [PATCH 2/6] drm/bridge: ti-sn65dsi86: Fix power off sequence Douglas Anderson
2021-07-29 11:47   ` Robert Foss
2021-07-28 16:45 ` Douglas Anderson [this message]
2021-07-29 11:48   ` [PATCH 3/6] drm/bridge: ti-sn65dsi86: Add some 100 us delays Robert Foss
2021-07-28 16:45 ` [PATCH 4/6] Revert "drm/panel-simple: Add Samsung ATNA33XC20" Douglas Anderson
2021-07-28 16:45 ` [PATCH 5/6] Revert "drm/panel-simple: Support for delays between GPIO & regulator" Douglas Anderson
2021-07-28 16:45 ` [PATCH 6/6] drm/panel: atna33xc20: Introduce the Samsung ATNA33XC20 panel Douglas Anderson
2021-07-29 19:42 ` [PATCH 0/6] drm/panel: atna33xc20: Fix " Sean Paul

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