From: Vineet Gupta <vgupta@kernel.org>
To: linux-snps-arc@lists.infradead.org
Cc: linux-kernel@vger.kernel.org, linux-mm@kvack.org,
Anshuman Khandual <anshuman.khandual@arm.com>,
Mike Rapoport <rppt@kernel.org>, Vineet Gupta <vgupta@kernel.org>
Subject: [PATCH 01/18] ARC: mm: simplify mmu scratch register assingment to mmu needs
Date: Tue, 10 Aug 2021 17:42:41 -0700 [thread overview]
Message-ID: <20210811004258.138075-2-vgupta@kernel.org> (raw)
In-Reply-To: <20210811004258.138075-1-vgupta@kernel.org>
ARC700 SMP uses MMU scratch reg for re-entrant interrupt handling (as
opposed to the canonical usage for task pgd pointer caching for ARCv2
and ARC700 UP builds). However this requires fabricating a #define in a
header which has usual issues of dependency nesting and ugliness.
So clean this up and just use it as intended for ARCv2 only.
For ARC700 just don't use it for mmu needs (even for UP which it
potentially can (degrades it slightly) but that config it not a
big deal in this day and age.
Signed-off-by: Vineet Gupta <vgupta@kernel.org>
---
arch/arc/include/asm/entry-compact.h | 8 --------
arch/arc/include/asm/mmu.h | 4 ----
arch/arc/include/asm/mmu_context.h | 2 +-
arch/arc/mm/tlb.c | 4 ++--
arch/arc/mm/tlbex.S | 2 +-
5 files changed, 4 insertions(+), 16 deletions(-)
diff --git a/arch/arc/include/asm/entry-compact.h b/arch/arc/include/asm/entry-compact.h
index 6dbf5cecc8cc..5aab4f93ab8a 100644
--- a/arch/arc/include/asm/entry-compact.h
+++ b/arch/arc/include/asm/entry-compact.h
@@ -126,19 +126,11 @@
* to be saved again on kernel mode stack, as part of pt_regs.
*-------------------------------------------------------------*/
.macro PROLOG_FREEUP_REG reg, mem
-#ifndef ARC_USE_SCRATCH_REG
- sr \reg, [ARC_REG_SCRATCH_DATA0]
-#else
st \reg, [\mem]
-#endif
.endm
.macro PROLOG_RESTORE_REG reg, mem
-#ifndef ARC_USE_SCRATCH_REG
- lr \reg, [ARC_REG_SCRATCH_DATA0]
-#else
ld \reg, [\mem]
-#endif
.endm
/*--------------------------------------------------------------
diff --git a/arch/arc/include/asm/mmu.h b/arch/arc/include/asm/mmu.h
index a81d1975866a..4065335a7922 100644
--- a/arch/arc/include/asm/mmu.h
+++ b/arch/arc/include/asm/mmu.h
@@ -31,10 +31,6 @@
#define ARC_REG_SCRATCH_DATA0 0x46c
#endif
-#if defined(CONFIG_ISA_ARCV2) || !defined(CONFIG_SMP)
-#define ARC_USE_SCRATCH_REG
-#endif
-
/* Bits in MMU PID register */
#define __TLB_ENABLE (1 << 31)
#define __PROG_ENABLE (1 << 30)
diff --git a/arch/arc/include/asm/mmu_context.h b/arch/arc/include/asm/mmu_context.h
index df164066e172..49318a126879 100644
--- a/arch/arc/include/asm/mmu_context.h
+++ b/arch/arc/include/asm/mmu_context.h
@@ -146,7 +146,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
*/
cpumask_set_cpu(cpu, mm_cpumask(next));
-#ifdef ARC_USE_SCRATCH_REG
+#ifdef CONFIG_ISA_ARCV2
/* PGD cached in MMU reg to avoid 3 mem lookups: task->mm->pgd */
write_aux_reg(ARC_REG_SCRATCH_DATA0, next->pgd);
#endif
diff --git a/arch/arc/mm/tlb.c b/arch/arc/mm/tlb.c
index 8696829d37c0..349fb7a75d1d 100644
--- a/arch/arc/mm/tlb.c
+++ b/arch/arc/mm/tlb.c
@@ -719,8 +719,8 @@ void arc_mmu_init(void)
/* Enable the MMU */
write_aux_reg(ARC_REG_PID, MMU_ENABLE);
- /* In smp we use this reg for interrupt 1 scratch */
-#ifdef ARC_USE_SCRATCH_REG
+ /* In arc700/smp needed for re-entrant interrupt handling */
+#ifdef CONFIG_ISA_ARCV2
/* swapper_pg_dir is the pgd for the kernel, used by vmalloc */
write_aux_reg(ARC_REG_SCRATCH_DATA0, swapper_pg_dir);
#endif
diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S
index 96c3a5de9dd4..bcd2909c691f 100644
--- a/arch/arc/mm/tlbex.S
+++ b/arch/arc/mm/tlbex.S
@@ -202,7 +202,7 @@ ex_saved_reg1:
lr r2, [efa]
-#ifdef ARC_USE_SCRATCH_REG
+#ifdef CONFIG_ISA_ARCV2
lr r1, [ARC_REG_SCRATCH_DATA0] ; current pgd
#else
GET_CURR_TASK_ON_CPU r1
--
2.25.1
next prev parent reply other threads:[~2021-08-11 0:43 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-11 0:42 [PATCH 00/18] ARC mm updates to support 3 or 4 levels of paging Vineet Gupta
2021-08-11 0:42 ` Vineet Gupta [this message]
2021-08-11 0:42 ` [PATCH 02/18] ARC: mm: remove tlb paranoid code Vineet Gupta
2021-08-11 0:42 ` [PATCH 03/18] ARC: mm: move mmu/cache externs out to setup.h Vineet Gupta
2021-08-11 5:10 ` Mike Rapoport
2021-08-11 18:46 ` Vineet Gupta
2021-08-11 0:42 ` [PATCH 04/18] ARC: mm: remove pgd_offset_fast Vineet Gupta
2021-08-11 5:12 ` Mike Rapoport
2021-08-11 18:54 ` Vineet Gupta
2021-08-11 0:42 ` [PATCH 05/18] ARC: mm: Fixes to allow STRICT_MM_TYPECHECKS Vineet Gupta
2021-08-11 0:42 ` [PATCH 06/18] ARC: mm: Enable STRICT_MM_TYPECHECKS Vineet Gupta
2021-08-11 12:04 ` Mike Rapoport
2021-08-11 19:01 ` Vineet Gupta
2021-08-11 0:42 ` [PATCH 07/18] ARC: ioremap: use more commonly used PAGE_KERNEL based uncached flag Vineet Gupta
2021-08-11 5:18 ` Mike Rapoport
2021-08-11 18:58 ` Vineet Gupta
2021-08-11 0:42 ` [PATCH 08/18] ARC: mm: pmd_populate* to use the canonical set_pmd (and drop pmd_set) Vineet Gupta
2021-08-11 0:42 ` [PATCH 09/18] ARC: mm: non-functional code cleanup ahead of 3 levels Vineet Gupta
2021-08-11 12:31 ` Mike Rapoport
2021-08-12 1:37 ` Vineet Gupta
2021-08-12 6:18 ` Mike Rapoport
2021-08-12 18:58 ` Vineet Gupta
2021-08-11 0:42 ` [PATCH 10/18] ARC: mm: move MMU specific bits out of ASID allocator Vineet Gupta
2021-08-11 0:42 ` [PATCH 11/18] ARC: mm: move MMU specific bits out of entry code Vineet Gupta
2021-08-11 12:15 ` Mike Rapoport
2021-08-11 19:30 ` Vineet Gupta
2021-08-11 0:42 ` [PATCH 12/18] ARC: mm: disintegrate mmu.h (arcv2 bits out) Vineet Gupta
2021-08-11 0:42 ` [PATCH 13/18] ARC: mm: disintegrate pgtable.h into levels and flags Vineet Gupta
2021-08-11 0:42 ` [PATCH 14/18] ARC: mm: hack to allow 2 level build with 4 level code Vineet Gupta
2021-08-11 0:42 ` [PATCH 15/18] ARC: mm: support 3 levels of page tables Vineet Gupta
2021-08-11 12:24 ` Mike Rapoport
2021-08-11 22:15 ` Vineet Gupta
2021-08-11 0:42 ` [PATCH 16/18] ARC: mm: support 4 " Vineet Gupta
2021-08-11 12:28 ` Mike Rapoport
2021-08-11 22:17 ` Vineet Gupta
2021-08-11 0:42 ` [PATCH 17/18] ARC: mm: vmalloc sync from kernel to user table to update PMD Vineet Gupta
2021-08-11 0:42 ` [PATCH 18/18] ARC: mm: introduce _PAGE_TABLE to explicitly link pgd,pud,pmd entries Vineet Gupta
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210811004258.138075-2-vgupta@kernel.org \
--to=vgupta@kernel.org \
--cc=anshuman.khandual@arm.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mm@kvack.org \
--cc=linux-snps-arc@lists.infradead.org \
--cc=rppt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).