From: Chun-Jie Chen <chun-jie.chen@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Nicolas Boichat <drinkcat@chromium.org>
Cc: <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>,
<srv_heupstream@mediatek.com>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
Chun-Jie Chen <chun-jie.chen@mediatek.com>
Subject: [v1 2/5] arm64: dts: mediatek: Correct UART clock of MT8192
Date: Wed, 25 Aug 2021 09:11:17 +0800 [thread overview]
Message-ID: <20210825011120.30481-3-chun-jie.chen@mediatek.com> (raw)
In-Reply-To: <20210825011120.30481-1-chun-jie.chen@mediatek.com>
update uart0 and uart1 bus clock to the real one.
Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 2b63d2ea6cb6..31d135e18784 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -327,7 +327,7 @@
"mediatek,mt6577-uart";
reg = <0 0x11002000 0 0x1000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&clk26m>, <&clk26m>;
+ clocks = <&clk26m>, <&infracfg CLK_INFRA_UART0>;
clock-names = "baud", "bus";
status = "disabled";
};
@@ -337,7 +337,7 @@
"mediatek,mt6577-uart";
reg = <0 0x11003000 0 0x1000>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&clk26m>, <&clk26m>;
+ clocks = <&clk26m>, <&infracfg CLK_INFRA_UART1>;
clock-names = "baud", "bus";
status = "disabled";
};
--
2.18.0
next prev parent reply other threads:[~2021-08-25 1:11 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20210825011120.30481-1-chun-jie.chen@mediatek.com>
2021-08-25 1:11 ` [v1 1/5] arm64: dts: mediatek: Correct system timer clock of MT8192 Chun-Jie Chen
2021-12-06 16:41 ` Nícolas F. R. A. Prado
2021-08-25 1:11 ` Chun-Jie Chen [this message]
2021-12-06 16:44 ` [v1 2/5] arm64: dts: mediatek: Correct UART " Nícolas F. R. A. Prado
2021-08-25 1:11 ` [v1 3/5] arm64: dts: mediatek: Correct SPI " Chun-Jie Chen
2021-12-06 16:47 ` Nícolas F. R. A. Prado
2021-08-25 1:11 ` [v1 4/5] arm64: dts: mediatek: Correct Nor Flash " Chun-Jie Chen
2021-12-06 16:48 ` Nícolas F. R. A. Prado
2021-08-25 1:11 ` [v1 5/5] arm64: dts: mediatek: Correct I2C " Chun-Jie Chen
2021-12-06 16:49 ` Nícolas F. R. A. Prado
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210825011120.30481-3-chun-jie.chen@mediatek.com \
--to=chun-jie.chen@mediatek.com \
--cc=Project_Global_Chrome_Upstream_Group@mediatek.com \
--cc=devicetree@vger.kernel.org \
--cc=drinkcat@chromium.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=matthias.bgg@gmail.com \
--cc=robh+dt@kernel.org \
--cc=srv_heupstream@mediatek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).