* arch/mips/mm/tlbex.c:2599 check_pabits() warn: always true condition '(fillbits >= ((__builtin_constant_p(0)) ?(((0) < 2) ?0:63 - __builtin_clzll(0)):((4 <= 4)) ?__ilog2_u32(0):__ilog2_u64(0))) => (0-u32max >= 0)'
@ 2021-09-14 14:08 kernel test robot
0 siblings, 0 replies; 5+ messages in thread
From: kernel test robot @ 2021-09-14 14:08 UTC (permalink / raw)
To: Jakub Jelinek
Cc: kbuild-all, linux-kernel, Peter Zijlstra (Intel),
Andrew Morton, Linux Memory Management List
[-- Attachment #1: Type: text/plain, Size: 3815 bytes --]
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: d0ee23f9d78be5531c4b055ea424ed0b489dfe9b
commit: 2f78788b55baa3410b1ec91a576286abe1ad4d6a ilog2: improve ilog2 for constant arguments
date: 9 months ago
config: mips-randconfig-m031-20210914 (attached as .config)
compiler: mips-linux-gcc (GCC) 11.2.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
New smatch warnings:
arch/mips/mm/tlbex.c:2599 check_pabits() warn: always true condition '(fillbits >= ((__builtin_constant_p(0)) ?(((0) < 2) ?0:63 - __builtin_clzll(0)):((4 <= 4)) ?__ilog2_u32(0):__ilog2_u64(0))) => (0-u32max >= 0)'
Old smatch warnings:
arch/mips/mm/tlbex.c:1741 iPTE_SW() warn: inconsistent indenting
vim +2599 arch/mips/mm/tlbex.c
c5b367835cfc7a Steven J. Hill 2015-02-26 2569
00bf1c691d082c Paul Burton 2015-09-22 2570 static void check_pabits(void)
00bf1c691d082c Paul Burton 2015-09-22 2571 {
00bf1c691d082c Paul Burton 2015-09-22 2572 unsigned long entry;
00bf1c691d082c Paul Burton 2015-09-22 2573 unsigned pabits, fillbits;
00bf1c691d082c Paul Burton 2015-09-22 2574
00bf1c691d082c Paul Burton 2015-09-22 2575 if (!cpu_has_rixi || !_PAGE_NO_EXEC) {
00bf1c691d082c Paul Burton 2015-09-22 2576 /*
00bf1c691d082c Paul Burton 2015-09-22 2577 * We'll only be making use of the fact that we can rotate bits
00bf1c691d082c Paul Burton 2015-09-22 2578 * into the fill if the CPU supports RIXI, so don't bother
00bf1c691d082c Paul Burton 2015-09-22 2579 * probing this for CPUs which don't.
00bf1c691d082c Paul Burton 2015-09-22 2580 */
00bf1c691d082c Paul Burton 2015-09-22 2581 return;
00bf1c691d082c Paul Burton 2015-09-22 2582 }
00bf1c691d082c Paul Burton 2015-09-22 2583
00bf1c691d082c Paul Burton 2015-09-22 2584 write_c0_entrylo0(~0ul);
00bf1c691d082c Paul Burton 2015-09-22 2585 back_to_back_c0_hazard();
00bf1c691d082c Paul Burton 2015-09-22 2586 entry = read_c0_entrylo0();
00bf1c691d082c Paul Burton 2015-09-22 2587
00bf1c691d082c Paul Burton 2015-09-22 2588 /* clear all non-PFN bits */
00bf1c691d082c Paul Burton 2015-09-22 2589 entry &= ~((1 << MIPS_ENTRYLO_PFN_SHIFT) - 1);
00bf1c691d082c Paul Burton 2015-09-22 2590 entry &= ~(MIPS_ENTRYLO_RI | MIPS_ENTRYLO_XI);
00bf1c691d082c Paul Burton 2015-09-22 2591
00bf1c691d082c Paul Burton 2015-09-22 2592 /* find a lower bound on PABITS, and upper bound on fill bits */
00bf1c691d082c Paul Burton 2015-09-22 2593 pabits = fls_long(entry) + 6;
00bf1c691d082c Paul Burton 2015-09-22 2594 fillbits = max_t(int, (int)BITS_PER_LONG - pabits, 0);
00bf1c691d082c Paul Burton 2015-09-22 2595
00bf1c691d082c Paul Burton 2015-09-22 2596 /* minus the RI & XI bits */
00bf1c691d082c Paul Burton 2015-09-22 2597 fillbits -= min_t(unsigned, fillbits, 2);
00bf1c691d082c Paul Burton 2015-09-22 2598
00bf1c691d082c Paul Burton 2015-09-22 @2599 if (fillbits >= ilog2(_PAGE_NO_EXEC))
00bf1c691d082c Paul Burton 2015-09-22 2600 fill_includes_sw_bits = true;
00bf1c691d082c Paul Burton 2015-09-22 2601
00bf1c691d082c Paul Burton 2015-09-22 2602 pr_debug("Entry* registers contain %u fill bits\n", fillbits);
00bf1c691d082c Paul Burton 2015-09-22 2603 }
00bf1c691d082c Paul Burton 2015-09-22 2604
:::::: The code at line 2599 was first introduced by commit
:::::: 00bf1c691d082c1945fdba032c03a9a82e9e7e61 MIPS: tlbex: Avoid placing software PTE bits in Entry* PFN fields
:::::: TO: Paul Burton <paul.burton@imgtec.com>
:::::: CC: Ralf Baechle <ralf@linux-mips.org>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 38505 bytes --]
^ permalink raw reply [flat|nested] 5+ messages in thread
* arch/mips/mm/tlbex.c:2599 check_pabits() warn: always true condition '(fillbits >= ((__builtin_constant_p(0)) ?(((0) < 2) ?0:63 - __builtin_clzll(0)):((4 <= 4)) ?__ilog2_u32(0):__ilog2_u64(0))) => (0-u32max >= 0)'
@ 2021-12-16 11:41 kernel test robot
0 siblings, 0 replies; 5+ messages in thread
From: kernel test robot @ 2021-12-16 11:41 UTC (permalink / raw)
To: Jakub Jelinek
Cc: kbuild-all, linux-kernel, Peter Zijlstra (Intel),
Andrew Morton, Linux Memory Management List
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 2b14864acbaaf03d9c01982e243a84632524c3ac
commit: 2f78788b55baa3410b1ec91a576286abe1ad4d6a ilog2: improve ilog2 for constant arguments
date: 1 year ago
config: mips-randconfig-m031-20211216 (https://download.01.org/0day-ci/archive/20211216/202112161929.ccx97Im9-lkp@intel.com/config)
compiler: mips64-linux-gcc (GCC) 11.2.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
New smatch warnings:
arch/mips/mm/tlbex.c:2599 check_pabits() warn: always true condition '(fillbits >= ((__builtin_constant_p(0)) ?(((0) < 2) ?0:63 - __builtin_clzll(0)):((4 <= 4)) ?__ilog2_u32(0):__ilog2_u64(0))) => (0-u32max >= 0)'
Old smatch warnings:
arch/mips/mm/tlbex.c:1681 iPTE_LW() warn: curly braces intended?
arch/mips/mm/tlbex.c:1713 iPTE_SW() warn: inconsistent indenting
vim +2599 arch/mips/mm/tlbex.c
c5b367835cfc7a Steven J. Hill 2015-02-26 2569
00bf1c691d082c Paul Burton 2015-09-22 2570 static void check_pabits(void)
00bf1c691d082c Paul Burton 2015-09-22 2571 {
00bf1c691d082c Paul Burton 2015-09-22 2572 unsigned long entry;
00bf1c691d082c Paul Burton 2015-09-22 2573 unsigned pabits, fillbits;
00bf1c691d082c Paul Burton 2015-09-22 2574
00bf1c691d082c Paul Burton 2015-09-22 2575 if (!cpu_has_rixi || !_PAGE_NO_EXEC) {
00bf1c691d082c Paul Burton 2015-09-22 2576 /*
00bf1c691d082c Paul Burton 2015-09-22 2577 * We'll only be making use of the fact that we can rotate bits
00bf1c691d082c Paul Burton 2015-09-22 2578 * into the fill if the CPU supports RIXI, so don't bother
00bf1c691d082c Paul Burton 2015-09-22 2579 * probing this for CPUs which don't.
00bf1c691d082c Paul Burton 2015-09-22 2580 */
00bf1c691d082c Paul Burton 2015-09-22 2581 return;
00bf1c691d082c Paul Burton 2015-09-22 2582 }
00bf1c691d082c Paul Burton 2015-09-22 2583
00bf1c691d082c Paul Burton 2015-09-22 2584 write_c0_entrylo0(~0ul);
00bf1c691d082c Paul Burton 2015-09-22 2585 back_to_back_c0_hazard();
00bf1c691d082c Paul Burton 2015-09-22 2586 entry = read_c0_entrylo0();
00bf1c691d082c Paul Burton 2015-09-22 2587
00bf1c691d082c Paul Burton 2015-09-22 2588 /* clear all non-PFN bits */
00bf1c691d082c Paul Burton 2015-09-22 2589 entry &= ~((1 << MIPS_ENTRYLO_PFN_SHIFT) - 1);
00bf1c691d082c Paul Burton 2015-09-22 2590 entry &= ~(MIPS_ENTRYLO_RI | MIPS_ENTRYLO_XI);
00bf1c691d082c Paul Burton 2015-09-22 2591
00bf1c691d082c Paul Burton 2015-09-22 2592 /* find a lower bound on PABITS, and upper bound on fill bits */
00bf1c691d082c Paul Burton 2015-09-22 2593 pabits = fls_long(entry) + 6;
00bf1c691d082c Paul Burton 2015-09-22 2594 fillbits = max_t(int, (int)BITS_PER_LONG - pabits, 0);
00bf1c691d082c Paul Burton 2015-09-22 2595
00bf1c691d082c Paul Burton 2015-09-22 2596 /* minus the RI & XI bits */
00bf1c691d082c Paul Burton 2015-09-22 2597 fillbits -= min_t(unsigned, fillbits, 2);
00bf1c691d082c Paul Burton 2015-09-22 2598
00bf1c691d082c Paul Burton 2015-09-22 @2599 if (fillbits >= ilog2(_PAGE_NO_EXEC))
00bf1c691d082c Paul Burton 2015-09-22 2600 fill_includes_sw_bits = true;
00bf1c691d082c Paul Burton 2015-09-22 2601
00bf1c691d082c Paul Burton 2015-09-22 2602 pr_debug("Entry* registers contain %u fill bits\n", fillbits);
00bf1c691d082c Paul Burton 2015-09-22 2603 }
00bf1c691d082c Paul Burton 2015-09-22 2604
:::::: The code at line 2599 was first introduced by commit
:::::: 00bf1c691d082c1945fdba032c03a9a82e9e7e61 MIPS: tlbex: Avoid placing software PTE bits in Entry* PFN fields
:::::: TO: Paul Burton <paul.burton@imgtec.com>
:::::: CC: Ralf Baechle <ralf@linux-mips.org>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
^ permalink raw reply [flat|nested] 5+ messages in thread
* arch/mips/mm/tlbex.c:2599 check_pabits() warn: always true condition '(fillbits >= ((__builtin_constant_p(0)) ?(((0) < 2) ?0:63 - __builtin_clzll(0)):((4 <= 4)) ?__ilog2_u32(0):__ilog2_u64(0))) => (0-u32max >= 0)'
@ 2021-11-28 4:48 kernel test robot
0 siblings, 0 replies; 5+ messages in thread
From: kernel test robot @ 2021-11-28 4:48 UTC (permalink / raw)
To: Jakub Jelinek
Cc: kbuild-all, linux-kernel, Peter Zijlstra (Intel),
Andrew Morton, Linux Memory Management List
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 3498e7f2bb415e447354a3debef6738d9655768c
commit: 2f78788b55baa3410b1ec91a576286abe1ad4d6a ilog2: improve ilog2 for constant arguments
date: 12 months ago
config: mips-randconfig-m031-20211123 (https://download.01.org/0day-ci/archive/20211128/202111281203.l0V4WbS0-lkp@intel.com/config)
compiler: mips-linux-gcc (GCC) 11.2.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
New smatch warnings:
arch/mips/mm/tlbex.c:2599 check_pabits() warn: always true condition '(fillbits >= ((__builtin_constant_p(0)) ?(((0) < 2) ?0:63 - __builtin_clzll(0)):((4 <= 4)) ?__ilog2_u32(0):__ilog2_u64(0))) => (0-u32max >= 0)'
Old smatch warnings:
arch/mips/mm/tlbex.c:1681 iPTE_LW() warn: curly braces intended?
arch/mips/mm/tlbex.c:1713 iPTE_SW() warn: inconsistent indenting
vim +2599 arch/mips/mm/tlbex.c
c5b367835cfc7a Steven J. Hill 2015-02-26 2569
00bf1c691d082c Paul Burton 2015-09-22 2570 static void check_pabits(void)
00bf1c691d082c Paul Burton 2015-09-22 2571 {
00bf1c691d082c Paul Burton 2015-09-22 2572 unsigned long entry;
00bf1c691d082c Paul Burton 2015-09-22 2573 unsigned pabits, fillbits;
00bf1c691d082c Paul Burton 2015-09-22 2574
00bf1c691d082c Paul Burton 2015-09-22 2575 if (!cpu_has_rixi || !_PAGE_NO_EXEC) {
00bf1c691d082c Paul Burton 2015-09-22 2576 /*
00bf1c691d082c Paul Burton 2015-09-22 2577 * We'll only be making use of the fact that we can rotate bits
00bf1c691d082c Paul Burton 2015-09-22 2578 * into the fill if the CPU supports RIXI, so don't bother
00bf1c691d082c Paul Burton 2015-09-22 2579 * probing this for CPUs which don't.
00bf1c691d082c Paul Burton 2015-09-22 2580 */
00bf1c691d082c Paul Burton 2015-09-22 2581 return;
00bf1c691d082c Paul Burton 2015-09-22 2582 }
00bf1c691d082c Paul Burton 2015-09-22 2583
00bf1c691d082c Paul Burton 2015-09-22 2584 write_c0_entrylo0(~0ul);
00bf1c691d082c Paul Burton 2015-09-22 2585 back_to_back_c0_hazard();
00bf1c691d082c Paul Burton 2015-09-22 2586 entry = read_c0_entrylo0();
00bf1c691d082c Paul Burton 2015-09-22 2587
00bf1c691d082c Paul Burton 2015-09-22 2588 /* clear all non-PFN bits */
00bf1c691d082c Paul Burton 2015-09-22 2589 entry &= ~((1 << MIPS_ENTRYLO_PFN_SHIFT) - 1);
00bf1c691d082c Paul Burton 2015-09-22 2590 entry &= ~(MIPS_ENTRYLO_RI | MIPS_ENTRYLO_XI);
00bf1c691d082c Paul Burton 2015-09-22 2591
00bf1c691d082c Paul Burton 2015-09-22 2592 /* find a lower bound on PABITS, and upper bound on fill bits */
00bf1c691d082c Paul Burton 2015-09-22 2593 pabits = fls_long(entry) + 6;
00bf1c691d082c Paul Burton 2015-09-22 2594 fillbits = max_t(int, (int)BITS_PER_LONG - pabits, 0);
00bf1c691d082c Paul Burton 2015-09-22 2595
00bf1c691d082c Paul Burton 2015-09-22 2596 /* minus the RI & XI bits */
00bf1c691d082c Paul Burton 2015-09-22 2597 fillbits -= min_t(unsigned, fillbits, 2);
00bf1c691d082c Paul Burton 2015-09-22 2598
00bf1c691d082c Paul Burton 2015-09-22 @2599 if (fillbits >= ilog2(_PAGE_NO_EXEC))
00bf1c691d082c Paul Burton 2015-09-22 2600 fill_includes_sw_bits = true;
00bf1c691d082c Paul Burton 2015-09-22 2601
00bf1c691d082c Paul Burton 2015-09-22 2602 pr_debug("Entry* registers contain %u fill bits\n", fillbits);
00bf1c691d082c Paul Burton 2015-09-22 2603 }
00bf1c691d082c Paul Burton 2015-09-22 2604
:::::: The code at line 2599 was first introduced by commit
:::::: 00bf1c691d082c1945fdba032c03a9a82e9e7e61 MIPS: tlbex: Avoid placing software PTE bits in Entry* PFN fields
:::::: TO: Paul Burton <paul.burton@imgtec.com>
:::::: CC: Ralf Baechle <ralf@linux-mips.org>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
^ permalink raw reply [flat|nested] 5+ messages in thread
* arch/mips/mm/tlbex.c:2599 check_pabits() warn: always true condition '(fillbits >= ((__builtin_constant_p(0)) ?(((0) < 2) ?0:63 - __builtin_clzll(0)):((4 <= 4)) ?__ilog2_u32(0):__ilog2_u64(0))) => (0-u32max >= 0)'
@ 2021-08-25 14:05 kernel test robot
0 siblings, 0 replies; 5+ messages in thread
From: kernel test robot @ 2021-08-25 14:05 UTC (permalink / raw)
To: Jakub Jelinek
Cc: kbuild-all, linux-kernel, Peter Zijlstra (Intel),
Andrew Morton, Linux Memory Management List
[-- Attachment #1: Type: text/plain, Size: 3728 bytes --]
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 6e764bcd1cf72a2846c0e53d3975a09b242c04c9
commit: 2f78788b55baa3410b1ec91a576286abe1ad4d6a ilog2: improve ilog2 for constant arguments
date: 8 months ago
config: mips-randconfig-m031-20210825 (attached as .config)
compiler: mips64el-linux-gcc (GCC) 11.2.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
smatch warnings:
arch/mips/mm/tlbex.c:2599 check_pabits() warn: always true condition '(fillbits >= ((__builtin_constant_p(0)) ?(((0) < 2) ?0:63 - __builtin_clzll(0)):((4 <= 4)) ?__ilog2_u32(0):__ilog2_u64(0))) => (0-u32max >= 0)'
vim +2599 arch/mips/mm/tlbex.c
c5b367835cfc7a Steven J. Hill 2015-02-26 2569
00bf1c691d082c Paul Burton 2015-09-22 2570 static void check_pabits(void)
00bf1c691d082c Paul Burton 2015-09-22 2571 {
00bf1c691d082c Paul Burton 2015-09-22 2572 unsigned long entry;
00bf1c691d082c Paul Burton 2015-09-22 2573 unsigned pabits, fillbits;
00bf1c691d082c Paul Burton 2015-09-22 2574
00bf1c691d082c Paul Burton 2015-09-22 2575 if (!cpu_has_rixi || !_PAGE_NO_EXEC) {
00bf1c691d082c Paul Burton 2015-09-22 2576 /*
00bf1c691d082c Paul Burton 2015-09-22 2577 * We'll only be making use of the fact that we can rotate bits
00bf1c691d082c Paul Burton 2015-09-22 2578 * into the fill if the CPU supports RIXI, so don't bother
00bf1c691d082c Paul Burton 2015-09-22 2579 * probing this for CPUs which don't.
00bf1c691d082c Paul Burton 2015-09-22 2580 */
00bf1c691d082c Paul Burton 2015-09-22 2581 return;
00bf1c691d082c Paul Burton 2015-09-22 2582 }
00bf1c691d082c Paul Burton 2015-09-22 2583
00bf1c691d082c Paul Burton 2015-09-22 2584 write_c0_entrylo0(~0ul);
00bf1c691d082c Paul Burton 2015-09-22 2585 back_to_back_c0_hazard();
00bf1c691d082c Paul Burton 2015-09-22 2586 entry = read_c0_entrylo0();
00bf1c691d082c Paul Burton 2015-09-22 2587
00bf1c691d082c Paul Burton 2015-09-22 2588 /* clear all non-PFN bits */
00bf1c691d082c Paul Burton 2015-09-22 2589 entry &= ~((1 << MIPS_ENTRYLO_PFN_SHIFT) - 1);
00bf1c691d082c Paul Burton 2015-09-22 2590 entry &= ~(MIPS_ENTRYLO_RI | MIPS_ENTRYLO_XI);
00bf1c691d082c Paul Burton 2015-09-22 2591
00bf1c691d082c Paul Burton 2015-09-22 2592 /* find a lower bound on PABITS, and upper bound on fill bits */
00bf1c691d082c Paul Burton 2015-09-22 2593 pabits = fls_long(entry) + 6;
00bf1c691d082c Paul Burton 2015-09-22 2594 fillbits = max_t(int, (int)BITS_PER_LONG - pabits, 0);
00bf1c691d082c Paul Burton 2015-09-22 2595
00bf1c691d082c Paul Burton 2015-09-22 2596 /* minus the RI & XI bits */
00bf1c691d082c Paul Burton 2015-09-22 2597 fillbits -= min_t(unsigned, fillbits, 2);
00bf1c691d082c Paul Burton 2015-09-22 2598
00bf1c691d082c Paul Burton 2015-09-22 @2599 if (fillbits >= ilog2(_PAGE_NO_EXEC))
00bf1c691d082c Paul Burton 2015-09-22 2600 fill_includes_sw_bits = true;
00bf1c691d082c Paul Burton 2015-09-22 2601
00bf1c691d082c Paul Burton 2015-09-22 2602 pr_debug("Entry* registers contain %u fill bits\n", fillbits);
00bf1c691d082c Paul Burton 2015-09-22 2603 }
00bf1c691d082c Paul Burton 2015-09-22 2604
:::::: The code at line 2599 was first introduced by commit
:::::: 00bf1c691d082c1945fdba032c03a9a82e9e7e61 MIPS: tlbex: Avoid placing software PTE bits in Entry* PFN fields
:::::: TO: Paul Burton <paul.burton@imgtec.com>
:::::: CC: Ralf Baechle <ralf@linux-mips.org>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 25877 bytes --]
^ permalink raw reply [flat|nested] 5+ messages in thread
* arch/mips/mm/tlbex.c:2599 check_pabits() warn: always true condition '(fillbits >= ((__builtin_constant_p(0)) ?(((0) < 2) ?0:63 - __builtin_clzll(0)):((4 <= 4)) ?__ilog2_u32(0):__ilog2_u64(0))) => (0-u32max >= 0)'
@ 2021-05-20 18:14 kernel test robot
0 siblings, 0 replies; 5+ messages in thread
From: kernel test robot @ 2021-05-20 18:14 UTC (permalink / raw)
To: Jakub Jelinek
Cc: kbuild-all, linux-kernel, Peter Zijlstra (Intel),
Andrew Morton, Linux Memory Management List
[-- Attachment #1: Type: text/plain, Size: 3761 bytes --]
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: c3d0e3fd41b7f0f5d5d5b6022ab7e813f04ea727
commit: 2f78788b55baa3410b1ec91a576286abe1ad4d6a ilog2: improve ilog2 for constant arguments
date: 5 months ago
config: mips-randconfig-m031-20210520 (attached as .config)
compiler: mips64-linux-gcc (GCC) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
smatch warnings:
arch/mips/mm/tlbex.c:2599 check_pabits() warn: always true condition '(fillbits >= ((__builtin_constant_p(0)) ?(((0) < 2) ?0:63 - __builtin_clzll(0)):((4 <= 4)) ?__ilog2_u32(0):__ilog2_u64(0))) => (0-u32max >= 0)'
vim +2599 arch/mips/mm/tlbex.c
c5b367835cfc7a8 Steven J. Hill 2015-02-26 2569
00bf1c691d082c1 Paul Burton 2015-09-22 2570 static void check_pabits(void)
00bf1c691d082c1 Paul Burton 2015-09-22 2571 {
00bf1c691d082c1 Paul Burton 2015-09-22 2572 unsigned long entry;
00bf1c691d082c1 Paul Burton 2015-09-22 2573 unsigned pabits, fillbits;
00bf1c691d082c1 Paul Burton 2015-09-22 2574
00bf1c691d082c1 Paul Burton 2015-09-22 2575 if (!cpu_has_rixi || !_PAGE_NO_EXEC) {
00bf1c691d082c1 Paul Burton 2015-09-22 2576 /*
00bf1c691d082c1 Paul Burton 2015-09-22 2577 * We'll only be making use of the fact that we can rotate bits
00bf1c691d082c1 Paul Burton 2015-09-22 2578 * into the fill if the CPU supports RIXI, so don't bother
00bf1c691d082c1 Paul Burton 2015-09-22 2579 * probing this for CPUs which don't.
00bf1c691d082c1 Paul Burton 2015-09-22 2580 */
00bf1c691d082c1 Paul Burton 2015-09-22 2581 return;
00bf1c691d082c1 Paul Burton 2015-09-22 2582 }
00bf1c691d082c1 Paul Burton 2015-09-22 2583
00bf1c691d082c1 Paul Burton 2015-09-22 2584 write_c0_entrylo0(~0ul);
00bf1c691d082c1 Paul Burton 2015-09-22 2585 back_to_back_c0_hazard();
00bf1c691d082c1 Paul Burton 2015-09-22 2586 entry = read_c0_entrylo0();
00bf1c691d082c1 Paul Burton 2015-09-22 2587
00bf1c691d082c1 Paul Burton 2015-09-22 2588 /* clear all non-PFN bits */
00bf1c691d082c1 Paul Burton 2015-09-22 2589 entry &= ~((1 << MIPS_ENTRYLO_PFN_SHIFT) - 1);
00bf1c691d082c1 Paul Burton 2015-09-22 2590 entry &= ~(MIPS_ENTRYLO_RI | MIPS_ENTRYLO_XI);
00bf1c691d082c1 Paul Burton 2015-09-22 2591
00bf1c691d082c1 Paul Burton 2015-09-22 2592 /* find a lower bound on PABITS, and upper bound on fill bits */
00bf1c691d082c1 Paul Burton 2015-09-22 2593 pabits = fls_long(entry) + 6;
00bf1c691d082c1 Paul Burton 2015-09-22 2594 fillbits = max_t(int, (int)BITS_PER_LONG - pabits, 0);
00bf1c691d082c1 Paul Burton 2015-09-22 2595
00bf1c691d082c1 Paul Burton 2015-09-22 2596 /* minus the RI & XI bits */
00bf1c691d082c1 Paul Burton 2015-09-22 2597 fillbits -= min_t(unsigned, fillbits, 2);
00bf1c691d082c1 Paul Burton 2015-09-22 2598
00bf1c691d082c1 Paul Burton 2015-09-22 @2599 if (fillbits >= ilog2(_PAGE_NO_EXEC))
00bf1c691d082c1 Paul Burton 2015-09-22 2600 fill_includes_sw_bits = true;
00bf1c691d082c1 Paul Burton 2015-09-22 2601
00bf1c691d082c1 Paul Burton 2015-09-22 2602 pr_debug("Entry* registers contain %u fill bits\n", fillbits);
00bf1c691d082c1 Paul Burton 2015-09-22 2603 }
00bf1c691d082c1 Paul Burton 2015-09-22 2604
:::::: The code at line 2599 was first introduced by commit
:::::: 00bf1c691d082c1945fdba032c03a9a82e9e7e61 MIPS: tlbex: Avoid placing software PTE bits in Entry* PFN fields
:::::: TO: Paul Burton <paul.burton@imgtec.com>
:::::: CC: Ralf Baechle <ralf@linux-mips.org>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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2021-09-14 14:08 arch/mips/mm/tlbex.c:2599 check_pabits() warn: always true condition '(fillbits >= ((__builtin_constant_p(0)) ?(((0) < 2) ?0:63 - __builtin_clzll(0)):((4 <= 4)) ?__ilog2_u32(0):__ilog2_u64(0))) => (0-u32max >= 0)' kernel test robot
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