* [PATCH V2] usb: chipidea: udc: make controller hardware endpoint primed
@ 2021-09-13 14:00 Piyush Mehta
2021-10-06 4:36 ` Piyush Mehta
0 siblings, 1 reply; 3+ messages in thread
From: Piyush Mehta @ 2021-09-13 14:00 UTC (permalink / raw)
To: peter.chen, gregkh
Cc: linux-usb, linux-kernel, git, sgoud, michal.simek, Piyush Mehta
Root-cause:
There is an issue like endpoint is not recognized as primed, when bus
have more pressure and the add dTD tripwire semaphore (ATDTW bit in
USBCMD register) that can cause the controller to ignore a dTD that is
added to a primed endpoint.
This issue observed with the Windows10 host machine.
Workaround:
The software must implement a periodic cycle, and check for each dTD,
if the endpoint is primed. It can do this by reading the corresponding
bits in the ENDPTPRIME and ENDPTSTAT registers. If these bits are read
at 0, the software needs to re-prime the endpoint by writing 1 to the
corresponding bit in the ENDPTPRIME register.
Added conditional revision check of 2.20[CI_REVISION_22].
Signed-off-by: Piyush Mehta <piyush.mehta@xilinx.com>
---
Changes for V2:
- Addressed Peter review comments - Remove unrelated new-line
- Updated commit message
Link: https://lore.kernel.org/linux-usb/SJ0PR02MB8644CBBA848A0F68323F1AA5D4D99@SJ0PR02MB8644.namprd02.prod.outlook.com/
---
drivers/usb/chipidea/udc.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c
index 8834ca6..f9ca501 100644
--- a/drivers/usb/chipidea/udc.c
+++ b/drivers/usb/chipidea/udc.c
@@ -49,6 +49,8 @@ ctrl_endpt_in_desc = {
.wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
};
+static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
+ struct td_node *node);
/**
* hw_ep_bit: calculates the bit number
* @num: endpoint number
@@ -599,6 +601,12 @@ static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
prevlastnode->ptr->next = cpu_to_le32(next);
wmb();
+
+ if (ci->rev == CI_REVISION_22) {
+ if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
+ reprime_dtd(ci, hwep, prevlastnode);
+ }
+
if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
goto done;
do {
--
2.7.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* RE: [PATCH V2] usb: chipidea: udc: make controller hardware endpoint primed
2021-09-13 14:00 [PATCH V2] usb: chipidea: udc: make controller hardware endpoint primed Piyush Mehta
@ 2021-10-06 4:36 ` Piyush Mehta
2021-10-07 4:27 ` Peter Chen
0 siblings, 1 reply; 3+ messages in thread
From: Piyush Mehta @ 2021-10-06 4:36 UTC (permalink / raw)
To: Piyush Mehta, peter.chen, gregkh
Cc: linux-usb, linux-kernel, git, Srinivas Goud, Michal Simek
Ping ...
Regards,
Piyush Mehta
-----Original Message-----
From: Piyush Mehta <piyush.mehta@xilinx.com>
Sent: Monday, September 13, 2021 7:30 PM
To: peter.chen@kernel.org; gregkh@linuxfoundation.org
Cc: linux-usb@vger.kernel.org; linux-kernel@vger.kernel.org; git <git@xilinx.com>; Srinivas Goud <sgoud@xilinx.com>; Michal Simek <michals@xilinx.com>; Piyush Mehta <piyushm@xilinx.com>
Subject: [PATCH V2] usb: chipidea: udc: make controller hardware endpoint primed
Root-cause:
There is an issue like endpoint is not recognized as primed, when bus have more pressure and the add dTD tripwire semaphore (ATDTW bit in USBCMD register) that can cause the controller to ignore a dTD that is added to a primed endpoint.
This issue observed with the Windows10 host machine.
Workaround:
The software must implement a periodic cycle, and check for each dTD, if the endpoint is primed. It can do this by reading the corresponding bits in the ENDPTPRIME and ENDPTSTAT registers. If these bits are read at 0, the software needs to re-prime the endpoint by writing 1 to the corresponding bit in the ENDPTPRIME register.
Added conditional revision check of 2.20[CI_REVISION_22].
Signed-off-by: Piyush Mehta <piyush.mehta@xilinx.com>
---
Changes for V2:
- Addressed Peter review comments - Remove unrelated new-line
- Updated commit message
Link: https://lore.kernel.org/linux-usb/SJ0PR02MB8644CBBA848A0F68323F1AA5D4D99@SJ0PR02MB8644.namprd02.prod.outlook.com/
---
drivers/usb/chipidea/udc.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c index 8834ca6..f9ca501 100644
--- a/drivers/usb/chipidea/udc.c
+++ b/drivers/usb/chipidea/udc.c
@@ -49,6 +49,8 @@ ctrl_endpt_in_desc = {
.wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), };
+static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
+ struct td_node *node);
/**
* hw_ep_bit: calculates the bit number
* @num: endpoint number
@@ -599,6 +601,12 @@ static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
prevlastnode->ptr->next = cpu_to_le32(next);
wmb();
+
+ if (ci->rev == CI_REVISION_22) {
+ if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
+ reprime_dtd(ci, hwep, prevlastnode);
+ }
+
if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
goto done;
do {
--
2.7.4
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH V2] usb: chipidea: udc: make controller hardware endpoint primed
2021-10-06 4:36 ` Piyush Mehta
@ 2021-10-07 4:27 ` Peter Chen
0 siblings, 0 replies; 3+ messages in thread
From: Peter Chen @ 2021-10-07 4:27 UTC (permalink / raw)
To: Piyush Mehta
Cc: gregkh, linux-usb, linux-kernel, git, Srinivas Goud, Michal Simek
On 21-10-06 04:36:59, Piyush Mehta wrote:
>
> Root-cause:
> There is an issue like endpoint is not recognized as primed, when bus have more pressure and the add dTD tripwire semaphore (ATDTW bit in USBCMD register) that can cause the controller to ignore a dTD that is added to a primed endpoint.
> This issue observed with the Windows10 host machine.
>
> Workaround:
> The software must implement a periodic cycle, and check for each dTD, if the endpoint is primed. It can do this by reading the corresponding bits in the ENDPTPRIME and ENDPTSTAT registers. If these bits are read at 0, the software needs to re-prime the endpoint by writing 1 to the corresponding bit in the ENDPTPRIME register.
>
> Added conditional revision check of 2.20[CI_REVISION_22].
>
> Signed-off-by: Piyush Mehta <piyush.mehta@xilinx.com>
> ---
> Changes for V2:
> - Addressed Peter review comments - Remove unrelated new-line
> - Updated commit message
>
> Link: https://lore.kernel.org/linux-usb/SJ0PR02MB8644CBBA848A0F68323F1AA5D4D99@SJ0PR02MB8644.namprd02.prod.outlook.com/
> ---
> drivers/usb/chipidea/udc.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c index 8834ca6..f9ca501 100644
> --- a/drivers/usb/chipidea/udc.c
> +++ b/drivers/usb/chipidea/udc.c
> @@ -49,6 +49,8 @@ ctrl_endpt_in_desc = {
> .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), };
>
> +static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
> + struct td_node *node);
> /**
> * hw_ep_bit: calculates the bit number
> * @num: endpoint number
> @@ -599,6 +601,12 @@ static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
>
> prevlastnode->ptr->next = cpu_to_le32(next);
> wmb();
> +
> + if (ci->rev == CI_REVISION_22) {
> + if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
> + reprime_dtd(ci, hwep, prevlastnode);
> + }
> +
> if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
> goto done;
> do {
> --
Acked-by: Peter Chen <peter.chen@kernel.org>
--
Thanks,
Peter Chen
^ permalink raw reply [flat|nested] 3+ messages in thread
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2021-09-13 14:00 [PATCH V2] usb: chipidea: udc: make controller hardware endpoint primed Piyush Mehta
2021-10-06 4:36 ` Piyush Mehta
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