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* [PATCH 0/2] riscv: switch to relative extable
@ 2021-10-16 16:04 Jisheng Zhang
  2021-10-16 16:04 ` [PATCH 1/2] riscv: consolidate __ex_table construction Jisheng Zhang
  2021-10-16 16:05 ` [PATCH 2/2] riscv: switch to relative exception tables Jisheng Zhang
  0 siblings, 2 replies; 5+ messages in thread
From: Jisheng Zhang @ 2021-10-16 16:04 UTC (permalink / raw)
  To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Masahiro Yamada,
	Michal Marek, Nick Desaulniers
  Cc: linux-riscv, linux-kernel, linux-kbuild

From: Jisheng Zhang <jszhang@kernel.org>

Similar as other architectures such as arm64, x86 and so on, use
offsets relative to the exception table entry values rather than
absolute addresses for both the exception locationand the fixup.

patch1 consolidates the __ex_table construction, it's a great code
clean up even w/o the 2nd patch.

patch2 does the real job.

Jisheng Zhang (2):
  riscv: consolidate __ex_table construction
  riscv: switch to relative exception tables

 arch/riscv/include/asm/Kbuild    |  1 -
 arch/riscv/include/asm/extable.h | 25 ++++++++++++++++++++
 arch/riscv/include/asm/futex.h   | 12 +++-------
 arch/riscv/include/asm/uaccess.h | 40 +++++++++++---------------------
 arch/riscv/lib/uaccess.S         |  4 ++--
 arch/riscv/mm/extable.c          |  2 +-
 scripts/mod/modpost.c            | 27 +++++++++++++++++++++
 scripts/sorttable.c              |  2 +-
 8 files changed, 73 insertions(+), 40 deletions(-)
 create mode 100644 arch/riscv/include/asm/extable.h

-- 
2.33.0



^ permalink raw reply	[flat|nested] 5+ messages in thread
* [PATCH 1/2] riscv: consolidate __ex_table construction
  2021-10-16 16:04 [PATCH 0/2] riscv: switch to relative extable Jisheng Zhang
@ 2021-10-16 16:04 ` Jisheng Zhang
  2021-10-18  0:14   ` kernel test robot
  2021-10-16 16:05 ` [PATCH 2/2] riscv: switch to relative exception tables Jisheng Zhang
  1 sibling, 1 reply; 5+ messages in thread
From: Jisheng Zhang @ 2021-10-16 16:04 UTC (permalink / raw)
  To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Masahiro Yamada,
	Michal Marek, Nick Desaulniers
  Cc: linux-riscv, linux-kernel, linux-kbuild

From: Jisheng Zhang <jszhang@kernel.org>

Consolidate all the __ex_table constuction code with a _ASM_EXTABLE
helper.

There should be no functional change as a result of this patch.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
 arch/riscv/include/asm/futex.h   | 12 +++-------
 arch/riscv/include/asm/uaccess.h | 40 +++++++++++---------------------
 2 files changed, 17 insertions(+), 35 deletions(-)

diff --git a/arch/riscv/include/asm/futex.h b/arch/riscv/include/asm/futex.h
index 1b00badb9f87..3191574e135c 100644
--- a/arch/riscv/include/asm/futex.h
+++ b/arch/riscv/include/asm/futex.h
@@ -30,10 +30,7 @@
 	"3:	li %[r],%[e]				\n"	\
 	"	jump 2b,%[t]				\n"	\
 	"	.previous				\n"	\
-	"	.section __ex_table,\"a\"		\n"	\
-	"	.balign " RISCV_SZPTR "			\n"	\
-	"	" RISCV_PTR " 1b, 3b			\n"	\
-	"	.previous				\n"	\
+		_ASM_EXTABLE(1b, 3b)				\
 	: [r] "+r" (ret), [ov] "=&r" (oldval),			\
 	  [u] "+m" (*uaddr), [t] "=&r" (tmp)			\
 	: [op] "Jr" (oparg), [e] "i" (-EFAULT)			\
@@ -103,11 +100,8 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
 	"4:	li %[r],%[e]				\n"
 	"	jump 3b,%[t]				\n"
 	"	.previous				\n"
-	"	.section __ex_table,\"a\"		\n"
-	"	.balign " RISCV_SZPTR "			\n"
-	"	" RISCV_PTR " 1b, 4b			\n"
-	"	" RISCV_PTR " 2b, 4b			\n"
-	"	.previous				\n"
+		_ASM_EXTABLE(1b, 4b)			\
+		_ASM_EXTABLE(2b, 4b)			\
 	: [r] "+r" (ret), [v] "=&r" (val), [u] "+m" (*uaddr), [t] "=&r" (tmp)
 	: [ov] "Jr" (oldval), [nv] "Jr" (newval), [e] "i" (-EFAULT)
 	: "memory");
diff --git a/arch/riscv/include/asm/uaccess.h b/arch/riscv/include/asm/uaccess.h
index f314ff44c48d..5e4c9a5a17c5 100644
--- a/arch/riscv/include/asm/uaccess.h
+++ b/arch/riscv/include/asm/uaccess.h
@@ -47,6 +47,12 @@
 	likely(__access_ok((unsigned long __force)(addr), (size)));	\
 })
 
+#define _ASM_EXTABLE(from, to)						\
+	"	.pushsection	__ex_table, \"a\"\n"			\
+	"	.balign "	RISCV_SZPTR "	 \n"			\
+	"	" RISCV_PTR	"(" #from "), (" #to ")\n"		\
+	"	.popsection\n"
+
 /*
  * Ensure that the range [addr, addr+size) is within the process's
  * address space
@@ -93,10 +99,7 @@ do {								\
 		"	li %1, 0\n"				\
 		"	jump 2b, %2\n"				\
 		"	.previous\n"				\
-		"	.section __ex_table,\"a\"\n"		\
-		"	.balign " RISCV_SZPTR "\n"			\
-		"	" RISCV_PTR " 1b, 3b\n"			\
-		"	.previous"				\
+			_ASM_EXTABLE(1b, 3b)			\
 		: "+r" (err), "=&r" (__x), "=r" (__tmp)		\
 		: "m" (*(ptr)), "i" (-EFAULT));			\
 	(x) = __x;						\
@@ -125,11 +128,8 @@ do {								\
 		"	li %2, 0\n"				\
 		"	jump 3b, %3\n"				\
 		"	.previous\n"				\
-		"	.section __ex_table,\"a\"\n"		\
-		"	.balign " RISCV_SZPTR "\n"			\
-		"	" RISCV_PTR " 1b, 4b\n"			\
-		"	" RISCV_PTR " 2b, 4b\n"			\
-		"	.previous"				\
+			_ASM_EXTABLE(1b, 4b)			\
+			_ASM_EXTABLE(2b, 4b)			\
 		: "+r" (err), "=&r" (__lo), "=r" (__hi),	\
 			"=r" (__tmp)				\
 		: "m" (__ptr[__LSW]), "m" (__ptr[__MSW]),	\
@@ -233,10 +233,7 @@ do {								\
 		"	li %0, %4\n"				\
 		"	jump 2b, %1\n"				\
 		"	.previous\n"				\
-		"	.section __ex_table,\"a\"\n"		\
-		"	.balign " RISCV_SZPTR "\n"			\
-		"	" RISCV_PTR " 1b, 3b\n"			\
-		"	.previous"				\
+			_ASM_EXTABLE(1b, 3b)			\
 		: "+r" (err), "=r" (__tmp), "=m" (*(ptr))	\
 		: "rJ" (__x), "i" (-EFAULT));			\
 } while (0)
@@ -262,11 +259,8 @@ do {								\
 		"	li %0, %6\n"				\
 		"	jump 3b, %1\n"				\
 		"	.previous\n"				\
-		"	.section __ex_table,\"a\"\n"		\
-		"	.balign " RISCV_SZPTR "\n"			\
-		"	" RISCV_PTR " 1b, 4b\n"			\
-		"	" RISCV_PTR " 2b, 4b\n"			\
-		"	.previous"				\
+			_ASM_EXTABLE(1b, 4b)			\
+			_ASM_EXTABLE(2b, 4b)			\
 		: "+r" (err), "=r" (__tmp),			\
 			"=m" (__ptr[__LSW]),			\
 			"=m" (__ptr[__MSW])			\
@@ -417,10 +411,7 @@ unsigned long __must_check clear_user(void __user *to, unsigned long n)
 		"	li %[err], %[efault]\n"			\
 		"	jump 1b, %[rc]\n"			\
 		".previous\n"					\
-		".section __ex_table,\"a\"\n"			\
-		".balign " RISCV_SZPTR "\n"			\
-		"	" RISCV_PTR " 1b, 2b\n"			\
-		".previous\n"					\
+		_ASM_EXTABLE(1b, 2b)				\
 			: [ret] "=&r" (__ret),			\
 			  [rc]  "=&r" (__rc),			\
 			  [ptr] "+A" (*__ptr),			\
@@ -443,10 +434,7 @@ unsigned long __must_check clear_user(void __user *to, unsigned long n)
 		"	li %[err], %[efault]\n"			\
 		"	jump 1b, %[rc]\n"			\
 		".previous\n"					\
-		".section __ex_table,\"a\"\n"			\
-		".balign " RISCV_SZPTR "\n"			\
-		"	" RISCV_PTR " 1b, 2b\n"			\
-		".previous\n"					\
+		_ASM_EXTABLE(1b, 2b)				\
 			: [ret] "=&r" (__ret),			\
 			  [rc]  "=&r" (__rc),			\
 			  [ptr] "+A" (*__ptr),			\
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 5+ messages in thread
* [PATCH 2/2] riscv: switch to relative exception tables
  2021-10-16 16:04 [PATCH 0/2] riscv: switch to relative extable Jisheng Zhang
  2021-10-16 16:04 ` [PATCH 1/2] riscv: consolidate __ex_table construction Jisheng Zhang
@ 2021-10-16 16:05 ` Jisheng Zhang
  1 sibling, 0 replies; 5+ messages in thread
From: Jisheng Zhang @ 2021-10-16 16:05 UTC (permalink / raw)
  To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Masahiro Yamada,
	Michal Marek, Nick Desaulniers
  Cc: linux-riscv, linux-kernel, linux-kbuild

From: Jisheng Zhang <jszhang@kernel.org>

Similar as other architectures such as arm64, x86 and so on, use
offsets relative to the exception table entry values rather than
absolute addresses for both the exception locationand the fixup.

However, RISCV label difference will actually produce two relocations,
a pair of R_RISCV_ADD32 and R_RISCV_SUB32. Take below simple code for
example:

$ cat test.S
.section .text
1:
        nop
.section __ex_table,"a"
        .balign 4
        .long (1b - .)
.previous

$ riscv64-linux-gnu-gcc -c test.S
$ riscv64-linux-gnu-readelf -r test.o
Relocation section '.rela__ex_table' at offset 0x100 contains 2 entries:
  Offset          Info           Type           Sym. Value    Sym. Name + Addend
000000000000  000600000023 R_RISCV_ADD32     0000000000000000 .L1^B1 + 0
000000000000  000500000027 R_RISCV_SUB32     0000000000000000 .L0  + 0

The modpost will complain the R_RISCV_SUB32 relocation, so we need to
patch modpost.c to skip this relocation for .rela__ex_table section.

After this patch, the __ex_table section size of defconfig vmlinux is
reduced from 7072 Bytes to 3536 Bytes.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
 arch/riscv/include/asm/Kbuild    |  1 -
 arch/riscv/include/asm/extable.h | 25 +++++++++++++++++++++++++
 arch/riscv/include/asm/uaccess.h |  4 ++--
 arch/riscv/lib/uaccess.S         |  4 ++--
 arch/riscv/mm/extable.c          |  2 +-
 scripts/mod/modpost.c            | 27 +++++++++++++++++++++++++++
 scripts/sorttable.c              |  2 +-
 7 files changed, 58 insertions(+), 7 deletions(-)
 create mode 100644 arch/riscv/include/asm/extable.h

diff --git a/arch/riscv/include/asm/Kbuild b/arch/riscv/include/asm/Kbuild
index 445ccc97305a..57b86fd9916c 100644
--- a/arch/riscv/include/asm/Kbuild
+++ b/arch/riscv/include/asm/Kbuild
@@ -1,6 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0
 generic-y += early_ioremap.h
-generic-y += extable.h
 generic-y += flat.h
 generic-y += kvm_para.h
 generic-y += user.h
diff --git a/arch/riscv/include/asm/extable.h b/arch/riscv/include/asm/extable.h
new file mode 100644
index 000000000000..bc439b0fdb29
--- /dev/null
+++ b/arch/riscv/include/asm/extable.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_RISCV_EXTABLE_H
+#define _ASM_RISCV_EXTABLE_H
+
+/*
+ * The exception table consists of pairs of relative offsets: the first
+ * is the relative offset to an instruction that is allowed to fault,
+ * and the second is the relative offset at which the program should
+ * continue. No registers are modified, so it is entirely up to the
+ * continuation code to figure out what to do.
+ *
+ * All the routines below use bits of fixup code that are out of line
+ * with the main instruction path.  This means when everything is well,
+ * we don't even have to jump over them.  Further, they do not intrude
+ * on our cache or tlb entries.
+ */
+
+struct exception_table_entry {
+	int insn, fixup;
+};
+
+#define ARCH_HAS_RELATIVE_EXTABLE
+
+extern int fixup_exception(struct pt_regs *regs);
+#endif
diff --git a/arch/riscv/include/asm/uaccess.h b/arch/riscv/include/asm/uaccess.h
index 5e4c9a5a17c5..03e798c7b011 100644
--- a/arch/riscv/include/asm/uaccess.h
+++ b/arch/riscv/include/asm/uaccess.h
@@ -49,8 +49,8 @@
 
 #define _ASM_EXTABLE(from, to)						\
 	"	.pushsection	__ex_table, \"a\"\n"			\
-	"	.balign "	RISCV_SZPTR "	 \n"			\
-	"	" RISCV_PTR	"(" #from "), (" #to ")\n"		\
+	"	.balign		4\n"					\
+	"	.long		(" #from " - .), (" #to " - .)\n"	\
 	"	.popsection\n"
 
 /*
diff --git a/arch/riscv/lib/uaccess.S b/arch/riscv/lib/uaccess.S
index 63bc691cff91..55f80f84e23f 100644
--- a/arch/riscv/lib/uaccess.S
+++ b/arch/riscv/lib/uaccess.S
@@ -7,8 +7,8 @@
 100:
 	\op \reg, \addr
 	.section __ex_table,"a"
-	.balign RISCV_SZPTR
-	RISCV_PTR 100b, \lbl
+	.balign 4
+	.long (100b - .), (\lbl - .)
 	.previous
 	.endm
 
diff --git a/arch/riscv/mm/extable.c b/arch/riscv/mm/extable.c
index 2fc729422151..6aa8ffac4be7 100644
--- a/arch/riscv/mm/extable.c
+++ b/arch/riscv/mm/extable.c
@@ -17,7 +17,7 @@ int fixup_exception(struct pt_regs *regs)
 
 	fixup = search_exception_tables(regs->epc);
 	if (fixup) {
-		regs->epc = fixup->fixup;
+		regs->epc = (unsigned long)&fixup->fixup + fixup->fixup;
 		return 1;
 	}
 	return 0;
diff --git a/scripts/mod/modpost.c b/scripts/mod/modpost.c
index cb8ab7d91d30..0aa14b5bd124 100644
--- a/scripts/mod/modpost.c
+++ b/scripts/mod/modpost.c
@@ -1830,6 +1830,27 @@ static int addend_mips_rel(struct elf_info *elf, Elf_Shdr *sechdr, Elf_Rela *r)
 	return 0;
 }
 
+#ifndef EM_RISCV
+#define EM_RISCV		243
+#endif
+
+#ifndef R_RISCV_SUB32
+#define R_RISCV_SUB32		39
+#endif
+
+static int addend_riscv_rela(struct elf_info *elf, Elf_Shdr *sechdr, Elf_Rela *r)
+{
+	unsigned int r_typ = ELF_R_TYPE(r->r_info);
+	const char *fromsec;
+
+	fromsec = sech_name(elf, sechdr);
+	fromsec += strlen(".rela");
+
+	if (!strcmp("__ex_table", fromsec) && r_typ == R_RISCV_SUB32)
+		return 1;	/* skip this */
+	return 0;
+}
+
 static void section_rela(const char *modname, struct elf_info *elf,
 			 Elf_Shdr *sechdr)
 {
@@ -1866,6 +1887,12 @@ static void section_rela(const char *modname, struct elf_info *elf,
 		r_sym = ELF_R_SYM(r.r_info);
 #endif
 		r.r_addend = TO_NATIVE(rela->r_addend);
+		switch (elf->hdr->e_machine) {
+		case EM_RISCV:
+			if (addend_riscv_rela(elf, sechdr, &r))
+				continue;
+			break;
+		}
 		sym = elf->symtab_start + r_sym;
 		/* Skip special sections */
 		if (is_shndx_special(sym->st_shndx))
diff --git a/scripts/sorttable.c b/scripts/sorttable.c
index 6ee4fa882919..39e86e4acea3 100644
--- a/scripts/sorttable.c
+++ b/scripts/sorttable.c
@@ -346,6 +346,7 @@ static int do_file(char const *const fname, void *addr)
 	case EM_PARISC:
 	case EM_PPC:
 	case EM_PPC64:
+	case EM_RISCV:
 		custom_sort = sort_relative_table;
 		break;
 	case EM_ARCOMPACT:
@@ -353,7 +354,6 @@ static int do_file(char const *const fname, void *addr)
 	case EM_ARM:
 	case EM_MICROBLAZE:
 	case EM_MIPS:
-	case EM_RISCV:
 	case EM_XTENSA:
 		break;
 	default:
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] riscv: consolidate __ex_table construction
  2021-10-16 16:04 ` [PATCH 1/2] riscv: consolidate __ex_table construction Jisheng Zhang
@ 2021-10-18  0:14   ` kernel test robot
  2021-10-20 14:03     ` Jisheng Zhang
  0 siblings, 1 reply; 5+ messages in thread
From: kernel test robot @ 2021-10-18  0:14 UTC (permalink / raw)
  To: Jisheng Zhang, Paul Walmsley, Palmer Dabbelt, Albert Ou,
	Masahiro Yamada, Michal Marek, Nick Desaulniers
  Cc: llvm, kbuild-all, linux-riscv, linux-kernel, linux-kbuild

[-- Attachment #1: Type: text/plain, Size: 10079 bytes --]

Hi Jisheng,

I love your patch! Yet something to improve:

[auto build test ERROR on linus/master]
[also build test ERROR on v5.15-rc5 next-20211015]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Jisheng-Zhang/riscv-switch-to-relative-extable/20211017-001318
base:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 8fe31e0995f048d16b378b90926793a0aa4af1e5
config: riscv-randconfig-r032-20211017 (attached as .config)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project 746dd6a700931988dd9021d3d04718f1929885a5)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install riscv cross compiling tool for clang build
        # apt-get install binutils-riscv64-linux-gnu
        # https://github.com/0day-ci/linux/commit/23c273bf6ec4ca672a21dba701725087208dc784
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Jisheng-Zhang/riscv-switch-to-relative-extable/20211017-001318
        git checkout 23c273bf6ec4ca672a21dba701725087208dc784
        # save the attached .config to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=riscv SHELL=/bin/bash

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   In file included from kernel/futex.c:36:
   In file included from include/linux/pagemap.h:11:
   In file included from include/linux/highmem.h:10:
   In file included from include/linux/hardirq.h:11:
   In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
   In file included from include/asm-generic/hardirq.h:17:
   In file included from include/linux/irq.h:20:
   In file included from include/linux/io.h:13:
   In file included from arch/riscv/include/asm/io.h:136:
   include/asm-generic/io.h:464:31: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
           val = __raw_readb(PCI_IOBASE + addr);
                             ~~~~~~~~~~ ^
   include/asm-generic/io.h:477:61: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
           val = __le16_to_cpu((__le16 __force)__raw_readw(PCI_IOBASE + addr));
                                                           ~~~~~~~~~~ ^
   include/uapi/linux/byteorder/little_endian.h:36:51: note: expanded from macro '__le16_to_cpu'
   #define __le16_to_cpu(x) ((__force __u16)(__le16)(x))
                                                     ^
   In file included from kernel/futex.c:36:
   In file included from include/linux/pagemap.h:11:
   In file included from include/linux/highmem.h:10:
   In file included from include/linux/hardirq.h:11:
   In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
   In file included from include/asm-generic/hardirq.h:17:
   In file included from include/linux/irq.h:20:
   In file included from include/linux/io.h:13:
   In file included from arch/riscv/include/asm/io.h:136:
   include/asm-generic/io.h:490:61: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
           val = __le32_to_cpu((__le32 __force)__raw_readl(PCI_IOBASE + addr));
                                                           ~~~~~~~~~~ ^
   include/uapi/linux/byteorder/little_endian.h:34:51: note: expanded from macro '__le32_to_cpu'
   #define __le32_to_cpu(x) ((__force __u32)(__le32)(x))
                                                     ^
   In file included from kernel/futex.c:36:
   In file included from include/linux/pagemap.h:11:
   In file included from include/linux/highmem.h:10:
   In file included from include/linux/hardirq.h:11:
   In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
   In file included from include/asm-generic/hardirq.h:17:
   In file included from include/linux/irq.h:20:
   In file included from include/linux/io.h:13:
   In file included from arch/riscv/include/asm/io.h:136:
   include/asm-generic/io.h:501:33: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
           __raw_writeb(value, PCI_IOBASE + addr);
                               ~~~~~~~~~~ ^
   include/asm-generic/io.h:511:59: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
           __raw_writew((u16 __force)cpu_to_le16(value), PCI_IOBASE + addr);
                                                         ~~~~~~~~~~ ^
   include/asm-generic/io.h:521:59: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
           __raw_writel((u32 __force)cpu_to_le32(value), PCI_IOBASE + addr);
                                                         ~~~~~~~~~~ ^
   include/asm-generic/io.h:1024:55: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
           return (port > MMIO_UPPER_LIMIT) ? NULL : PCI_IOBASE + port;
                                                     ~~~~~~~~~~ ^
   In file included from kernel/futex.c:43:
>> arch/riscv/include/asm/futex.h:51:3: error: expected ')'
                   __futex_atomic_op("amoswap.w.aqrl %[ov],%z[op],%[u]",
                   ^
   arch/riscv/include/asm/futex.h:33:3: note: expanded from macro '__futex_atomic_op'
                   _ASM_EXTABLE(1b, 3b)                            \
                   ^
   arch/riscv/include/asm/futex.h:55:3: error: expected ')'
                   __futex_atomic_op("amoadd.w.aqrl %[ov],%z[op],%[u]",
                   ^
   arch/riscv/include/asm/futex.h:33:3: note: expanded from macro '__futex_atomic_op'
                   _ASM_EXTABLE(1b, 3b)                            \
                   ^
   arch/riscv/include/asm/futex.h:59:3: error: expected ')'
                   __futex_atomic_op("amoor.w.aqrl %[ov],%z[op],%[u]",
                   ^
   arch/riscv/include/asm/futex.h:33:3: note: expanded from macro '__futex_atomic_op'
                   _ASM_EXTABLE(1b, 3b)                            \
                   ^
   arch/riscv/include/asm/futex.h:63:3: error: expected ')'
                   __futex_atomic_op("amoand.w.aqrl %[ov],%z[op],%[u]",
                   ^
   arch/riscv/include/asm/futex.h:33:3: note: expanded from macro '__futex_atomic_op'
                   _ASM_EXTABLE(1b, 3b)                            \
                   ^
   arch/riscv/include/asm/futex.h:67:3: error: expected ')'
                   __futex_atomic_op("amoxor.w.aqrl %[ov],%z[op],%[u]",
                   ^
   arch/riscv/include/asm/futex.h:33:3: note: expanded from macro '__futex_atomic_op'
                   _ASM_EXTABLE(1b, 3b)                            \
                   ^
   arch/riscv/include/asm/futex.h:103:3: error: expected ')'
                   _ASM_EXTABLE(1b, 4b)                    \
                   ^
   7 warnings and 6 errors generated.


vim +51 arch/riscv/include/asm/futex.h

b90edb33010bcf Jim Wilson 2018-10-16  40  
b90edb33010bcf Jim Wilson 2018-10-16  41  static inline int
b90edb33010bcf Jim Wilson 2018-10-16  42  arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
b90edb33010bcf Jim Wilson 2018-10-16  43  {
b90edb33010bcf Jim Wilson 2018-10-16  44  	int oldval = 0, ret = 0;
b90edb33010bcf Jim Wilson 2018-10-16  45  
a08971e9488d12 Al Viro    2020-02-16  46  	if (!access_ok(uaddr, sizeof(u32)))
a08971e9488d12 Al Viro    2020-02-16  47  		return -EFAULT;
b90edb33010bcf Jim Wilson 2018-10-16  48  
b90edb33010bcf Jim Wilson 2018-10-16  49  	switch (op) {
b90edb33010bcf Jim Wilson 2018-10-16  50  	case FUTEX_OP_SET:
b90edb33010bcf Jim Wilson 2018-10-16 @51  		__futex_atomic_op("amoswap.w.aqrl %[ov],%z[op],%[u]",
b90edb33010bcf Jim Wilson 2018-10-16  52  				  ret, oldval, uaddr, oparg);
b90edb33010bcf Jim Wilson 2018-10-16  53  		break;
b90edb33010bcf Jim Wilson 2018-10-16  54  	case FUTEX_OP_ADD:
b90edb33010bcf Jim Wilson 2018-10-16  55  		__futex_atomic_op("amoadd.w.aqrl %[ov],%z[op],%[u]",
b90edb33010bcf Jim Wilson 2018-10-16  56  				  ret, oldval, uaddr, oparg);
b90edb33010bcf Jim Wilson 2018-10-16  57  		break;
b90edb33010bcf Jim Wilson 2018-10-16  58  	case FUTEX_OP_OR:
b90edb33010bcf Jim Wilson 2018-10-16  59  		__futex_atomic_op("amoor.w.aqrl %[ov],%z[op],%[u]",
b90edb33010bcf Jim Wilson 2018-10-16  60  				  ret, oldval, uaddr, oparg);
b90edb33010bcf Jim Wilson 2018-10-16  61  		break;
b90edb33010bcf Jim Wilson 2018-10-16  62  	case FUTEX_OP_ANDN:
b90edb33010bcf Jim Wilson 2018-10-16  63  		__futex_atomic_op("amoand.w.aqrl %[ov],%z[op],%[u]",
b90edb33010bcf Jim Wilson 2018-10-16  64  				  ret, oldval, uaddr, ~oparg);
b90edb33010bcf Jim Wilson 2018-10-16  65  		break;
b90edb33010bcf Jim Wilson 2018-10-16  66  	case FUTEX_OP_XOR:
b90edb33010bcf Jim Wilson 2018-10-16  67  		__futex_atomic_op("amoxor.w.aqrl %[ov],%z[op],%[u]",
b90edb33010bcf Jim Wilson 2018-10-16  68  				  ret, oldval, uaddr, oparg);
b90edb33010bcf Jim Wilson 2018-10-16  69  		break;
b90edb33010bcf Jim Wilson 2018-10-16  70  	default:
b90edb33010bcf Jim Wilson 2018-10-16  71  		ret = -ENOSYS;
b90edb33010bcf Jim Wilson 2018-10-16  72  	}
b90edb33010bcf Jim Wilson 2018-10-16  73  
b90edb33010bcf Jim Wilson 2018-10-16  74  	if (!ret)
b90edb33010bcf Jim Wilson 2018-10-16  75  		*oval = oldval;
b90edb33010bcf Jim Wilson 2018-10-16  76  
b90edb33010bcf Jim Wilson 2018-10-16  77  	return ret;
b90edb33010bcf Jim Wilson 2018-10-16  78  }
b90edb33010bcf Jim Wilson 2018-10-16  79  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] riscv: consolidate __ex_table construction
  2021-10-18  0:14   ` kernel test robot
@ 2021-10-20 14:03     ` Jisheng Zhang
  0 siblings, 0 replies; 5+ messages in thread
From: Jisheng Zhang @ 2021-10-20 14:03 UTC (permalink / raw)
  To: kernel test robot
  Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Masahiro Yamada,
	Michal Marek, Nick Desaulniers, llvm, kbuild-all, linux-riscv,
	linux-kernel, linux-kbuild

On Mon, 18 Oct 2021 08:14:28 +0800
kernel test robot <lkp@intel.com> wrote:

> Hi Jisheng,
> 
> I love your patch! Yet something to improve:
> 
> [auto build test ERROR on linus/master]
> [also build test ERROR on v5.15-rc5 next-20211015]
> [If your patch is applied to the wrong git tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
> https://git-scm.com/docs/git-format-patch]
> 
> url:    https://github.com/0day-ci/linux/commits/Jisheng-Zhang/riscv-switch-to-relative-extable/20211017-001318
> base:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 8fe31e0995f048d16b378b90926793a0aa4af1e5
> config: riscv-randconfig-r032-20211017 (attached as .config)
> compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project 746dd6a700931988dd9021d3d04718f1929885a5)
> reproduce (this is a W=1 build):
>         wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
>         chmod +x ~/bin/make.cross
>         # install riscv cross compiling tool for clang build
>         # apt-get install binutils-riscv64-linux-gnu
>         # https://github.com/0day-ci/linux/commit/23c273bf6ec4ca672a21dba701725087208dc784
>         git remote add linux-review https://github.com/0day-ci/linux
>         git fetch --no-tags linux-review Jisheng-Zhang/riscv-switch-to-relative-extable/20211017-001318
>         git checkout 23c273bf6ec4ca672a21dba701725087208dc784
>         # save the attached .config to linux build tree
>         mkdir build_dir
>         COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=riscv SHELL=/bin/bash
> 
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot <lkp@intel.com>
> 
> All errors (new ones prefixed by >>):
> 
>    In file included from kernel/futex.c:36:
>    In file included from include/linux/pagemap.h:11:
>    In file included from include/linux/highmem.h:10:
>    In file included from include/linux/hardirq.h:11:
>    In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
>    In file included from include/asm-generic/hardirq.h:17:
>    In file included from include/linux/irq.h:20:
>    In file included from include/linux/io.h:13:
>    In file included from arch/riscv/include/asm/io.h:136:
>    include/asm-generic/io.h:464:31: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
>            val = __raw_readb(PCI_IOBASE + addr);
>                              ~~~~~~~~~~ ^
>    include/asm-generic/io.h:477:61: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
>            val = __le16_to_cpu((__le16 __force)__raw_readw(PCI_IOBASE + addr));
>                                                            ~~~~~~~~~~ ^
>    include/uapi/linux/byteorder/little_endian.h:36:51: note: expanded from macro '__le16_to_cpu'
>    #define __le16_to_cpu(x) ((__force __u16)(__le16)(x))
>                                                      ^
>    In file included from kernel/futex.c:36:
>    In file included from include/linux/pagemap.h:11:
>    In file included from include/linux/highmem.h:10:
>    In file included from include/linux/hardirq.h:11:
>    In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
>    In file included from include/asm-generic/hardirq.h:17:
>    In file included from include/linux/irq.h:20:
>    In file included from include/linux/io.h:13:
>    In file included from arch/riscv/include/asm/io.h:136:
>    include/asm-generic/io.h:490:61: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
>            val = __le32_to_cpu((__le32 __force)__raw_readl(PCI_IOBASE + addr));
>                                                            ~~~~~~~~~~ ^
>    include/uapi/linux/byteorder/little_endian.h:34:51: note: expanded from macro '__le32_to_cpu'
>    #define __le32_to_cpu(x) ((__force __u32)(__le32)(x))
>                                                      ^
>    In file included from kernel/futex.c:36:
>    In file included from include/linux/pagemap.h:11:
>    In file included from include/linux/highmem.h:10:
>    In file included from include/linux/hardirq.h:11:
>    In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
>    In file included from include/asm-generic/hardirq.h:17:
>    In file included from include/linux/irq.h:20:
>    In file included from include/linux/io.h:13:
>    In file included from arch/riscv/include/asm/io.h:136:
>    include/asm-generic/io.h:501:33: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
>            __raw_writeb(value, PCI_IOBASE + addr);
>                                ~~~~~~~~~~ ^

The warnings like this are not caused by this patch, they existed for a long
time since NOMMU is supported. But no good solution so far.

>    include/asm-generic/io.h:511:59: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
>            __raw_writew((u16 __force)cpu_to_le16(value), PCI_IOBASE + addr);
>                                                          ~~~~~~~~~~ ^
>    include/asm-generic/io.h:521:59: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
>            __raw_writel((u32 __force)cpu_to_le32(value), PCI_IOBASE + addr);
>                                                          ~~~~~~~~~~ ^
>    include/asm-generic/io.h:1024:55: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
>            return (port > MMIO_UPPER_LIMIT) ? NULL : PCI_IOBASE + port;
>                                                      ~~~~~~~~~~ ^
>    In file included from kernel/futex.c:43:
> >> arch/riscv/include/asm/futex.h:51:3: error: expected ')'  
>                    __futex_atomic_op("amoswap.w.aqrl %[ov],%z[op],%[u]",
>                    ^
>    arch/riscv/include/asm/futex.h:33:3: note: expanded from macro '__futex_atomic_op'
>                    _ASM_EXTABLE(1b, 3b)                            \
>                    ^

Errors like this are caused by my patch, I missed NOMMU. Fixed in V2.


Thanks


^ permalink raw reply	[flat|nested] 5+ messages in thread
end of thread, other threads:[~2021-10-20 14:10 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-10-16 16:04 [PATCH 0/2] riscv: switch to relative extable Jisheng Zhang
2021-10-16 16:04 ` [PATCH 1/2] riscv: consolidate __ex_table construction Jisheng Zhang
2021-10-18  0:14   ` kernel test robot
2021-10-20 14:03     ` Jisheng Zhang
2021-10-16 16:05 ` [PATCH 2/2] riscv: switch to relative exception tables Jisheng Zhang

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