From: Christoph Hellwig <hch@lst.de>
To: Wei Fu <wefu@redhat.com>
Cc: "Christoph Hellwig" <hch@infradead.org>,
"Anup Patel" <anup.patel@wdc.com>,
"Atish Patra" <atish.patra@wdc.com>,
"Palmer Dabbelt" <palmerdabbelt@google.com>,
guoren@kernel.org, christoph.muellner@vrull.eu,
"Philipp Tomsich" <philipp.tomsich@vrull.eu>,
"Christoph Hellwig" <hch@lst.de>,
"Liu Shaohua" <liush@allwinnertech.com>,
"Wei Wu (吴伟)" <lazyparser@gmail.com>,
"Drew Fustini" <drew@beagleboard.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
taiten.peng@canonical.com, aniket.ponkshe@canonical.com,
heinrich.schuchardt@canonical.com, gordan.markus@canonical.com,
guoren@linux.alibaba.com, "Arnd Bergmann" <arnd@arndb.de>,
"Chen-Yu Tsai" <wens@csie.org>,
"Maxime Ripard" <maxime@cerno.tech>,
"Daniel Lustig" <dlustig@nvidia.com>,
"Greg Favor" <gfavor@ventanamicro.com>,
"Andrea Mondelli" <andrea.mondelli@huawei.com>,
"Jonathan Behrens" <behrensj@mit.edu>,
Xinhaoqu <xinhaoqu@huawei.com>,
"Bill Huffman" <huffman@cadence.com>,
"Nick Kossifidis" <mick@ics.forth.gr>,
"Allen Baum" <allen.baum@esperantotech.com>,
"Josh Scheid" <jscheid@ventanamicro.com>,
"Richard Trauben" <rtrauben@gmail.com>
Subject: Re: [RESEND PATCH V3 2/2] riscv: add RISC-V Svpbmt extension supports
Date: Tue, 2 Nov 2021 07:04:24 +0100 [thread overview]
Message-ID: <20211102060424.GA27015@lst.de> (raw)
In-Reply-To: <CA+YCwKn1VA8=NSa=bdhP99jfpokYGHBvqVSKvZmdndQOz6UUPA@mail.gmail.com>
On Mon, Oct 25, 2021 at 10:49:11PM +0800, Wei Fu wrote:
> > > + >> _PAGE_PFN_SHIFT);
> >
> > > static inline unsigned long _pmd_pfn(pmd_t pmd)
> > > {
> > > - return pmd_val(pmd) >> _PAGE_PFN_SHIFT;
> > > + return (pmd_val(pmd) & _PAGE_CHG_MASK) >> _PAGE_PFN_SHIFT;
> > > }
> >
> > The "(pud_val(pud) & _PAGE_CHG_MASK) >> _PAGE_PFN_SHIFT" expression begs
> > for readable and well-documented helper.
>
> How about these:
> #define _chg_of_pmd(pmd) (pmd_val(pmd) & _PAGE_CHG_MASK)
> #define _chg_of_pud(pud) (pud_val(pud) & _PAGE_CHG_MASK)
I'd use inline functions instead of macros if possible, but otherwise
yes.
> How about :
>
> extern unsigned long _svpbmt_mask
> extern unsigned long _svpbmt_mt_pma
> extern unsigned long _svpbmt_mt_nc
> extern unsigned long _svpbmt_mt_io
>
> #define _PAGE_MT_MASK _svpbmt_mask
> #define _PAGE_MT_PMA _svpbmt_mt_pma
> #define _PAGE_MT_NC _svpbmt_mt_nc
> #define _PAGE_MT_IO _svpbmt_mt_io
Looks much better.
next prev parent reply other threads:[~2021-11-02 6:04 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-25 4:06 [RESEND PATCH V3 0/2] riscv: add RISC-V Svpbmt Standard Extension supports wefu
2021-10-25 4:06 ` [RESEND PATCH V3 1/2] dt-bindings: riscv: add mmu-supports-svpbmt for Svpbmt wefu
2021-10-25 4:17 ` Anup Patel
2021-10-25 6:00 ` Guo Ren
2021-10-25 6:08 ` Anup Patel
2021-10-25 13:21 ` Philipp Tomsich
2021-10-25 6:09 ` Guo Ren
2021-10-25 4:06 ` [RESEND PATCH V3 2/2] riscv: add RISC-V Svpbmt extension supports wefu
2021-10-25 6:55 ` Christoph Hellwig
2021-10-25 10:55 ` Wei Fu
2021-11-02 6:07 ` Christoph Hellwig
2021-11-07 7:23 ` Wei Fu
2021-10-25 14:49 ` Wei Fu
2021-11-02 6:04 ` Christoph Hellwig [this message]
2021-11-07 6:54 ` Wei Fu
2021-10-27 0:12 ` [RESEND PATCH V3 0/2] riscv: add RISC-V Svpbmt Standard Extension supports Palmer Dabbelt
2021-10-27 7:54 ` Heinrich Schuchardt
2021-11-02 2:07 ` Guo Ren
2021-11-02 5:58 ` Christoph Hellwig
2021-11-02 8:51 ` Guo Ren
2021-11-07 7:12 ` Wei Fu
2021-11-08 7:52 ` Christoph Hellwig
2021-11-26 16:23 ` Wei Fu
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