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From: Dmitry Osipenko <digetx@gmail.com>
To: "Thierry Reding" <thierry.reding@gmail.com>,
	"Jonathan Hunter" <jonathanh@nvidia.com>,
	"Ulf Hansson" <ulf.hansson@linaro.org>,
	"Viresh Kumar" <vireshk@kernel.org>,
	"Stephen Boyd" <sboyd@kernel.org>,
	"Peter De Schrijver" <pdeschrijver@nvidia.com>,
	"Mikko Perttunen" <mperttunen@nvidia.com>,
	"Lee Jones" <lee.jones@linaro.org>,
	"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	"Nishanth Menon" <nm@ti.com>,
	"Adrian Hunter" <adrian.hunter@intel.com>,
	"Michael Turquette" <mturquette@baylibre.com>
Cc: linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-pm@vger.kernel.org, linux-pwm@vger.kernel.org,
	linux-mmc@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-clk@vger.kernel.org, David Heidelberg <david@ixit.cz>
Subject: [PATCH v15 04/39] dt-bindings: clock: tegra-car: Document new clock sub-nodes
Date: Sun, 14 Nov 2021 22:34:00 +0300	[thread overview]
Message-ID: <20211114193435.7705-5-digetx@gmail.com> (raw)
In-Reply-To: <20211114193435.7705-1-digetx@gmail.com>

Document sub-nodes which describe Tegra SoC clocks that require a higher
voltage of the core power domain in order to operate properly on a higher
clock rates.  Each node contains a phandle to OPP table and power domain.

The root PLLs and system clocks don't have any specific device dedicated
to them, clock controller is in charge of managing power for them.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 .../bindings/clock/nvidia,tegra20-car.yaml    | 37 +++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.yaml b/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.yaml
index 459d2a525393..f832abb7f11a 100644
--- a/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.yaml
+++ b/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.yaml
@@ -42,6 +42,36 @@ properties:
   "#reset-cells":
     const: 1
 
+patternProperties:
+  "^(sclk)|(pll-[cem])$":
+    type: object
+    properties:
+      compatible:
+        enum:
+          - nvidia,tegra20-sclk
+          - nvidia,tegra30-sclk
+          - nvidia,tegra30-pllc
+          - nvidia,tegra30-plle
+          - nvidia,tegra30-pllm
+
+      operating-points-v2: true
+
+      clocks:
+        items:
+          - description: node's clock
+
+      power-domains:
+        maxItems: 1
+        description: phandle to the core SoC power domain
+
+    required:
+      - compatible
+      - operating-points-v2
+      - clocks
+      - power-domains
+
+    additionalProperties: false
+
 required:
   - compatible
   - reg
@@ -59,6 +89,13 @@ examples:
         reg = <0x60006000 0x1000>;
         #clock-cells = <1>;
         #reset-cells = <1>;
+
+        sclk {
+            compatible = "nvidia,tegra20-sclk";
+            operating-points-v2 = <&opp_table>;
+            clocks = <&tegra_car TEGRA20_CLK_SCLK>;
+            power-domains = <&domain>;
+        };
     };
 
     usb-controller@c5004000 {
-- 
2.33.1


  parent reply	other threads:[~2021-11-14 19:37 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-14 19:33 [PATCH v15 00/39] NVIDIA Tegra power management patches for 5.17 Dmitry Osipenko
2021-11-14 19:33 ` [PATCH v15 01/39] soc/tegra: Enable runtime PM during OPP state-syncing Dmitry Osipenko
2021-11-14 19:33 ` [PATCH v15 02/39] soc/tegra: Add devm_tegra_core_dev_init_opp_table_common() Dmitry Osipenko
2021-11-14 19:33 ` [PATCH v15 03/39] soc/tegra: Don't print error message when OPPs not available Dmitry Osipenko
2021-11-14 19:34 ` Dmitry Osipenko [this message]
2021-11-14 19:34 ` [PATCH v15 05/39] clk: tegra: Support runtime PM and power domain Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 06/39] dt-bindings: host1x: Document OPP and power domain properties Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 07/39] dt-bindings: host1x: Document Memory Client resets of Host1x, GR2D and GR3D Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 08/39] gpu: host1x: Add initial runtime PM and OPP support Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 09/39] gpu: host1x: Add host1x_channel_stop() Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 10/39] drm/tegra: dc: Support OPP and SoC core voltage scaling Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 11/39] drm/tegra: hdmi: Add OPP support Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 12/39] drm/tegra: gr2d: Support generic power domain and runtime PM Dmitry Osipenko
2021-11-28  5:47   ` Michał Mirosław
2021-11-28 21:50     ` Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 13/39] drm/tegra: gr3d: " Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 14/39] drm/tegra: vic: Stop channel on suspend Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 15/39] drm/tegra: nvdec: " Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 16/39] drm/tegra: submit: Remove pm_runtime_enabled() checks Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 17/39] drm/tegra: submit: Add missing pm_runtime_mark_last_busy() Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 18/39] usb: chipidea: tegra: Add runtime PM and OPP support Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 19/39] bus: tegra-gmi: " Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 20/39] pwm: tegra: " Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 21/39] mmc: sdhci-tegra: " Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 22/39] mtd: rawnand: tegra: " Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 23/39] spi: tegra20-slink: Add " Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 24/39] media: dt: bindings: tegra-vde: Convert to schema Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 25/39] media: dt: bindings: tegra-vde: Document OPP and power domain Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 26/39] media: staging: tegra-vde: Support generic " Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 27/39] soc/tegra: fuse: Reset hardware Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 28/39] soc/tegra: fuse: Use resource-managed helpers Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 29/39] soc/tegra: regulators: Prepare for suspend Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 30/39] soc/tegra: pmc: Rename 3d power domains Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 31/39] soc/tegra: pmc: Rename core power domain Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 32/39] soc/tegra: pmc: Enable core domain support for Tegra20 and Tegra30 Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 33/39] ARM: tegra: Rename CPU and EMC OPP table device-tree nodes Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 34/39] ARM: tegra: Add 500MHz entry to Tegra30 memory OPP table Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 35/39] ARM: tegra: Add OPP tables and power domains to Tegra20 device-trees Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 36/39] ARM: tegra: Add OPP tables and power domains to Tegra30 device-trees Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 37/39] ARM: tegra: Add Memory Client resets to Tegra20 GR2D, GR3D and Host1x Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 38/39] ARM: tegra: Add Memory Client resets to Tegra30 " Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 39/39] ARM: tegra20/30: Disable unused host1x hardware Dmitry Osipenko
2021-11-28  5:40 ` [PATCH v15 00/39] NVIDIA Tegra power management patches for 5.17 Michał Mirosław
2021-11-28 22:03   ` Dmitry Osipenko

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