[PATCH] perf/x86/amd: Use faster rdpmc instruction when waiting for overflow

* [PATCH] perf/x86/amd: Use faster rdpmc instruction when waiting for overflow
@ 2021-11-16 17:07 Kim Phillips
  0 siblings, 0 replies; only message in thread
From: Kim Phillips @ 2021-11-16 17:07 UTC (permalink / raw)
  To: Borislav Petkov, Borislav Petkov, Peter Zijlstra, Ingo Molnar,
	Ingo Molnar, Thomas Gleixner, kim.phillips
  Cc: linux-kernel

The relatively new amd_pmu_wait_on_overflow uses rdmsr.
Update it to use the faster rdpmc instruction.

Signed-off-by: Kim Phillips <kim.phillips@amd.com>
---
 arch/x86/events/amd/core.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c
index 9687a8aef01c..c36cb0c6f9e1 100644
--- a/arch/x86/events/amd/core.c
+++ b/arch/x86/events/amd/core.c
@@ -587,6 +587,8 @@ static void amd_pmu_cpu_dead(int cpu)
 
 static void amd_pmu_wait_on_overflow(int idx)
 {
+	struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
+	struct hw_perf_event *hwc = &cpuc->events[idx]->hw;
 	unsigned int i;
 	u64 counter;
 
@@ -596,7 +598,7 @@ static void amd_pmu_wait_on_overflow(int idx)
 	 * forever...
 	 */
 	for (i = 0; i < OVERFLOW_WAIT_COUNT; i++) {
-		rdmsrl(x86_pmu_event_addr(idx), counter);
+		rdpmcl(hwc->event_base_rdpmc, counter);
 		if (counter & (1ULL << (x86_pmu.cntval_bits - 1)))
 			break;
 
-- 
2.32.0


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