* [RESEND PATCH 0/2] arm64: dts: sm8350: add support for Microsoft Surface Duo 2 @ 2021-11-16 23:50 Katherine Perez 2021-11-16 23:50 ` [RESEND PATCH 1/2] arm64: dts: add minimal DTS for Microsoft Surface Duo2 Katherine Perez 2021-11-16 23:50 ` [RESEND PATCH 2/2] arm64: dts: sm8350: fix tlmm base address Katherine Perez 0 siblings, 2 replies; 6+ messages in thread From: Katherine Perez @ 2021-11-16 23:50 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson, Rob Herring Cc: linux-arm-msm, devicetree, linux-kernel, Felipe Balbi Add initial support for the Microsoft Surface Duo 2 based on the sm8350-mtp DT. Katherine Perez (2): arm64: dts: add minimal DTS for Microsoft Surface Duo2 arm64: dts: sm8350: fix tlmm base address arch/arm64/boot/dts/qcom/Makefile | 1 + .../qcom/sm8350-microsoft-surface-duo2.dts | 363 ++++++++++++++++++ arch/arm64/boot/dts/qcom/sm8350.dtsi | 4 +- 3 files changed, 366 insertions(+), 2 deletions(-) create mode 100644 arch/arm64/boot/dts/qcom/sm8350-microsoft-surface-duo2.dts -- 2.31.1 ^ permalink raw reply [flat|nested] 6+ messages in thread
* [RESEND PATCH 1/2] arm64: dts: add minimal DTS for Microsoft Surface Duo2 2021-11-16 23:50 [RESEND PATCH 0/2] arm64: dts: sm8350: add support for Microsoft Surface Duo 2 Katherine Perez @ 2021-11-16 23:50 ` Katherine Perez 2021-11-19 3:51 ` Bjorn Andersson 2021-11-16 23:50 ` [RESEND PATCH 2/2] arm64: dts: sm8350: fix tlmm base address Katherine Perez 1 sibling, 1 reply; 6+ messages in thread From: Katherine Perez @ 2021-11-16 23:50 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson, Rob Herring Cc: linux-arm-msm, devicetree, linux-kernel, Felipe Balbi This is a minimal devicetree for Microsoft Surface Duo 2 with SM8350 Chipset Signed-off-by: Katherine Perez <kaperez@linux.microsoft.com> --- arch/arm64/boot/dts/qcom/Makefile | 1 + .../qcom/sm8350-microsoft-surface-duo2.dts | 363 ++++++++++++++++++ 2 files changed, 364 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sm8350-microsoft-surface-duo2.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 6b816eb33309..a8cc6bd3c423 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -106,4 +106,5 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8250-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8250-sony-xperia-edo-pdx203.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8250-sony-xperia-edo-pdx206.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8350-hdk.dtb +dtb-$(CONFIG_ARCH_QCOM) += sm8350-microsoft-surface-duo2.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8350-mtp.dtb diff --git a/arch/arm64/boot/dts/qcom/sm8350-microsoft-surface-duo2.dts b/arch/arm64/boot/dts/qcom/sm8350-microsoft-surface-duo2.dts new file mode 100644 index 000000000000..941eac43614f --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm8350-microsoft-surface-duo2.dts @@ -0,0 +1,363 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (C) 2021, Microsoft Corporation + */ + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h> +#include "sm8350.dtsi" +#include "pm8350.dtsi" +#include "pm8350b.dtsi" +#include "pm8350c.dtsi" +#include "pmk8350.dtsi" +#include "pmr735a.dtsi" +#include "pmr735b.dtsi" + +/ { + model = "Microsoft Surface Duo 2"; + compatible = "microsoft,surface-duo2", "qcom,sm8350"; + + aliases { + serial0 = &uart2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; + regulator-min-microvolt = <3700000>; + regulator-max-microvolt = <3700000>; + + regulator-always-on; + regulator-boot-on; + }; +}; + +&adsp { + status = "okay"; + firmware-name = "qcom/sm8350/adsp.mbn"; +}; + +&apps_rsc { + pm8350-rpmh-regulators { + compatible = "qcom,pm8350-rpmh-regulators"; + qcom,pmic-id = "b"; + + vdd-s1-supply = <&vph_pwr>; + vdd-s2-supply = <&vph_pwr>; + vdd-s3-supply = <&vph_pwr>; + vdd-s4-supply = <&vph_pwr>; + vdd-s5-supply = <&vph_pwr>; + vdd-s6-supply = <&vph_pwr>; + vdd-s7-supply = <&vph_pwr>; + vdd-s8-supply = <&vph_pwr>; + vdd-s9-supply = <&vph_pwr>; + vdd-s10-supply = <&vph_pwr>; + vdd-s11-supply = <&vph_pwr>; + vdd-s12-supply = <&vph_pwr>; + + vdd-l1-l4-supply = <&vreg_s11b_0p95>; + vdd-l2-l7-supply = <&vreg_bob>; + vdd-l3-l5-supply = <&vreg_bob>; + vdd-l6-l9-l10-supply = <&vreg_s11b_0p95>; + vdd-l8-supply = <&vreg_s2c_0p8>; + + vreg_s10b_1p8: smps10 { + regulator-name = "vreg_s10b_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vreg_s11b_0p95: smps11 { + regulator-name = "vreg_s11b_0p95"; + regulator-min-microvolt = <752000>; + regulator-max-microvolt = <1000000>; + }; + + vreg_s12b_1p25: smps12 { + regulator-name = "vreg_s12b_1p25"; + regulator-min-microvolt = <1224000>; + regulator-max-microvolt = <1360000>; + }; + + vreg_l1b_0p88: ldo1 { + regulator-name = "vreg_l1b_0p88"; + regulator-min-microvolt = <912000>; + regulator-max-microvolt = <920000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l2b_3p07: ldo2 { + regulator-name = "vreg_l2b_3p07"; + regulator-min-microvolt = <3072000>; + regulator-max-microvolt = <3072000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l3b_0p9: ldo3 { + regulator-name = "vreg_l3b_0p9"; + regulator-min-microvolt = <904000>; + regulator-max-microvolt = <904000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l5b_0p88: ldo5 { + regulator-name = "vreg_l3b_0p9"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <888000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l6b_1p2: ldo6 { + regulator-name = "vreg_l6b_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1208000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l7b_2p96: ldo7 { + regulator-name = "vreg_l7b_2p96"; + regulator-min-microvolt = <2400000>; + regulator-max-microvolt = <3008000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l9b_1p2: ldo9 { + regulator-name = "vreg_l9b_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + }; + + pm8350c-rpmh-regulators { + compatible = "qcom,pm8350c-rpmh-regulators"; + qcom,pmic-id = "c"; + + vdd-s1-supply = <&vph_pwr>; + vdd-s2-supply = <&vph_pwr>; + vdd-s3-supply = <&vph_pwr>; + vdd-s4-supply = <&vph_pwr>; + vdd-s5-supply = <&vph_pwr>; + vdd-s6-supply = <&vph_pwr>; + vdd-s7-supply = <&vph_pwr>; + vdd-s8-supply = <&vph_pwr>; + vdd-s9-supply = <&vph_pwr>; + vdd-s10-supply = <&vph_pwr>; + + vdd-l1-l12-supply = <&vreg_s1c_1p86>; + vdd-l2-l8-supply = <&vreg_s1c_1p86>; + vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>; + vdd-l6-l9-l11-supply = <&vreg_bob>; + vdd-l10-supply = <&vreg_s12b_1p25>; + + vdd-bob-supply = <&vph_pwr>; + + vreg_s1c_1p86: smps1 { + regulator-name = "vreg_s1c_1p86"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1952000>; + }; + + vreg_s2c_0p8: smps2 { + regulator-name = "vreg_s2c_0p8"; + regulator-min-microvolt = <640000>; + regulator-max-microvolt = <1000000>; + }; + + vreg_s10c_1p05: smps10 { + regulator-name = "vreg_s10c_1p05"; + regulator-min-microvolt = <1048000>; + regulator-max-microvolt = <1128000>; + }; + + vreg_bob: bob { + regulator-name = "vreg_bob"; + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <3960000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; + }; + + vreg_l1c_1p8: ldo1 { + regulator-name = "vreg_l1c_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l2c_1p8: ldo2 { + regulator-name = "vreg_l2c_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l3c_3p0: ldo3 { + regulator-name = "vreg_l3c_3p0"; + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <3008000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l4c_uim1: ldo4 { + regulator-name = "vreg_l4c_uim1"; + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <3000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l5c_uim2: ldo5 { + regulator-name = "vreg_l5c_uim2"; + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <3000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l6c_1p8: ldo6 { + regulator-name = "vreg_l6c_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l7c_3p0: ldo7 { + regulator-name = "vreg_l7c_3p0"; + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <3008000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l8c_1p8: ldo8 { + regulator-name = "vreg_l8c_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l9c_2p96: ldo9 { + regulator-name = "vreg_l9c_2p96"; + regulator-min-microvolt = <2960000>; + regulator-max-microvolt = <3008000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l10c_1p2: ldo10 { + regulator-name = "vreg_l10c_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l11c_2p96: ldo11 { + regulator-name = "vreg_l11c_2p96"; + regulator-min-microvolt = <2400000>; + regulator-max-microvolt = <3008000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l12c_1p8: ldo12 { + regulator-name = "vreg_l12c_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l13c_3p0: ldo13 { + regulator-name = "vreg_l13c_3p0"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + }; +}; + +&cdsp { + status = "okay"; + firmware-name = "qcom/sm8350/cdsp.mbn"; +}; + +&ipa { + status = "okay"; + + memory-region = <&pil_ipa_fw_mem>; +}; + +&qupv3_id_0 { + status = "okay"; +}; + +&slpi { + status = "okay"; + firmware-name = "qcom/sm8350/slpi.mbn"; +}; + +&tlmm { + gpio-reserved-ranges = <9 8>; +}; + +&uart2 { + status = "okay"; +}; + +&ufs_mem_hc { + status = "okay"; + + reset-gpios = <&tlmm 203 GPIO_ACTIVE_LOW>; + + vcc-supply = <&vreg_l7b_2p96>; + vcc-max-microamp = <800000>; + vccq-supply = <&vreg_l9b_1p2>; + vccq-max-microamp = <900000>; +}; + +&ufs_mem_phy { + status = "okay"; + + vdda-phy-supply = <&vreg_l5b_0p88>; + vdda-max-microamp = <91600>; + vdda-pll-supply = <&vreg_l6b_1p2>; + vdda-pll-max-microamp = <19000>; +}; + +&usb_1 { + dr_mode = "peripheral"; +}; + +&usb_1_hsphy { + status = "okay"; + + vdda-pll-supply = <&vreg_l5b_0p88>; + vdda18-supply = <&vreg_l1c_1p8>; + vdda33-supply = <&vreg_l2b_3p07>; +}; + +&usb_1_qmpphy { + status = "okay"; + + vdda-phy-supply = <&vreg_l6b_1p2>; + vdda-pll-supply = <&vreg_l1b_0p88>; +}; + +&usb_2 { + status = "okay"; +}; + +&usb_2_hsphy { + status = "okay"; + + vdda-pll-supply = <&vreg_l5b_0p88>; + vdda18-supply = <&vreg_l1c_1p8>; + vdda33-supply = <&vreg_l2b_3p07>; +}; + +&usb_2_qmpphy { + status = "okay"; + + vdda-phy-supply = <&vreg_l6b_1p2>; + vdda-pll-supply = <&vreg_l5b_0p88>; +}; -- 2.31.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [RESEND PATCH 1/2] arm64: dts: add minimal DTS for Microsoft Surface Duo2 2021-11-16 23:50 ` [RESEND PATCH 1/2] arm64: dts: add minimal DTS for Microsoft Surface Duo2 Katherine Perez @ 2021-11-19 3:51 ` Bjorn Andersson 0 siblings, 0 replies; 6+ messages in thread From: Bjorn Andersson @ 2021-11-19 3:51 UTC (permalink / raw) To: Katherine Perez Cc: Andy Gross, Rob Herring, linux-arm-msm, devicetree, linux-kernel, Felipe Balbi On Tue 16 Nov 17:50 CST 2021, Katherine Perez wrote: > This is a minimal devicetree for Microsoft Surface Duo 2 with SM8350 > Chipset > Thanks Katherine, really nice to see this initial support. Looking forward to see it grow. Just two small nits below. > Signed-off-by: Katherine Perez <kaperez@linux.microsoft.com> > --- > arch/arm64/boot/dts/qcom/Makefile | 1 + > .../qcom/sm8350-microsoft-surface-duo2.dts | 363 ++++++++++++++++++ > 2 files changed, 364 insertions(+) > create mode 100644 arch/arm64/boot/dts/qcom/sm8350-microsoft-surface-duo2.dts > > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile > index 6b816eb33309..a8cc6bd3c423 100644 > --- a/arch/arm64/boot/dts/qcom/Makefile > +++ b/arch/arm64/boot/dts/qcom/Makefile > @@ -106,4 +106,5 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8250-mtp.dtb > dtb-$(CONFIG_ARCH_QCOM) += sm8250-sony-xperia-edo-pdx203.dtb > dtb-$(CONFIG_ARCH_QCOM) += sm8250-sony-xperia-edo-pdx206.dtb > dtb-$(CONFIG_ARCH_QCOM) += sm8350-hdk.dtb > +dtb-$(CONFIG_ARCH_QCOM) += sm8350-microsoft-surface-duo2.dtb > dtb-$(CONFIG_ARCH_QCOM) += sm8350-mtp.dtb > diff --git a/arch/arm64/boot/dts/qcom/sm8350-microsoft-surface-duo2.dts b/arch/arm64/boot/dts/qcom/sm8350-microsoft-surface-duo2.dts > new file mode 100644 > index 000000000000..941eac43614f > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/sm8350-microsoft-surface-duo2.dts > @@ -0,0 +1,363 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (C) 2021, Microsoft Corporation > + */ > + > +/dts-v1/; > + > +#include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/regulator/qcom,rpmh-regulator.h> > +#include "sm8350.dtsi" > +#include "pm8350.dtsi" > +#include "pm8350b.dtsi" > +#include "pm8350c.dtsi" > +#include "pmk8350.dtsi" > +#include "pmr735a.dtsi" > +#include "pmr735b.dtsi" > + > +/ { > + model = "Microsoft Surface Duo 2"; > + compatible = "microsoft,surface-duo2", "qcom,sm8350"; > + Can you please add: chassis-type = "handset"; > + aliases { > + serial0 = &uart2; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + vph_pwr: vph-pwr-regulator { > + compatible = "regulator-fixed"; > + regulator-name = "vph_pwr"; > + regulator-min-microvolt = <3700000>; > + regulator-max-microvolt = <3700000>; > + > + regulator-always-on; > + regulator-boot-on; > + }; > +}; > + > +&adsp { > + status = "okay"; > + firmware-name = "qcom/sm8350/adsp.mbn"; I have hopes that we'll be able to push some engineering signed versions of these firmware files, for e.g. the SM8350 HDK one day. When that happens that would conflict with your firmware path and I don't expect your devices to accept the "invalid" signature of those files. So I would prefer if you follow Felipe's naming scheme and put these (this and the other remoteprocs) in: qcom/sm8350/microsoft/* Thanks, Bjorn > +}; > + > +&apps_rsc { > + pm8350-rpmh-regulators { > + compatible = "qcom,pm8350-rpmh-regulators"; > + qcom,pmic-id = "b"; > + > + vdd-s1-supply = <&vph_pwr>; > + vdd-s2-supply = <&vph_pwr>; > + vdd-s3-supply = <&vph_pwr>; > + vdd-s4-supply = <&vph_pwr>; > + vdd-s5-supply = <&vph_pwr>; > + vdd-s6-supply = <&vph_pwr>; > + vdd-s7-supply = <&vph_pwr>; > + vdd-s8-supply = <&vph_pwr>; > + vdd-s9-supply = <&vph_pwr>; > + vdd-s10-supply = <&vph_pwr>; > + vdd-s11-supply = <&vph_pwr>; > + vdd-s12-supply = <&vph_pwr>; > + > + vdd-l1-l4-supply = <&vreg_s11b_0p95>; > + vdd-l2-l7-supply = <&vreg_bob>; > + vdd-l3-l5-supply = <&vreg_bob>; > + vdd-l6-l9-l10-supply = <&vreg_s11b_0p95>; > + vdd-l8-supply = <&vreg_s2c_0p8>; > + > + vreg_s10b_1p8: smps10 { > + regulator-name = "vreg_s10b_1p8"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + }; > + > + vreg_s11b_0p95: smps11 { > + regulator-name = "vreg_s11b_0p95"; > + regulator-min-microvolt = <752000>; > + regulator-max-microvolt = <1000000>; > + }; > + > + vreg_s12b_1p25: smps12 { > + regulator-name = "vreg_s12b_1p25"; > + regulator-min-microvolt = <1224000>; > + regulator-max-microvolt = <1360000>; > + }; > + > + vreg_l1b_0p88: ldo1 { > + regulator-name = "vreg_l1b_0p88"; > + regulator-min-microvolt = <912000>; > + regulator-max-microvolt = <920000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l2b_3p07: ldo2 { > + regulator-name = "vreg_l2b_3p07"; > + regulator-min-microvolt = <3072000>; > + regulator-max-microvolt = <3072000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l3b_0p9: ldo3 { > + regulator-name = "vreg_l3b_0p9"; > + regulator-min-microvolt = <904000>; > + regulator-max-microvolt = <904000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l5b_0p88: ldo5 { > + regulator-name = "vreg_l3b_0p9"; > + regulator-min-microvolt = <880000>; > + regulator-max-microvolt = <888000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l6b_1p2: ldo6 { > + regulator-name = "vreg_l6b_1p2"; > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <1208000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l7b_2p96: ldo7 { > + regulator-name = "vreg_l7b_2p96"; > + regulator-min-microvolt = <2400000>; > + regulator-max-microvolt = <3008000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l9b_1p2: ldo9 { > + regulator-name = "vreg_l9b_1p2"; > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <1200000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + }; > + > + pm8350c-rpmh-regulators { > + compatible = "qcom,pm8350c-rpmh-regulators"; > + qcom,pmic-id = "c"; > + > + vdd-s1-supply = <&vph_pwr>; > + vdd-s2-supply = <&vph_pwr>; > + vdd-s3-supply = <&vph_pwr>; > + vdd-s4-supply = <&vph_pwr>; > + vdd-s5-supply = <&vph_pwr>; > + vdd-s6-supply = <&vph_pwr>; > + vdd-s7-supply = <&vph_pwr>; > + vdd-s8-supply = <&vph_pwr>; > + vdd-s9-supply = <&vph_pwr>; > + vdd-s10-supply = <&vph_pwr>; > + > + vdd-l1-l12-supply = <&vreg_s1c_1p86>; > + vdd-l2-l8-supply = <&vreg_s1c_1p86>; > + vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>; > + vdd-l6-l9-l11-supply = <&vreg_bob>; > + vdd-l10-supply = <&vreg_s12b_1p25>; > + > + vdd-bob-supply = <&vph_pwr>; > + > + vreg_s1c_1p86: smps1 { > + regulator-name = "vreg_s1c_1p86"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1952000>; > + }; > + > + vreg_s2c_0p8: smps2 { > + regulator-name = "vreg_s2c_0p8"; > + regulator-min-microvolt = <640000>; > + regulator-max-microvolt = <1000000>; > + }; > + > + vreg_s10c_1p05: smps10 { > + regulator-name = "vreg_s10c_1p05"; > + regulator-min-microvolt = <1048000>; > + regulator-max-microvolt = <1128000>; > + }; > + > + vreg_bob: bob { > + regulator-name = "vreg_bob"; > + regulator-min-microvolt = <3008000>; > + regulator-max-microvolt = <3960000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; > + }; > + > + vreg_l1c_1p8: ldo1 { > + regulator-name = "vreg_l1c_1p8"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l2c_1p8: ldo2 { > + regulator-name = "vreg_l2c_1p8"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l3c_3p0: ldo3 { > + regulator-name = "vreg_l3c_3p0"; > + regulator-min-microvolt = <3008000>; > + regulator-max-microvolt = <3008000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l4c_uim1: ldo4 { > + regulator-name = "vreg_l4c_uim1"; > + regulator-min-microvolt = <1704000>; > + regulator-max-microvolt = <3000000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l5c_uim2: ldo5 { > + regulator-name = "vreg_l5c_uim2"; > + regulator-min-microvolt = <1704000>; > + regulator-max-microvolt = <3000000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l6c_1p8: ldo6 { > + regulator-name = "vreg_l6c_1p8"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <2960000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l7c_3p0: ldo7 { > + regulator-name = "vreg_l7c_3p0"; > + regulator-min-microvolt = <3008000>; > + regulator-max-microvolt = <3008000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l8c_1p8: ldo8 { > + regulator-name = "vreg_l8c_1p8"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l9c_2p96: ldo9 { > + regulator-name = "vreg_l9c_2p96"; > + regulator-min-microvolt = <2960000>; > + regulator-max-microvolt = <3008000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l10c_1p2: ldo10 { > + regulator-name = "vreg_l10c_1p2"; > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <1200000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l11c_2p96: ldo11 { > + regulator-name = "vreg_l11c_2p96"; > + regulator-min-microvolt = <2400000>; > + regulator-max-microvolt = <3008000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l12c_1p8: ldo12 { > + regulator-name = "vreg_l12c_1p8"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <2000000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l13c_3p0: ldo13 { > + regulator-name = "vreg_l13c_3p0"; > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3000000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + }; > +}; > + > +&cdsp { > + status = "okay"; > + firmware-name = "qcom/sm8350/cdsp.mbn"; > +}; > + > +&ipa { > + status = "okay"; > + > + memory-region = <&pil_ipa_fw_mem>; > +}; > + > +&qupv3_id_0 { > + status = "okay"; > +}; > + > +&slpi { > + status = "okay"; > + firmware-name = "qcom/sm8350/slpi.mbn"; > +}; > + > +&tlmm { > + gpio-reserved-ranges = <9 8>; > +}; > + > +&uart2 { > + status = "okay"; > +}; > + > +&ufs_mem_hc { > + status = "okay"; > + > + reset-gpios = <&tlmm 203 GPIO_ACTIVE_LOW>; > + > + vcc-supply = <&vreg_l7b_2p96>; > + vcc-max-microamp = <800000>; > + vccq-supply = <&vreg_l9b_1p2>; > + vccq-max-microamp = <900000>; > +}; > + > +&ufs_mem_phy { > + status = "okay"; > + > + vdda-phy-supply = <&vreg_l5b_0p88>; > + vdda-max-microamp = <91600>; > + vdda-pll-supply = <&vreg_l6b_1p2>; > + vdda-pll-max-microamp = <19000>; > +}; > + > +&usb_1 { > + dr_mode = "peripheral"; > +}; > + > +&usb_1_hsphy { > + status = "okay"; > + > + vdda-pll-supply = <&vreg_l5b_0p88>; > + vdda18-supply = <&vreg_l1c_1p8>; > + vdda33-supply = <&vreg_l2b_3p07>; > +}; > + > +&usb_1_qmpphy { > + status = "okay"; > + > + vdda-phy-supply = <&vreg_l6b_1p2>; > + vdda-pll-supply = <&vreg_l1b_0p88>; > +}; > + > +&usb_2 { > + status = "okay"; > +}; > + > +&usb_2_hsphy { > + status = "okay"; > + > + vdda-pll-supply = <&vreg_l5b_0p88>; > + vdda18-supply = <&vreg_l1c_1p8>; > + vdda33-supply = <&vreg_l2b_3p07>; > +}; > + > +&usb_2_qmpphy { > + status = "okay"; > + > + vdda-phy-supply = <&vreg_l6b_1p2>; > + vdda-pll-supply = <&vreg_l5b_0p88>; > +}; > -- > 2.31.1 > ^ permalink raw reply [flat|nested] 6+ messages in thread
* [RESEND PATCH 2/2] arm64: dts: sm8350: fix tlmm base address 2021-11-16 23:50 [RESEND PATCH 0/2] arm64: dts: sm8350: add support for Microsoft Surface Duo 2 Katherine Perez 2021-11-16 23:50 ` [RESEND PATCH 1/2] arm64: dts: add minimal DTS for Microsoft Surface Duo2 Katherine Perez @ 2021-11-16 23:50 ` Katherine Perez 2021-11-19 3:46 ` Bjorn Andersson 1 sibling, 1 reply; 6+ messages in thread From: Katherine Perez @ 2021-11-16 23:50 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson, Rob Herring Cc: linux-arm-msm, devicetree, linux-kernel, Felipe Balbi TLMM controller base address is incorrect and will hang on some platforms. Fix by giving the correct address. Signed-off-by: Katherine Perez <kaperez@linux.microsoft.com> --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index d134280e2939..624d294612d8 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -960,9 +960,9 @@ spmi_bus: spmi@c440000 { #interrupt-cells = <4>; }; - tlmm: pinctrl@f100000 { + tlmm: pinctrl@f000000 { compatible = "qcom,sm8350-tlmm"; - reg = <0 0x0f100000 0 0x300000>; + reg = <0 0x0f000000 0 0x300000>; interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; gpio-controller; #gpio-cells = <2>; -- 2.31.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [RESEND PATCH 2/2] arm64: dts: sm8350: fix tlmm base address 2021-11-16 23:50 ` [RESEND PATCH 2/2] arm64: dts: sm8350: fix tlmm base address Katherine Perez @ 2021-11-19 3:46 ` Bjorn Andersson 2021-11-22 19:04 ` Katherine Perez 0 siblings, 1 reply; 6+ messages in thread From: Bjorn Andersson @ 2021-11-19 3:46 UTC (permalink / raw) To: Katherine Perez Cc: Andy Gross, Rob Herring, linux-arm-msm, devicetree, linux-kernel, Felipe Balbi On Tue 16 Nov 17:50 CST 2021, Katherine Perez wrote: > TLMM controller base address is incorrect and will hang on some platforms. > Fix by giving the correct address. > > Signed-off-by: Katherine Perez <kaperez@linux.microsoft.com> > --- > arch/arm64/boot/dts/qcom/sm8350.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi > index d134280e2939..624d294612d8 100644 > --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi > @@ -960,9 +960,9 @@ spmi_bus: spmi@c440000 { > #interrupt-cells = <4>; > }; > > - tlmm: pinctrl@f100000 { > + tlmm: pinctrl@f000000 { > compatible = "qcom,sm8350-tlmm"; > - reg = <0 0x0f100000 0 0x300000>; > + reg = <0 0x0f000000 0 0x300000>; There's a group of register blocks related to TLMM starting at 0x0f000000 and then there's the register block that is relevant to the OS that starts at 0x0f100000. Downstream uses the group, while upstream describes only the hardware block that's relevant to the OS. Unfortunately it seems that the shift was missed for the UFS and SDC pins as the driver was upstreamed. So I recently submitted this patch, which I expect would help you: https://lore.kernel.org/all/20211104170835.1993686-1-bjorn.andersson@linaro.org/ Please let me know if that's not sufficient, or if I'm missed something in my analysis. Regards, Bjorn > interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; > gpio-controller; > #gpio-cells = <2>; > -- > 2.31.1 > ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [RESEND PATCH 2/2] arm64: dts: sm8350: fix tlmm base address 2021-11-19 3:46 ` Bjorn Andersson @ 2021-11-22 19:04 ` Katherine Perez 0 siblings, 0 replies; 6+ messages in thread From: Katherine Perez @ 2021-11-22 19:04 UTC (permalink / raw) To: Bjorn Andersson Cc: Andy Gross, Rob Herring, linux-arm-msm, devicetree, linux-kernel, Felipe Balbi On Thu, Nov 18, 2021 at 09:46:06PM -0600, Bjorn Andersson wrote: > On Tue 16 Nov 17:50 CST 2021, Katherine Perez wrote: > > > TLMM controller base address is incorrect and will hang on some platforms. > > Fix by giving the correct address. > > > > Signed-off-by: Katherine Perez <kaperez@linux.microsoft.com> > > --- > > arch/arm64/boot/dts/qcom/sm8350.dtsi | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi > > index d134280e2939..624d294612d8 100644 > > --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi > > @@ -960,9 +960,9 @@ spmi_bus: spmi@c440000 { > > #interrupt-cells = <4>; > > }; > > > > - tlmm: pinctrl@f100000 { > > + tlmm: pinctrl@f000000 { > > compatible = "qcom,sm8350-tlmm"; > > - reg = <0 0x0f100000 0 0x300000>; > > + reg = <0 0x0f000000 0 0x300000>; > > There's a group of register blocks related to TLMM starting at > 0x0f000000 and then there's the register block that is relevant to the > OS that starts at 0x0f100000. > > Downstream uses the group, while upstream describes only the hardware > block that's relevant to the OS. Unfortunately it seems that the shift > was missed for the UFS and SDC pins as the driver was upstreamed. > > So I recently submitted this patch, which I expect would help you: > https://lore.kernel.org/all/20211104170835.1993686-1-bjorn.andersson@linaro.org/ > > Please let me know if that's not sufficient, or if I'm missed something > in my analysis. > > Regards, > Bjorn > > > interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; > > gpio-controller; > > #gpio-cells = <2>; > > -- > > 2.31.1 > > Hi Bjorn, I tested without the change to the TLMM address and made sure your patch was included, but my platform is unable to boot without my patch to the TLMM address. Best, Katherine ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2021-11-22 19:04 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-11-16 23:50 [RESEND PATCH 0/2] arm64: dts: sm8350: add support for Microsoft Surface Duo 2 Katherine Perez 2021-11-16 23:50 ` [RESEND PATCH 1/2] arm64: dts: add minimal DTS for Microsoft Surface Duo2 Katherine Perez 2021-11-19 3:51 ` Bjorn Andersson 2021-11-16 23:50 ` [RESEND PATCH 2/2] arm64: dts: sm8350: fix tlmm base address Katherine Perez 2021-11-19 3:46 ` Bjorn Andersson 2021-11-22 19:04 ` Katherine Perez
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