* [PATCH] dt-bindings: ti-serdes-mux: Add defines for J721S2 SoC
@ 2021-11-19 13:34 Aswath Govindraju
2021-11-30 0:13 ` Rob Herring
0 siblings, 1 reply; 2+ messages in thread
From: Aswath Govindraju @ 2021-11-19 13:34 UTC (permalink / raw)
Cc: Nishanth Menon, Vignesh Raghavendra, Kishon Vijay Abraham I,
Aswath Govindraju, Peter Rosin, Rob Herring, devicetree,
linux-kernel
There are 4 lanes in the single instance of J721S2 SERDES. Each SERDES
lane mux can select upto 4 different IPs. Define all the possible
functions.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
---
include/dt-bindings/mux/ti-serdes.h | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h
index d417b9268b16..d3116c52ab72 100644
--- a/include/dt-bindings/mux/ti-serdes.h
+++ b/include/dt-bindings/mux/ti-serdes.h
@@ -95,4 +95,26 @@
#define AM64_SERDES0_LANE0_PCIE0 0x0
#define AM64_SERDES0_LANE0_USB 0x1
+/* J721S2 */
+
+#define J721S2_SERDES0_LANE0_EDP_LANE0 0x0
+#define J721S2_SERDES0_LANE0_PCIE1_LANE0 0x1
+#define J721S2_SERDES0_LANE0_IP3_UNUSED 0x2
+#define J721S2_SERDES0_LANE0_IP4_UNUSED 0x3
+
+#define J721S2_SERDES0_LANE1_EDP_LANE1 0x0
+#define J721S2_SERDES0_LANE1_PCIE1_LANE1 0x1
+#define J721S2_SERDES0_LANE1_USB 0x2
+#define J721S2_SERDES0_LANE1_IP4_UNUSED 0x3
+
+#define J721S2_SERDES0_LANE2_EDP_LANE2 0x0
+#define J721S2_SERDES0_LANE2_PCIE1_LANE2 0x1
+#define J721S2_SERDES0_LANE2_IP3_UNUSED 0x2
+#define J721S2_SERDES0_LANE2_IP4_UNUSED 0x3
+
+#define J721S2_SERDES0_LANE3_EDP_LANE3 0x0
+#define J721S2_SERDES0_LANE3_PCIE1_LANE3 0x1
+#define J721S2_SERDES0_LANE3_USB 0x2
+#define J721S2_SERDES0_LANE3_IP4_UNUSED 0x3
+
#endif /* _DT_BINDINGS_MUX_TI_SERDES */
--
2.17.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] dt-bindings: ti-serdes-mux: Add defines for J721S2 SoC
2021-11-19 13:34 [PATCH] dt-bindings: ti-serdes-mux: Add defines for J721S2 SoC Aswath Govindraju
@ 2021-11-30 0:13 ` Rob Herring
0 siblings, 0 replies; 2+ messages in thread
From: Rob Herring @ 2021-11-30 0:13 UTC (permalink / raw)
To: Aswath Govindraju
Cc: Vignesh Raghavendra, devicetree, linux-kernel,
Kishon Vijay Abraham I, Peter Rosin, Nishanth Menon, Rob Herring
On Fri, 19 Nov 2021 19:04:37 +0530, Aswath Govindraju wrote:
> There are 4 lanes in the single instance of J721S2 SERDES. Each SERDES
> lane mux can select upto 4 different IPs. Define all the possible
> functions.
>
> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
> ---
> include/dt-bindings/mux/ti-serdes.h | 22 ++++++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
Acked-by: Rob Herring <robh@kernel.org>
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