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From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: Bjorn Helgaas <helgaas@kernel.org>, Marc Zygnier <maz@kernel.org>,
	Alex Williamson <alex.williamson@redhat.com>,
	Kevin Tian <kevin.tian@intel.com>,
	Jason Gunthorpe <jgg@nvidia.com>, Megha Dey <megha.dey@intel.com>,
	Ashok Raj <ashok.raj@intel.com>,
	linux-pci@vger.kernel.org,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Santosh Shilimkar <ssantosh@kernel.org>,
	iommu@lists.linux-foundation.org, dmaengine@vger.kernel.org,
	Stuart Yoder <stuyoder@gmail.com>,
	Laurentiu Tudor <laurentiu.tudor@nxp.com>,
	Nishanth Menon <nm@ti.com>, Tero Kristo <kristo@kernel.org>,
	linux-arm-kernel@lists.infradead.org, x86@kernel.org,
	Vinod Koul <vkoul@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Will Deacon <will@kernel.org>, Sinan Kaya <okaya@kernel.org>
Subject: [patch 18/37] PCI/MSI: Use msi_desc::msi_index
Date: Sat, 27 Nov 2021 02:21:46 +0100 (CET)	[thread overview]
Message-ID: <20211126230525.016223236@linutronix.de> (raw)
Message-ID: <20211127012146.5zYeyDke1yGBclnBfCuRknWNdu26PS2Lh6smR0dpvAw@z> (raw)
In-Reply-To: 20211126224100.303046749@linutronix.de

The usage of msi_desc::pci::entry_nr is confusing at best. It's the index
into the MSI[X] descriptor table.

Use msi_desc::msi_index which is shared between all MSI incarnations
instead of having a PCI specific storage for no value.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/powerpc/platforms/pseries/msi.c |    4 ++--
 arch/x86/pci/xen.c                   |    2 +-
 drivers/pci/msi/irqdomain.c          |    2 +-
 drivers/pci/msi/msi.c                |   20 ++++++++------------
 drivers/pci/xen-pcifront.c           |    2 +-
 include/linux/msi.h                  |    2 --
 6 files changed, 13 insertions(+), 19 deletions(-)

--- a/arch/powerpc/platforms/pseries/msi.c
+++ b/arch/powerpc/platforms/pseries/msi.c
@@ -332,7 +332,7 @@ static int check_msix_entries(struct pci
 
 	expected = 0;
 	for_each_pci_msi_entry(entry, pdev) {
-		if (entry->pci.msi_attrib.entry_nr != expected) {
+		if (entry->msi_index != expected) {
 			pr_debug("rtas_msi: bad MSI-X entries.\n");
 			return -EINVAL;
 		}
@@ -580,7 +580,7 @@ static int pseries_irq_domain_alloc(stru
 	int hwirq;
 	int i, ret;
 
-	hwirq = rtas_query_irq_number(pci_get_pdn(pdev), desc->pci.msi_attrib.entry_nr);
+	hwirq = rtas_query_irq_number(pci_get_pdn(pdev), desc->msi_index);
 	if (hwirq < 0) {
 		dev_err(&pdev->dev, "Failed to query HW IRQ: %d\n", hwirq);
 		return hwirq;
--- a/arch/x86/pci/xen.c
+++ b/arch/x86/pci/xen.c
@@ -306,7 +306,7 @@ static int xen_initdom_setup_msi_irqs(st
 				return -EINVAL;
 
 			map_irq.table_base = pci_resource_start(dev, bir);
-			map_irq.entry_nr = msidesc->pci.msi_attrib.entry_nr;
+			map_irq.entry_nr = msidesc->msi_index;
 		}
 
 		ret = -EINVAL;
--- a/drivers/pci/msi/irqdomain.c
+++ b/drivers/pci/msi/irqdomain.c
@@ -57,7 +57,7 @@ static irq_hw_number_t pci_msi_domain_ca
 {
 	struct pci_dev *dev = msi_desc_to_pci_dev(desc);
 
-	return (irq_hw_number_t)desc->pci.msi_attrib.entry_nr |
+	return (irq_hw_number_t)desc->msi_index |
 		pci_dev_id(dev) << 11 |
 		(pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27;
 }
--- a/drivers/pci/msi/msi.c
+++ b/drivers/pci/msi/msi.c
@@ -44,7 +44,7 @@ static inline void pci_msi_unmask(struct
 
 static inline void __iomem *pci_msix_desc_addr(struct msi_desc *desc)
 {
-	return desc->pci.mask_base + desc->pci.msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
+	return desc->pci.mask_base + desc->msi_index * PCI_MSIX_ENTRY_SIZE;
 }
 
 /*
@@ -354,13 +354,10 @@ msi_setup_entry(struct pci_dev *dev, int
 	if (dev->dev_flags & PCI_DEV_FLAGS_HAS_MSI_MASKING)
 		control |= PCI_MSI_FLAGS_MASKBIT;
 
-	entry->pci.msi_attrib.is_msix	= 0;
-	entry->pci.msi_attrib.is_64		= !!(control & PCI_MSI_FLAGS_64BIT);
-	entry->pci.msi_attrib.is_virtual    = 0;
-	entry->pci.msi_attrib.entry_nr	= 0;
+	entry->pci.msi_attrib.is_64	= !!(control & PCI_MSI_FLAGS_64BIT);
 	entry->pci.msi_attrib.can_mask	= !pci_msi_ignore_mask &&
 					  !!(control & PCI_MSI_FLAGS_MASKBIT);
-	entry->pci.msi_attrib.default_irq	= dev->irq;	/* Save IOAPIC IRQ */
+	entry->pci.msi_attrib.default_irq = dev->irq;
 	entry->pci.msi_attrib.multi_cap	= (control & PCI_MSI_FLAGS_QMASK) >> 1;
 	entry->pci.msi_attrib.multiple	= ilog2(__roundup_pow_of_two(nvec));
 
@@ -494,12 +491,11 @@ static int msix_setup_entries(struct pci
 		entry->pci.msi_attrib.is_64	= 1;
 
 		if (entries)
-			entry->pci.msi_attrib.entry_nr = entries[i].entry;
+			entry->msi_index = entries[i].entry;
 		else
-			entry->pci.msi_attrib.entry_nr = i;
+			entry->msi_index = i;
 
-		entry->pci.msi_attrib.is_virtual =
-			entry->pci.msi_attrib.entry_nr >= vec_count;
+		entry->pci.msi_attrib.is_virtual = entry->msi_index >= vec_count;
 
 		entry->pci.msi_attrib.can_mask	= !pci_msi_ignore_mask &&
 						  !entry->pci.msi_attrib.is_virtual;
@@ -1025,7 +1021,7 @@ int pci_irq_vector(struct pci_dev *dev,
 		struct msi_desc *entry;
 
 		for_each_pci_msi_entry(entry, dev) {
-			if (entry->pci.msi_attrib.entry_nr == nr)
+			if (entry->msi_index == nr)
 				return entry->irq;
 		}
 		WARN_ON_ONCE(1);
@@ -1057,7 +1053,7 @@ const struct cpumask *pci_irq_get_affini
 		struct msi_desc *entry;
 
 		for_each_pci_msi_entry(entry, dev) {
-			if (entry->pci.msi_attrib.entry_nr == nr)
+			if (entry->msi_index == nr)
 				return &entry->affinity->mask;
 		}
 		WARN_ON_ONCE(1);
--- a/drivers/pci/xen-pcifront.c
+++ b/drivers/pci/xen-pcifront.c
@@ -263,7 +263,7 @@ static int pci_frontend_enable_msix(stru
 
 	i = 0;
 	for_each_pci_msi_entry(entry, dev) {
-		op.msix_entries[i].entry = entry->pci.msi_attrib.entry_nr;
+		op.msix_entries[i].entry = entry->msi_index;
 		/* Vector is useless at this point. */
 		op.msix_entries[i].vector = -1;
 		i++;
--- a/include/linux/msi.h
+++ b/include/linux/msi.h
@@ -79,7 +79,6 @@ typedef void (*irq_write_msi_msg_t)(stru
  * @multi_cap:	[PCI MSI/X] log2 num of messages supported
  * @can_mask:	[PCI MSI/X] Masking supported?
  * @is_64:	[PCI MSI/X] Address size: 0=32bit 1=64bit
- * @entry_nr:	[PCI MSI/X] Entry which is described by this descriptor
  * @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq
  * @mask_pos:	[PCI MSI]   Mask register position
  * @mask_base:	[PCI MSI-X] Mask register base address
@@ -96,7 +95,6 @@ struct pci_msi_desc {
 		u8	can_mask	: 1;
 		u8	is_64		: 1;
 		u8	is_virtual	: 1;
-		u16	entry_nr;
 		unsigned default_irq;
 	} msi_attrib;
 	union {


  parent reply	other threads:[~2021-11-27  1:27 UTC|newest]

Thread overview: 97+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-27  1:20 [patch 00/37] genirq/msi, PCI/MSI: Spring cleaning - Part 2 Thomas Gleixner
2021-11-27  1:20 ` [patch 01/37] device: Move MSI related data into a struct Thomas Gleixner
2021-11-27  1:21   ` Thomas Gleixner
2021-11-27 12:11   ` Greg Kroah-Hartman
2021-11-27  1:20 ` [patch 02/37] device: Add device::msi_data pointer and struct msi_device_data Thomas Gleixner
2021-11-27  1:21   ` Thomas Gleixner
2021-11-27 12:12   ` Greg Kroah-Hartman
2021-11-28  0:14   ` Jason Gunthorpe
2021-11-28 19:09     ` Thomas Gleixner
2021-11-27  1:20 ` [patch 03/37] PCI/MSI: Allocate MSI device data on first use Thomas Gleixner
2021-11-27  1:21   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 05/37] platform-msi: " Thomas Gleixner
2021-11-27  1:21   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 06/37] bus: fsl-mc-msi: " Thomas Gleixner
2021-11-27  1:21   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 07/37] soc: ti: ti_sci_inta_msi: " Thomas Gleixner
2021-11-27  1:21   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 08/37] genirq/msi: Provide msi_device_populate/destroy_sysfs() Thomas Gleixner
2021-11-27  1:21   ` Thomas Gleixner
2021-11-30 11:53   ` Jonathan Cameron
2021-11-27  1:20 ` [patch 09/37] PCI/MSI: Let the irq code handle sysfs groups Thomas Gleixner
2021-11-27  1:21   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 10/37] platform-msi: Let the core " Thomas Gleixner
2021-11-27  1:21   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 11/37] genirq/msi: Remove the original sysfs interfaces Thomas Gleixner
2021-11-27  1:21   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 12/37] platform-msi: Rename functions and clarify comments Thomas Gleixner
2021-11-27  1:21   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 13/37] platform-msi: Store platform private data pointer in msi_device_data Thomas Gleixner
2021-11-27  1:21   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 14/37] genirq/msi: Consolidate MSI descriptor data Thomas Gleixner
2021-11-27  1:21   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 15/37] platform-msi: Use msi_desc::msi_index Thomas Gleixner
2021-11-27  1:21   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 16/37] bus: fsl-mc-msi: " Thomas Gleixner
2021-11-27  1:21   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 17/37] soc: ti: ti_sci_inta_msi: " Thomas Gleixner
2021-11-27  1:21   ` Thomas Gleixner
2021-11-27  1:20 ` Thomas Gleixner [this message]
2021-11-27  1:21   ` [patch 18/37] PCI/MSI: " Thomas Gleixner
2021-11-27  1:20 ` [patch 19/37] genirq/msi: Add msi_device_data::properties Thomas Gleixner
2021-11-27  1:21   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 20/37] PCI/MSI: Store properties in device::msi::data Thomas Gleixner
2021-11-27  1:21   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 21/37] x86/pci/XEN: Use device MSI properties Thomas Gleixner
2021-11-27  1:21   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 22/37] x86/apic/msi: " Thomas Gleixner
2021-11-27  1:21   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 23/37] genirq/msi: " Thomas Gleixner
2021-11-27  1:21   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 24/37] powerpc/cell/axon_msi: Use MSI device properties Thomas Gleixner
2021-11-27  1:21   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 25/37] powerpc/pseries/msi: " Thomas Gleixner
2021-11-27  1:21   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 26/37] PCI/MSI: Provide MSI_FLAG_MSIX_CONTIGUOUS Thomas Gleixner
2021-11-27  1:21   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 27/37] powerpc/pseries/msi: Let core code check for contiguous entries Thomas Gleixner
2021-11-27  1:22   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 28/37] genirq/msi: Provide interface to retrieve Linux interrupt number Thomas Gleixner
2021-11-27  1:22   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 29/37] PCI/MSI: Use __msi_get_virq() in pci_get_vector() Thomas Gleixner
2021-11-27  1:22   ` Thomas Gleixner
2021-11-28 19:37   ` Marc Zyngier
2021-11-28 21:00     ` Thomas Gleixner
2021-11-27  1:20 ` [patch 30/37] PCI/MSI: Simplify pci_irq_get_affinity() Thomas Gleixner
2021-11-27  1:22   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 31/37] dmaengine: mv_xor_v2: Get rid of msi_desc abuse Thomas Gleixner
2021-11-27  1:22   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 32/37] perf/smmuv3: Use msi_get_virq() Thomas Gleixner
2021-11-27  1:22   ` Thomas Gleixner
2021-11-27  1:20 ` [patch 33/37] iommu/arm-smmu-v3: " Thomas Gleixner
2021-11-27  1:22   ` Thomas Gleixner
2021-11-29 10:55   ` Will Deacon
2021-11-29 12:52     ` Thomas Gleixner
2021-11-29 12:58       ` Thomas Gleixner
2021-11-29 13:13     ` Robin Murphy
2021-11-29 14:42       ` Thomas Gleixner
2021-11-29 14:54         ` Robin Murphy
2021-11-30  9:36           ` Will Deacon
2021-11-30 12:30             ` Thomas Gleixner
2021-11-29 13:25   ` Robin Murphy
2021-11-27  1:21 ` [patch 34/37] mailbox: bcm-flexrm-mailbox: Rework MSI interrupt handling Thomas Gleixner
2021-11-27  1:22   ` Thomas Gleixner
2021-11-27  1:21 ` [patch 35/37] bus: fsl-mc: fsl-mc-allocator: Rework MSI handling Thomas Gleixner
2021-11-27  1:22   ` Thomas Gleixner
2021-11-27  1:21 ` [patch 36/37] soc: ti: ti_sci_inta_msi: Get rid of ti_sci_inta_msi_get_virq() Thomas Gleixner
2021-11-27  1:22   ` Thomas Gleixner
2021-11-27  1:21 ` [patch 37/37] dmaengine: qcom_hidma: Cleanup MSI handling Thomas Gleixner
2021-11-27  1:22   ` Thomas Gleixner
2021-11-29 19:56   ` Sinan Kaya
2021-11-27  1:21 ` [patch 00/37] genirq/msi, PCI/MSI: Spring cleaning - Part 2 Thomas Gleixner
2021-11-27  1:21 ` [patch 04/37] PCI/MSI: Use lock from msi_device_data Thomas Gleixner
2021-11-27  1:20   ` Thomas Gleixner
2021-11-27 12:13   ` Greg Kroah-Hartman
2021-11-27 12:17 ` [patch 00/37] genirq/msi, PCI/MSI: Spring cleaning - Part 2 Greg Kroah-Hartman
2021-11-28  0:39 ` Jason Gunthorpe
2021-11-28 20:27   ` Thomas Gleixner

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