* [PATCH v2 1/8] dt-bindings: i2c: exynos5: Convert to dtschema
2021-12-04 21:50 From a5f512cb01e48f5bfcdef800dd477c8b04a4cacf Mon Sep 17 00:00:00 2001 Sam Protsenko
@ 2021-12-04 21:50 ` Sam Protsenko
2021-12-04 21:50 ` [PATCH v2 2/8] dt-bindings: i2c: exynos5: Add exynosautov9-hsi2c compatible Sam Protsenko
` (7 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Sam Protsenko @ 2021-12-04 21:50 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring
Cc: Jaewon Kim, Chanho Park, David Virag, Youngmin Nam, Wolfram Sang,
Arnd Bergmann, linux-i2c, devicetree, linux-arm-kernel,
linux-kernel, linux-samsung-soc
Convert Samsung Exynos High Speed I2C bindings doc to DT schema format.
Changes during bindings conversion:
1. Added missing required clock properties (driver fails when it's
unable to get the clock)
2. Removed properties and descriptions that can be found in
schemas/i2c/i2c-controller.yaml [1]
3. Fixed the example so it can be validated by dtschema
[1] https://github.com/robherring/dt-schema/blob/master/schemas/i2c/i2c-controller.yaml
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
Changes in v2:
- Added R-b tag by Krzysztof Kozlowski
.../devicetree/bindings/i2c/i2c-exynos5.txt | 53 ------------
.../devicetree/bindings/i2c/i2c-exynos5.yaml | 80 +++++++++++++++++++
2 files changed, 80 insertions(+), 53 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt b/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
deleted file mode 100644
index 2dbc0b62daa6..000000000000
--- a/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
+++ /dev/null
@@ -1,53 +0,0 @@
-* Samsung's High Speed I2C controller
-
-The Samsung's High Speed I2C controller is used to interface with I2C devices
-at various speeds ranging from 100khz to 3.4Mhz.
-
-Required properties:
- - compatible: value should be.
- -> "samsung,exynos5-hsi2c", (DEPRECATED)
- for i2c compatible with HSI2C available
- on Exynos5250 and Exynos5420 SoCs.
- -> "samsung,exynos5250-hsi2c", for i2c compatible with HSI2C available
- on Exynos5250 and Exynos5420 SoCs.
- -> "samsung,exynos5260-hsi2c", for i2c compatible with HSI2C available
- on Exynos5260 SoCs.
- -> "samsung,exynos7-hsi2c", for i2c compatible with HSI2C available
- on Exynos7 SoCs.
-
- - reg: physical base address of the controller and length of memory mapped
- region.
- - interrupts: interrupt number to the cpu.
- - #address-cells: always 1 (for i2c addresses)
- - #size-cells: always 0
-
- - Pinctrl:
- - pinctrl-0: Pin control group to be used for this controller.
- - pinctrl-names: Should contain only one value - "default".
-
-Optional properties:
- - clock-frequency: Desired operating frequency in Hz of the bus.
- -> If not specified, the bus operates in fast-speed mode at
- at 100khz.
- -> If specified, the bus operates in high-speed mode only if the
- clock-frequency is >= 1Mhz.
-
-Example:
-
-hsi2c@12ca0000 {
- compatible = "samsung,exynos5250-hsi2c";
- reg = <0x12ca0000 0x100>;
- interrupts = <56>;
- clock-frequency = <100000>;
-
- pinctrl-0 = <&i2c4_bus>;
- pinctrl-names = "default";
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- s2mps11_pmic@66 {
- compatible = "samsung,s2mps11-pmic";
- reg = <0x66>;
- };
-};
diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
new file mode 100644
index 000000000000..16853f6edc53
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
@@ -0,0 +1,80 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/i2c/i2c-exynos5.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung's High Speed I2C controller
+
+maintainers:
+ - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
+
+description: |
+ The Samsung's High Speed I2C controller is used to interface with I2C devices
+ at various speeds ranging from 100kHz to 3.4MHz.
+
+allOf:
+ - $ref: /schemas/i2c/i2c-controller.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - enum:
+ - samsung,exynos5250-hsi2c # Exynos5250 and Exynos5420
+ - samsung,exynos5260-hsi2c # Exynos5260
+ - samsung,exynos7-hsi2c # Exynos7
+ - const: samsung,exynos5-hsi2c # Exynos5250 and Exynos5420
+ deprecated: true
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clock-frequency:
+ default: 100000
+ description:
+ Desired operating frequency in Hz of the bus.
+
+ If not specified, the bus operates in fast-speed mode at 100kHz.
+
+ If specified, the bus operates in high-speed mode only if the
+ clock-frequency is >= 1MHz.
+
+ clocks:
+ maxItems: 1
+ description: I2C operating clock
+
+ clock-names:
+ const: hsi2c
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/exynos5420.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ hsi2c_8: i2c@12e00000 {
+ compatible = "samsung,exynos5250-hsi2c";
+ reg = <0x12e00000 0x1000>;
+ interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <100000>;
+ clocks = <&clock CLK_USI4>;
+ clock-names = "hsi2c";
+
+ pmic@66 {
+ /* compatible = "samsung,s2mps11-pmic"; */
+ reg = <0x66>;
+ };
+ };
--
2.30.2
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 2/8] dt-bindings: i2c: exynos5: Add exynosautov9-hsi2c compatible
2021-12-04 21:50 From a5f512cb01e48f5bfcdef800dd477c8b04a4cacf Mon Sep 17 00:00:00 2001 Sam Protsenko
2021-12-04 21:50 ` [PATCH v2 1/8] dt-bindings: i2c: exynos5: Convert to dtschema Sam Protsenko
@ 2021-12-04 21:50 ` Sam Protsenko
2021-12-04 21:50 ` [PATCH v2 3/8] dt-bindings: i2c: exynos5: Add bus clock Sam Protsenko
` (6 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Sam Protsenko @ 2021-12-04 21:50 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring
Cc: Jaewon Kim, Chanho Park, David Virag, Youngmin Nam, Wolfram Sang,
Arnd Bergmann, linux-i2c, devicetree, linux-arm-kernel,
linux-kernel, linux-samsung-soc
From: Jaewon Kim <jaewon02.kim@samsung.com>
This patch adds new "samsung,exynosautov9-hsi2c" compatible.
It is for i2c compatible with HSI2C available on Exynos SoC with USI.
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
Changes in v2:
- Added R-b tag by Krzysztof Kozlowski
- Removed quotes around compatible strings
- Added Exynos850 to comment
Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
index 16853f6edc53..bb6c22fbc442 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
+++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
@@ -13,6 +13,11 @@ description: |
The Samsung's High Speed I2C controller is used to interface with I2C devices
at various speeds ranging from 100kHz to 3.4MHz.
+ In case the HSI2C controller is encapsulated within USI block (it's the case
+ e.g. for Exynos850 and Exynos Auto V9 SoCs), it might be also necessary to
+ define USI node in device tree file, choosing "i2c" configuration. Please see
+ Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml for details.
+
allOf:
- $ref: /schemas/i2c/i2c-controller.yaml#
@@ -23,6 +28,7 @@ properties:
- samsung,exynos5250-hsi2c # Exynos5250 and Exynos5420
- samsung,exynos5260-hsi2c # Exynos5260
- samsung,exynos7-hsi2c # Exynos7
+ - samsung,exynosautov9-hsi2c # ExynosAutoV9 and Exynos850
- const: samsung,exynos5-hsi2c # Exynos5250 and Exynos5420
deprecated: true
--
2.30.2
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 3/8] dt-bindings: i2c: exynos5: Add bus clock
2021-12-04 21:50 From a5f512cb01e48f5bfcdef800dd477c8b04a4cacf Mon Sep 17 00:00:00 2001 Sam Protsenko
2021-12-04 21:50 ` [PATCH v2 1/8] dt-bindings: i2c: exynos5: Convert to dtschema Sam Protsenko
2021-12-04 21:50 ` [PATCH v2 2/8] dt-bindings: i2c: exynos5: Add exynosautov9-hsi2c compatible Sam Protsenko
@ 2021-12-04 21:50 ` Sam Protsenko
2021-12-04 21:50 ` [PATCH v2 4/8] i2c: exynos5: Add support for ExynosAutoV9 SoC Sam Protsenko
` (5 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Sam Protsenko @ 2021-12-04 21:50 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring
Cc: Jaewon Kim, Chanho Park, David Virag, Youngmin Nam, Wolfram Sang,
Arnd Bergmann, linux-i2c, devicetree, linux-arm-kernel,
linux-kernel, linux-samsung-soc
In new Exynos SoCs (like Exynos850) where HSI2C is implemented as a
part of USIv2 block, there are two clocks provided to HSI2C controller:
- PCLK: bus clock (APB), provides access to register interface
- IPCLK: operating IP-core clock; SCL is derived from this one
Both clocks have to be asserted for HSI2C to be functional in that case.
Modify bindings doc to allow specifying bus clock in addition to
already described operating clock.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
Changes in v2:
- Added 'clock-names' property to 'required:' in case of ExynosAutoV9
- Added example for two clocks case
.../devicetree/bindings/i2c/i2c-exynos5.yaml | 59 +++++++++++++++++--
1 file changed, 53 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
index bb6c22fbc442..19874e8b73b9 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
+++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
@@ -18,9 +18,6 @@ description: |
define USI node in device tree file, choosing "i2c" configuration. Please see
Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml for details.
-allOf:
- - $ref: /schemas/i2c/i2c-controller.yaml#
-
properties:
compatible:
oneOf:
@@ -49,11 +46,16 @@ properties:
clock-frequency is >= 1MHz.
clocks:
- maxItems: 1
- description: I2C operating clock
+ minItems: 1
+ items:
+ - description: I2C operating clock
+ - description: Bus clock (APB)
clock-names:
- const: hsi2c
+ minItems: 1
+ items:
+ - const: hsi2c
+ - const: hsi2c_pclk
required:
- compatible
@@ -61,6 +63,31 @@ required:
- interrupts
- clocks
+allOf:
+ - $ref: /schemas/i2c/i2c-controller.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - samsung,exynosautov9-hsi2c
+
+ then:
+ properties:
+ clocks:
+ minItems: 2
+
+ clock-names:
+ minItems: 2
+
+ required:
+ - clock-names
+
+ else:
+ properties:
+ clocks:
+ maxItems: 1
+
unevaluatedProperties: false
examples:
@@ -84,3 +111,23 @@ examples:
reg = <0x66>;
};
};
+
+ - |
+ #include <dt-bindings/clock/exynos850.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ hsi2c_2: i2c@138c0000 {
+ compatible = "samsung,exynosautov9-hsi2c";
+ reg = <0x138c0000 0xc0>;
+ interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peri CLK_GOUT_HSI2C2_IPCLK>,
+ <&cmu_peri CLK_GOUT_HSI2C2_PCLK>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+
+ pmic@66 {
+ /* compatible = "samsung,s2mps11-pmic"; */
+ reg = <0x66>;
+ };
+ };
--
2.30.2
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 4/8] i2c: exynos5: Add support for ExynosAutoV9 SoC
2021-12-04 21:50 From a5f512cb01e48f5bfcdef800dd477c8b04a4cacf Mon Sep 17 00:00:00 2001 Sam Protsenko
` (2 preceding siblings ...)
2021-12-04 21:50 ` [PATCH v2 3/8] dt-bindings: i2c: exynos5: Add bus clock Sam Protsenko
@ 2021-12-04 21:50 ` Sam Protsenko
2021-12-04 21:50 ` [PATCH v2 5/8] i2c: exynos5: Add bus clock support Sam Protsenko
` (4 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Sam Protsenko @ 2021-12-04 21:50 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring
Cc: Jaewon Kim, Chanho Park, David Virag, Youngmin Nam, Wolfram Sang,
Arnd Bergmann, linux-i2c, devicetree, linux-arm-kernel,
linux-kernel, linux-samsung-soc
From: Jaewon Kim <jaewon02.kim@samsung.com>
ExynosAutoV9 functioning logic mostly follows I2C_TYPE_EXYNOS7, but
timing calculation and configuration procedure is changed: e.g. only
timing_s3 has to be set now.
Another change of HSI2C controller in ExynosAutoV9 SoC is that it's now
a part of USIv2 IP-core. No changes is needed for I2C driver though, as
all USI related configuration is done in USI driver.
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
Changes in v2:
- Added R-b tag by Krzysztof Kozlowski
drivers/i2c/busses/i2c-exynos5.c | 62 +++++++++++++++++++++++++++-----
1 file changed, 53 insertions(+), 9 deletions(-)
diff --git a/drivers/i2c/busses/i2c-exynos5.c b/drivers/i2c/busses/i2c-exynos5.c
index c2e4bab11366..5198e71e8dab 100644
--- a/drivers/i2c/busses/i2c-exynos5.c
+++ b/drivers/i2c/busses/i2c-exynos5.c
@@ -169,6 +169,7 @@
enum i2c_type_exynos {
I2C_TYPE_EXYNOS5,
I2C_TYPE_EXYNOS7,
+ I2C_TYPE_EXYNOSAUTOV9,
};
struct exynos5_i2c {
@@ -230,6 +231,11 @@ static const struct exynos_hsi2c_variant exynos7_hsi2c_data = {
.hw = I2C_TYPE_EXYNOS7,
};
+static const struct exynos_hsi2c_variant exynosautov9_hsi2c_data = {
+ .fifo_depth = 64,
+ .hw = I2C_TYPE_EXYNOSAUTOV9,
+};
+
static const struct of_device_id exynos5_i2c_match[] = {
{
.compatible = "samsung,exynos5-hsi2c",
@@ -243,6 +249,9 @@ static const struct of_device_id exynos5_i2c_match[] = {
}, {
.compatible = "samsung,exynos7-hsi2c",
.data = &exynos7_hsi2c_data
+ }, {
+ .compatible = "samsung,exynosautov9-hsi2c",
+ .data = &exynosautov9_hsi2c_data
}, {},
};
MODULE_DEVICE_TABLE(of, exynos5_i2c_match);
@@ -281,6 +290,31 @@ static int exynos5_i2c_set_timing(struct exynos5_i2c *i2c, bool hs_timings)
i2c->op_clock;
int div, clk_cycle, temp;
+ /*
+ * In case of HSI2C controllers in ExynosAutoV9:
+ *
+ * FSCL = IPCLK / ((CLK_DIV + 1) * 16)
+ * T_SCL_LOW = IPCLK * (CLK_DIV + 1) * (N + M)
+ * [N : number of 0's in the TSCL_H_HS]
+ * [M : number of 0's in the TSCL_L_HS]
+ * T_SCL_HIGH = IPCLK * (CLK_DIV + 1) * (N + M)
+ * [N : number of 1's in the TSCL_H_HS]
+ * [M : number of 1's in the TSCL_L_HS]
+ *
+ * Result of (N + M) is always 8.
+ * In general case, we don't need to control timing_s1 and timing_s2.
+ */
+ if (i2c->variant->hw == I2C_TYPE_EXYNOSAUTOV9) {
+ div = ((clkin / (16 * i2c->op_clock)) - 1);
+ i2c_timing_s3 = div << 16;
+ if (hs_timings)
+ writel(i2c_timing_s3, i2c->regs + HSI2C_TIMING_HS3);
+ else
+ writel(i2c_timing_s3, i2c->regs + HSI2C_TIMING_FS3);
+
+ return 0;
+ }
+
/*
* In case of HSI2C controller in Exynos5 series
* FPCLK / FI2C =
@@ -422,7 +456,10 @@ static irqreturn_t exynos5_i2c_irq(int irqno, void *dev_id)
writel(int_status, i2c->regs + HSI2C_INT_STATUS);
/* handle interrupt related to the transfer status */
- if (i2c->variant->hw == I2C_TYPE_EXYNOS7) {
+ switch (i2c->variant->hw) {
+ case I2C_TYPE_EXYNOSAUTOV9:
+ fallthrough;
+ case I2C_TYPE_EXYNOS7:
if (int_status & HSI2C_INT_TRANS_DONE) {
i2c->trans_done = 1;
i2c->state = 0;
@@ -443,7 +480,12 @@ static irqreturn_t exynos5_i2c_irq(int irqno, void *dev_id)
i2c->state = -ETIMEDOUT;
goto stop;
}
- } else if (int_status & HSI2C_INT_I2C) {
+
+ break;
+ case I2C_TYPE_EXYNOS5:
+ if (!(int_status & HSI2C_INT_I2C))
+ break;
+
trans_status = readl(i2c->regs + HSI2C_TRANS_STATUS);
if (trans_status & HSI2C_NO_DEV_ACK) {
dev_dbg(i2c->dev, "No ACK from device\n");
@@ -465,6 +507,8 @@ static irqreturn_t exynos5_i2c_irq(int irqno, void *dev_id)
i2c->trans_done = 1;
i2c->state = 0;
}
+
+ break;
}
if ((i2c->msg->flags & I2C_M_RD) && (int_status &
@@ -569,13 +613,13 @@ static void exynos5_i2c_bus_check(struct exynos5_i2c *i2c)
{
unsigned long timeout;
- if (i2c->variant->hw != I2C_TYPE_EXYNOS7)
+ if (i2c->variant->hw == I2C_TYPE_EXYNOS5)
return;
/*
- * HSI2C_MASTER_ST_LOSE state in EXYNOS7 variant before transaction
- * indicates that bus is stuck (SDA is low). In such case bus recovery
- * can be performed.
+ * HSI2C_MASTER_ST_LOSE state (in Exynos7 and ExynosAutoV9 variants)
+ * before transaction indicates that bus is stuck (SDA is low).
+ * In such case bus recovery can be performed.
*/
timeout = jiffies + msecs_to_jiffies(100);
for (;;) {
@@ -611,10 +655,10 @@ static void exynos5_i2c_message_start(struct exynos5_i2c *i2c, int stop)
unsigned long flags;
unsigned short trig_lvl;
- if (i2c->variant->hw == I2C_TYPE_EXYNOS7)
- int_en |= HSI2C_INT_I2C_TRANS;
- else
+ if (i2c->variant->hw == I2C_TYPE_EXYNOS5)
int_en |= HSI2C_INT_I2C;
+ else
+ int_en |= HSI2C_INT_I2C_TRANS;
i2c_ctl = readl(i2c->regs + HSI2C_CTL);
i2c_ctl &= ~(HSI2C_TXCHON | HSI2C_RXCHON);
--
2.30.2
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 5/8] i2c: exynos5: Add bus clock support
2021-12-04 21:50 From a5f512cb01e48f5bfcdef800dd477c8b04a4cacf Mon Sep 17 00:00:00 2001 Sam Protsenko
` (3 preceding siblings ...)
2021-12-04 21:50 ` [PATCH v2 4/8] i2c: exynos5: Add support for ExynosAutoV9 SoC Sam Protsenko
@ 2021-12-04 21:50 ` Sam Protsenko
2021-12-04 21:50 ` [PATCH v2 6/8] i2c: exynos5: Mention Exynos850 and ExynosAutoV9 in Kconfig Sam Protsenko
` (3 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Sam Protsenko @ 2021-12-04 21:50 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring
Cc: Jaewon Kim, Chanho Park, David Virag, Youngmin Nam, Wolfram Sang,
Arnd Bergmann, linux-i2c, devicetree, linux-arm-kernel,
linux-kernel, linux-samsung-soc
In new Exynos SoCs (like Exynos850) where HSI2C is implemented as a
part of USIv2 block, there are two clocks provided to HSI2C controller:
- PCLK: bus clock (APB), provides access to register interface
- IPCLK: operating IP-core clock; SCL is derived from this one
Both clocks have to be asserted for HSI2C to be functional in that case.
Add code to obtain and enable/disable PCLK in addition to already
handled operating clock. Make it optional though, as older Exynos SoC
variants only have one HSI2C clock.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
---
Changes in v2:
- Added R-b tag by Krzysztof Kozlowski
- Added R-b tag by Chanho Park
drivers/i2c/busses/i2c-exynos5.c | 46 ++++++++++++++++++++++++++------
1 file changed, 38 insertions(+), 8 deletions(-)
diff --git a/drivers/i2c/busses/i2c-exynos5.c b/drivers/i2c/busses/i2c-exynos5.c
index 5198e71e8dab..9cde5ecb9449 100644
--- a/drivers/i2c/busses/i2c-exynos5.c
+++ b/drivers/i2c/busses/i2c-exynos5.c
@@ -182,7 +182,8 @@ struct exynos5_i2c {
unsigned int irq;
void __iomem *regs;
- struct clk *clk;
+ struct clk *clk; /* operating clock */
+ struct clk *pclk; /* bus clock */
struct device *dev;
int state;
@@ -757,10 +758,14 @@ static int exynos5_i2c_xfer(struct i2c_adapter *adap,
struct exynos5_i2c *i2c = adap->algo_data;
int i, ret;
- ret = clk_enable(i2c->clk);
+ ret = clk_enable(i2c->pclk);
if (ret)
return ret;
+ ret = clk_enable(i2c->clk);
+ if (ret)
+ goto err_pclk;
+
for (i = 0; i < num; ++i) {
ret = exynos5_i2c_xfer_msg(i2c, msgs + i, i + 1 == num);
if (ret)
@@ -768,6 +773,8 @@ static int exynos5_i2c_xfer(struct i2c_adapter *adap,
}
clk_disable(i2c->clk);
+err_pclk:
+ clk_disable(i2c->pclk);
return ret ?: num;
}
@@ -807,10 +814,18 @@ static int exynos5_i2c_probe(struct platform_device *pdev)
return -ENOENT;
}
- ret = clk_prepare_enable(i2c->clk);
+ i2c->pclk = devm_clk_get(&pdev->dev, "hsi2c_pclk");
+ if (IS_ERR(i2c->pclk))
+ i2c->pclk = NULL; /* pclk is optional */
+
+ ret = clk_prepare_enable(i2c->pclk);
if (ret)
return ret;
+ ret = clk_prepare_enable(i2c->clk);
+ if (ret)
+ goto err_pclk;
+
i2c->regs = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(i2c->regs)) {
ret = PTR_ERR(i2c->regs);
@@ -853,6 +868,7 @@ static int exynos5_i2c_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, i2c);
clk_disable(i2c->clk);
+ clk_disable(i2c->pclk);
dev_info(&pdev->dev, "%s: HSI2C adapter\n", dev_name(&i2c->adap.dev));
@@ -860,6 +876,9 @@ static int exynos5_i2c_probe(struct platform_device *pdev)
err_clk:
clk_disable_unprepare(i2c->clk);
+
+ err_pclk:
+ clk_disable_unprepare(i2c->pclk);
return ret;
}
@@ -870,6 +889,7 @@ static int exynos5_i2c_remove(struct platform_device *pdev)
i2c_del_adapter(&i2c->adap);
clk_unprepare(i2c->clk);
+ clk_unprepare(i2c->pclk);
return 0;
}
@@ -881,6 +901,7 @@ static int exynos5_i2c_suspend_noirq(struct device *dev)
i2c_mark_adapter_suspended(&i2c->adap);
clk_unprepare(i2c->clk);
+ clk_unprepare(i2c->pclk);
return 0;
}
@@ -890,21 +911,30 @@ static int exynos5_i2c_resume_noirq(struct device *dev)
struct exynos5_i2c *i2c = dev_get_drvdata(dev);
int ret = 0;
- ret = clk_prepare_enable(i2c->clk);
+ ret = clk_prepare_enable(i2c->pclk);
if (ret)
return ret;
+ ret = clk_prepare_enable(i2c->clk);
+ if (ret)
+ goto err_pclk;
+
ret = exynos5_hsi2c_clock_setup(i2c);
- if (ret) {
- clk_disable_unprepare(i2c->clk);
- return ret;
- }
+ if (ret)
+ goto err_clk;
exynos5_i2c_init(i2c);
clk_disable(i2c->clk);
+ clk_disable(i2c->pclk);
i2c_mark_adapter_resumed(&i2c->adap);
return 0;
+
+err_clk:
+ clk_disable_unprepare(i2c->clk);
+err_pclk:
+ clk_disable_unprepare(i2c->pclk);
+ return ret;
}
#endif
--
2.30.2
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 6/8] i2c: exynos5: Mention Exynos850 and ExynosAutoV9 in Kconfig
2021-12-04 21:50 From a5f512cb01e48f5bfcdef800dd477c8b04a4cacf Mon Sep 17 00:00:00 2001 Sam Protsenko
` (4 preceding siblings ...)
2021-12-04 21:50 ` [PATCH v2 5/8] i2c: exynos5: Add bus clock support Sam Protsenko
@ 2021-12-04 21:50 ` Sam Protsenko
2021-12-04 21:50 ` [PATCH v2 7/8] arm: dts: exynos: Rename hsi2c nodes to i2c for Exynos5260 Sam Protsenko
` (2 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Sam Protsenko @ 2021-12-04 21:50 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring
Cc: Jaewon Kim, Chanho Park, David Virag, Youngmin Nam, Wolfram Sang,
Arnd Bergmann, linux-i2c, devicetree, linux-arm-kernel,
linux-kernel, linux-samsung-soc
I2C controller chosen by I2C_EXYNOS5 config option is also suitable for
Exynos850 and ExynosAutoV9 SoCs. State that specifically in I2C_EXYNOS5
symbol help section.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
---
Changes in v2:
- Added R-b tag by Krzysztof Kozlowski
- Added R-b tag by Chanho Park
drivers/i2c/busses/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index df89cb809330..42da31c1ab70 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -617,7 +617,7 @@ config I2C_EXYNOS5
help
High-speed I2C controller on Samsung Exynos5 and newer Samsung SoCs:
Exynos5250, Exynos5260, Exynos5410, Exynos542x, Exynos5800,
- Exynos5433 and Exynos7.
+ Exynos5433, Exynos7, Exynos850 and ExynosAutoV9.
Choose Y here only if you build for such Samsung SoC.
config I2C_GPIO
--
2.30.2
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 7/8] arm: dts: exynos: Rename hsi2c nodes to i2c for Exynos5260
2021-12-04 21:50 From a5f512cb01e48f5bfcdef800dd477c8b04a4cacf Mon Sep 17 00:00:00 2001 Sam Protsenko
` (5 preceding siblings ...)
2021-12-04 21:50 ` [PATCH v2 6/8] i2c: exynos5: Mention Exynos850 and ExynosAutoV9 in Kconfig Sam Protsenko
@ 2021-12-04 21:50 ` Sam Protsenko
2021-12-04 21:50 ` [PATCH v2 8/8] arm64: dts: exynos: Rename hsi2c nodes to i2c for Exynos5433 and Exynos7 Sam Protsenko
2021-12-04 21:56 ` From a5f512cb01e48f5bfcdef800dd477c8b04a4cacf Mon Sep 17 00:00:00 2001 Sam Protsenko
8 siblings, 0 replies; 10+ messages in thread
From: Sam Protsenko @ 2021-12-04 21:50 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring
Cc: Jaewon Kim, Chanho Park, David Virag, Youngmin Nam, Wolfram Sang,
Arnd Bergmann, linux-i2c, devicetree, linux-arm-kernel,
linux-kernel, linux-samsung-soc
In Device Tree specification it's recommended to use "i2c" name for I2C
nodes. Now that i2c-exynos5 dt-schema binding was added, it shows some
warnings like this when validating HS-I2C nodes:
hsi2c@xxxxxxxxx: $nodename:0: 'hsi2c@xxxxxxxx' does not match
'^i2c(@.*)?'
From schema: Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
Rename hsi2c@* to i2c@* to fix those warnings.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
Changes in v2:
- This patch was added in v2
arch/arm/boot/dts/exynos5260.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi
index 52fa211525ce..524d244050e0 100644
--- a/arch/arm/boot/dts/exynos5260.dtsi
+++ b/arch/arm/boot/dts/exynos5260.dtsi
@@ -368,7 +368,7 @@ mmc_2: mmc@12160000 {
status = "disabled";
};
- hsi2c_0: hsi2c@12da0000 {
+ hsi2c_0: i2c@12da0000 {
compatible = "samsung,exynos5260-hsi2c";
reg = <0x12DA0000 0x1000>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
@@ -381,7 +381,7 @@ hsi2c_0: hsi2c@12da0000 {
status = "disabled";
};
- hsi2c_1: hsi2c@12db0000 {
+ hsi2c_1: i2c@12db0000 {
compatible = "samsung,exynos5260-hsi2c";
reg = <0x12DB0000 0x1000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
@@ -394,7 +394,7 @@ hsi2c_1: hsi2c@12db0000 {
status = "disabled";
};
- hsi2c_2: hsi2c@12dc0000 {
+ hsi2c_2: i2c@12dc0000 {
compatible = "samsung,exynos5260-hsi2c";
reg = <0x12DC0000 0x1000>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
@@ -407,7 +407,7 @@ hsi2c_2: hsi2c@12dc0000 {
status = "disabled";
};
- hsi2c_3: hsi2c@12dd0000 {
+ hsi2c_3: i2c@12dd0000 {
compatible = "samsung,exynos5260-hsi2c";
reg = <0x12DD0000 0x1000>;
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
--
2.30.2
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 8/8] arm64: dts: exynos: Rename hsi2c nodes to i2c for Exynos5433 and Exynos7
2021-12-04 21:50 From a5f512cb01e48f5bfcdef800dd477c8b04a4cacf Mon Sep 17 00:00:00 2001 Sam Protsenko
` (6 preceding siblings ...)
2021-12-04 21:50 ` [PATCH v2 7/8] arm: dts: exynos: Rename hsi2c nodes to i2c for Exynos5260 Sam Protsenko
@ 2021-12-04 21:50 ` Sam Protsenko
2021-12-04 21:56 ` From a5f512cb01e48f5bfcdef800dd477c8b04a4cacf Mon Sep 17 00:00:00 2001 Sam Protsenko
8 siblings, 0 replies; 10+ messages in thread
From: Sam Protsenko @ 2021-12-04 21:50 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring
Cc: Jaewon Kim, Chanho Park, David Virag, Youngmin Nam, Wolfram Sang,
Arnd Bergmann, linux-i2c, devicetree, linux-arm-kernel,
linux-kernel, linux-samsung-soc
In Device Tree specification it's recommended to use "i2c" name for I2C
nodes. Now that i2c-exynos5 dt-schema binding was added, it shows some
warnings like this when validating HS-I2C nodes:
hsi2c@xxxxxxxxx: $nodename:0: 'hsi2c@xxxxxxxx' does not match
'^i2c(@.*)?'
From schema: Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
Rename hsi2c@* to i2c@* to fix those warnings.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
Changes in v2:
- This patch was added in v2
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 24 +++++++++++-----------
arch/arm64/boot/dts/exynos/exynos7.dtsi | 24 +++++++++++-----------
2 files changed, 24 insertions(+), 24 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 4422021cf4b2..bfe4ed8a23d6 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -1585,7 +1585,7 @@ pwm: pwm@14dd0000 {
status = "disabled";
};
- hsi2c_0: hsi2c@14e40000 {
+ hsi2c_0: i2c@14e40000 {
compatible = "samsung,exynos7-hsi2c";
reg = <0x14e40000 0x1000>;
interrupts = <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>;
@@ -1598,7 +1598,7 @@ hsi2c_0: hsi2c@14e40000 {
status = "disabled";
};
- hsi2c_1: hsi2c@14e50000 {
+ hsi2c_1: i2c@14e50000 {
compatible = "samsung,exynos7-hsi2c";
reg = <0x14e50000 0x1000>;
interrupts = <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>;
@@ -1611,7 +1611,7 @@ hsi2c_1: hsi2c@14e50000 {
status = "disabled";
};
- hsi2c_2: hsi2c@14e60000 {
+ hsi2c_2: i2c@14e60000 {
compatible = "samsung,exynos7-hsi2c";
reg = <0x14e60000 0x1000>;
interrupts = <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>;
@@ -1624,7 +1624,7 @@ hsi2c_2: hsi2c@14e60000 {
status = "disabled";
};
- hsi2c_3: hsi2c@14e70000 {
+ hsi2c_3: i2c@14e70000 {
compatible = "samsung,exynos7-hsi2c";
reg = <0x14e70000 0x1000>;
interrupts = <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>;
@@ -1637,7 +1637,7 @@ hsi2c_3: hsi2c@14e70000 {
status = "disabled";
};
- hsi2c_4: hsi2c@14ec0000 {
+ hsi2c_4: i2c@14ec0000 {
compatible = "samsung,exynos7-hsi2c";
reg = <0x14ec0000 0x1000>;
interrupts = <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>;
@@ -1650,7 +1650,7 @@ hsi2c_4: hsi2c@14ec0000 {
status = "disabled";
};
- hsi2c_5: hsi2c@14ed0000 {
+ hsi2c_5: i2c@14ed0000 {
compatible = "samsung,exynos7-hsi2c";
reg = <0x14ed0000 0x1000>;
interrupts = <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>;
@@ -1663,7 +1663,7 @@ hsi2c_5: hsi2c@14ed0000 {
status = "disabled";
};
- hsi2c_6: hsi2c@14ee0000 {
+ hsi2c_6: i2c@14ee0000 {
compatible = "samsung,exynos7-hsi2c";
reg = <0x14ee0000 0x1000>;
interrupts = <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>;
@@ -1676,7 +1676,7 @@ hsi2c_6: hsi2c@14ee0000 {
status = "disabled";
};
- hsi2c_7: hsi2c@14ef0000 {
+ hsi2c_7: i2c@14ef0000 {
compatible = "samsung,exynos7-hsi2c";
reg = <0x14ef0000 0x1000>;
interrupts = <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>;
@@ -1689,7 +1689,7 @@ hsi2c_7: hsi2c@14ef0000 {
status = "disabled";
};
- hsi2c_8: hsi2c@14d90000 {
+ hsi2c_8: i2c@14d90000 {
compatible = "samsung,exynos7-hsi2c";
reg = <0x14d90000 0x1000>;
interrupts = <GIC_SPI 443 IRQ_TYPE_LEVEL_HIGH>;
@@ -1702,7 +1702,7 @@ hsi2c_8: hsi2c@14d90000 {
status = "disabled";
};
- hsi2c_9: hsi2c@14da0000 {
+ hsi2c_9: i2c@14da0000 {
compatible = "samsung,exynos7-hsi2c";
reg = <0x14da0000 0x1000>;
interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
@@ -1715,7 +1715,7 @@ hsi2c_9: hsi2c@14da0000 {
status = "disabled";
};
- hsi2c_10: hsi2c@14de0000 {
+ hsi2c_10: i2c@14de0000 {
compatible = "samsung,exynos7-hsi2c";
reg = <0x14de0000 0x1000>;
interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
@@ -1728,7 +1728,7 @@ hsi2c_10: hsi2c@14de0000 {
status = "disabled";
};
- hsi2c_11: hsi2c@14df0000 {
+ hsi2c_11: i2c@14df0000 {
compatible = "samsung,exynos7-hsi2c";
reg = <0x14df0000 0x1000>;
interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
index c73a597ca66e..c3efbc8add38 100644
--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -359,7 +359,7 @@ pinctrl_bus1: pinctrl@14870000 {
interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>;
};
- hsi2c_0: hsi2c@13640000 {
+ hsi2c_0: i2c@13640000 {
compatible = "samsung,exynos7-hsi2c";
reg = <0x13640000 0x1000>;
interrupts = <GIC_SPI 441 IRQ_TYPE_LEVEL_HIGH>;
@@ -372,7 +372,7 @@ hsi2c_0: hsi2c@13640000 {
status = "disabled";
};
- hsi2c_1: hsi2c@13650000 {
+ hsi2c_1: i2c@13650000 {
compatible = "samsung,exynos7-hsi2c";
reg = <0x13650000 0x1000>;
interrupts = <GIC_SPI 442 IRQ_TYPE_LEVEL_HIGH>;
@@ -385,7 +385,7 @@ hsi2c_1: hsi2c@13650000 {
status = "disabled";
};
- hsi2c_2: hsi2c@14e60000 {
+ hsi2c_2: i2c@14e60000 {
compatible = "samsung,exynos7-hsi2c";
reg = <0x14e60000 0x1000>;
interrupts = <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>;
@@ -398,7 +398,7 @@ hsi2c_2: hsi2c@14e60000 {
status = "disabled";
};
- hsi2c_3: hsi2c@14e70000 {
+ hsi2c_3: i2c@14e70000 {
compatible = "samsung,exynos7-hsi2c";
reg = <0x14e70000 0x1000>;
interrupts = <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>;
@@ -411,7 +411,7 @@ hsi2c_3: hsi2c@14e70000 {
status = "disabled";
};
- hsi2c_4: hsi2c@13660000 {
+ hsi2c_4: i2c@13660000 {
compatible = "samsung,exynos7-hsi2c";
reg = <0x13660000 0x1000>;
interrupts = <GIC_SPI 443 IRQ_TYPE_LEVEL_HIGH>;
@@ -424,7 +424,7 @@ hsi2c_4: hsi2c@13660000 {
status = "disabled";
};
- hsi2c_5: hsi2c@13670000 {
+ hsi2c_5: i2c@13670000 {
compatible = "samsung,exynos7-hsi2c";
reg = <0x13670000 0x1000>;
interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
@@ -437,7 +437,7 @@ hsi2c_5: hsi2c@13670000 {
status = "disabled";
};
- hsi2c_6: hsi2c@14e00000 {
+ hsi2c_6: i2c@14e00000 {
compatible = "samsung,exynos7-hsi2c";
reg = <0x14e00000 0x1000>;
interrupts = <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>;
@@ -450,7 +450,7 @@ hsi2c_6: hsi2c@14e00000 {
status = "disabled";
};
- hsi2c_7: hsi2c@13e10000 {
+ hsi2c_7: i2c@13e10000 {
compatible = "samsung,exynos7-hsi2c";
reg = <0x13e10000 0x1000>;
interrupts = <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>;
@@ -463,7 +463,7 @@ hsi2c_7: hsi2c@13e10000 {
status = "disabled";
};
- hsi2c_8: hsi2c@14e20000 {
+ hsi2c_8: i2c@14e20000 {
compatible = "samsung,exynos7-hsi2c";
reg = <0x14e20000 0x1000>;
interrupts = <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>;
@@ -476,7 +476,7 @@ hsi2c_8: hsi2c@14e20000 {
status = "disabled";
};
- hsi2c_9: hsi2c@13680000 {
+ hsi2c_9: i2c@13680000 {
compatible = "samsung,exynos7-hsi2c";
reg = <0x13680000 0x1000>;
interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
@@ -489,7 +489,7 @@ hsi2c_9: hsi2c@13680000 {
status = "disabled";
};
- hsi2c_10: hsi2c@13690000 {
+ hsi2c_10: i2c@13690000 {
compatible = "samsung,exynos7-hsi2c";
reg = <0x13690000 0x1000>;
interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
@@ -502,7 +502,7 @@ hsi2c_10: hsi2c@13690000 {
status = "disabled";
};
- hsi2c_11: hsi2c@136a0000 {
+ hsi2c_11: i2c@136a0000 {
compatible = "samsung,exynos7-hsi2c";
reg = <0x136a0000 0x1000>;
interrupts = <GIC_SPI 447 IRQ_TYPE_LEVEL_HIGH>;
--
2.30.2
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: From a5f512cb01e48f5bfcdef800dd477c8b04a4cacf Mon Sep 17 00:00:00 2001
2021-12-04 21:50 From a5f512cb01e48f5bfcdef800dd477c8b04a4cacf Mon Sep 17 00:00:00 2001 Sam Protsenko
` (7 preceding siblings ...)
2021-12-04 21:50 ` [PATCH v2 8/8] arm64: dts: exynos: Rename hsi2c nodes to i2c for Exynos5433 and Exynos7 Sam Protsenko
@ 2021-12-04 21:56 ` Sam Protsenko
8 siblings, 0 replies; 10+ messages in thread
From: Sam Protsenko @ 2021-12-04 21:56 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring
Cc: Jaewon Kim, Chanho Park, David Virag, Youngmin Nam, Wolfram Sang,
Arnd Bergmann, linux-i2c, devicetree, linux-arm-kernel,
linux-kernel, linux-samsung-soc
On Sat, 4 Dec 2021 at 23:50, Sam Protsenko <semen.protsenko@linaro.org> wrote:
>
> Modern ARM64 Samsung Exynos SoCs (like Exynos Auto V9 and Exynos850) use
> pretty much the same High-Speed I2C controller supported in i2c-exynos5
> driver ("samsung,exynos7-hsi2c" variant), but with some differences:
> - timings are now calculated and configured a bit differently
> - two clocks are now provided to HSI2C controller (and must be
> asserted during I2C operation and register access)
>
> This patch series implements these changes, making it possible to use
> HSI2C driver on modern Exynos SoCs.
>
> Another change in mentioned SoCs is that HSI2C controller is now a part
> of USIv2 IP-core. But no USI modifications are needed in HSI2C driver,
> as all USI related configuration is done in USI driver independently.
> USI driver is added in [1] series (or its later revision, if available).
> To make HSI2C functional, both patch series (this one and [1]) have to
> be applied, but those can be applied independently.
>
> Changes in v2:
> - Added new patches renaming "hsi2c@*" nodes to "i2c@*" for Exynos
> dts's
> - Added R-b tags from v1 review
> - Fixed and improved i2c-exynos5 dt-bindings
>
> [1] https://patchwork.kernel.org/project/linux-samsung-soc/cover/20211204195757.8600-1-semen.protsenko@linaro.org/
>
> Jaewon Kim (2):
> dt-bindings: i2c: exynos5: Add exynosautov9-hsi2c compatible
> i2c: exynos5: Add support for ExynosAutoV9 SoC
>
> Sam Protsenko (6):
> dt-bindings: i2c: exynos5: Convert to dtschema
> dt-bindings: i2c: exynos5: Add bus clock
> i2c: exynos5: Add bus clock support
> i2c: exynos5: Mention Exynos850 and ExynosAutoV9 in Kconfig
> arm: dts: exynos: Rename hsi2c nodes to i2c for Exynos5260
> arm64: dts: exynos: Rename hsi2c nodes to i2c for Exynos5433 and
> Exynos7
>
> .../devicetree/bindings/i2c/i2c-exynos5.txt | 53 -------
> .../devicetree/bindings/i2c/i2c-exynos5.yaml | 133 ++++++++++++++++++
> arch/arm/boot/dts/exynos5260.dtsi | 8 +-
> arch/arm64/boot/dts/exynos/exynos5433.dtsi | 24 ++--
> arch/arm64/boot/dts/exynos/exynos7.dtsi | 24 ++--
> drivers/i2c/busses/Kconfig | 2 +-
> drivers/i2c/busses/i2c-exynos5.c | 108 +++++++++++---
> 7 files changed, 253 insertions(+), 99 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
> create mode 100644 Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
>
> --
Please ignore this series, patch 0/8 was malformed for some reason.
I'll resend it soon, with [PATCH v2 RESEND] prefix.
> 2.30.2
>
^ permalink raw reply [flat|nested] 10+ messages in thread