* [PATCH 01/19] dt-bindings: vendor-prefixes: add Enclustra
2021-12-27 13:31 [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema Krzysztof Kozlowski
@ 2021-12-27 13:31 ` Krzysztof Kozlowski
2021-12-27 13:31 ` [PATCH 02/19] dt-bindings: altera: document existing Cyclone 5 board compatibles Krzysztof Kozlowski
` (18 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-27 13:31 UTC (permalink / raw)
To: Rob Herring, Michael Turquette, Stephen Boyd, Ulf Hansson,
Dinh Nguyen, devicetree, linux-kernel, linux-clk, linux-mmc
Cc: Krzysztof Kozlowski
Add vendor prefix for Enclustra GmbH (https://www.enclustra.com).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 1497303e2600..a909dc1c8e28 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -373,6 +373,8 @@ patternProperties:
description: Empire Electronix
"^emtrion,.*":
description: emtrion GmbH
+ "^enclustra,.*":
+ description: Enclustra GmbH
"^endless,.*":
description: Endless Mobile, Inc.
"^ene,.*":
--
2.32.0
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 02/19] dt-bindings: altera: document existing Cyclone 5 board compatibles
2021-12-27 13:31 [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema Krzysztof Kozlowski
2021-12-27 13:31 ` [PATCH 01/19] dt-bindings: vendor-prefixes: add Enclustra Krzysztof Kozlowski
@ 2021-12-27 13:31 ` Krzysztof Kozlowski
2021-12-27 13:31 ` [PATCH 03/19] dt-bindings: altera: document Arria 5 based " Krzysztof Kozlowski
` (17 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-27 13:31 UTC (permalink / raw)
To: Rob Herring, Michael Turquette, Stephen Boyd, Ulf Hansson,
Dinh Nguyen, devicetree, linux-kernel, linux-clk, linux-mmc
Cc: Krzysztof Kozlowski
Several Cyclone 5 SoCFPGA based boards have additional board compatibles
which are not documented in the bindings.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
.../devicetree/bindings/arm/altera.yaml | 30 +++++++++++++++----
1 file changed, 24 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml
index c15c92fdf2ed..0d62c2bde053 100644
--- a/Documentation/devicetree/bindings/arm/altera.yaml
+++ b/Documentation/devicetree/bindings/arm/altera.yaml
@@ -13,12 +13,30 @@ properties:
$nodename:
const: "/"
compatible:
- items:
- - enum:
- - altr,socfpga-cyclone5
- - altr,socfpga-arria5
- - altr,socfpga-arria10
- - const: altr,socfpga
+ oneOf:
+ - description: Arria 5 boards
+ items:
+ - const: altr,socfpga-arria5
+ - const: altr,socfpga
+
+ - description: Arria 10 boards
+ items:
+ - const: altr,socfpga-arria10
+ - const: altr,socfpga
+
+ - description: Cyclone 5 boards
+ items:
+ - enum:
+ - altr,socfpga-cyclone5-socdk
+ - denx,mcvevk
+ - ebv,socrates
+ - macnica,sodia
+ - novtech,chameleon96
+ - samtec,vining
+ - terasic,de0-atlas
+ - terasic,socfpga-cyclone5-sockit
+ - const: altr,socfpga-cyclone5
+ - const: altr,socfpga
additionalProperties: true
--
2.32.0
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 03/19] dt-bindings: altera: document Arria 5 based board compatibles
2021-12-27 13:31 [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema Krzysztof Kozlowski
2021-12-27 13:31 ` [PATCH 01/19] dt-bindings: vendor-prefixes: add Enclustra Krzysztof Kozlowski
2021-12-27 13:31 ` [PATCH 02/19] dt-bindings: altera: document existing Cyclone 5 board compatibles Krzysztof Kozlowski
@ 2021-12-27 13:31 ` Krzysztof Kozlowski
2021-12-27 13:31 ` [PATCH 04/19] dt-bindings: altera: document Arria 10 " Krzysztof Kozlowski
` (16 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-27 13:31 UTC (permalink / raw)
To: Rob Herring, Michael Turquette, Stephen Boyd, Ulf Hansson,
Dinh Nguyen, devicetree, linux-kernel, linux-clk, linux-mmc
Cc: Krzysztof Kozlowski
Add new compatible for Arria 5 based boards.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
Documentation/devicetree/bindings/arm/altera.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml
index 0d62c2bde053..3d7a2f699279 100644
--- a/Documentation/devicetree/bindings/arm/altera.yaml
+++ b/Documentation/devicetree/bindings/arm/altera.yaml
@@ -16,6 +16,8 @@ properties:
oneOf:
- description: Arria 5 boards
items:
+ - enum:
+ - altr,socfpga-arria5-socdk
- const: altr,socfpga-arria5
- const: altr,socfpga
--
2.32.0
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 04/19] dt-bindings: altera: document Arria 10 based board compatibles
2021-12-27 13:31 [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema Krzysztof Kozlowski
` (2 preceding siblings ...)
2021-12-27 13:31 ` [PATCH 03/19] dt-bindings: altera: document Arria 5 based " Krzysztof Kozlowski
@ 2021-12-27 13:31 ` Krzysztof Kozlowski
2021-12-27 13:31 ` [PATCH 05/19] dt-bindings: altera: document VT compatibles Krzysztof Kozlowski
` (15 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-27 13:31 UTC (permalink / raw)
To: Rob Herring, Michael Turquette, Stephen Boyd, Ulf Hansson,
Dinh Nguyen, devicetree, linux-kernel, linux-clk, linux-mmc
Cc: Krzysztof Kozlowski
Add new compatible for Arria 10 based boards.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
Documentation/devicetree/bindings/arm/altera.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml
index 3d7a2f699279..963c83904010 100644
--- a/Documentation/devicetree/bindings/arm/altera.yaml
+++ b/Documentation/devicetree/bindings/arm/altera.yaml
@@ -23,6 +23,9 @@ properties:
- description: Arria 10 boards
items:
+ - enum:
+ - altr,socfpga-arria10-socdk
+ - enclustra,mercury-aa1
- const: altr,socfpga-arria10
- const: altr,socfpga
--
2.32.0
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 05/19] dt-bindings: altera: document VT compatibles
2021-12-27 13:31 [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema Krzysztof Kozlowski
` (3 preceding siblings ...)
2021-12-27 13:31 ` [PATCH 04/19] dt-bindings: altera: document Arria 10 " Krzysztof Kozlowski
@ 2021-12-27 13:31 ` Krzysztof Kozlowski
2021-12-27 13:35 ` [PATCH 06/19] dt-bindings: altera: document Stratix 10 based board compatibles Krzysztof Kozlowski
` (14 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-27 13:31 UTC (permalink / raw)
To: Rob Herring, Michael Turquette, Stephen Boyd, Ulf Hansson,
Dinh Nguyen, devicetree, linux-kernel, linux-clk, linux-mmc
Cc: Krzysztof Kozlowski
Add new compatible for SoCFPGA VT boards/designs.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
Documentation/devicetree/bindings/arm/altera.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml
index 963c83904010..f4e07a21aaf5 100644
--- a/Documentation/devicetree/bindings/arm/altera.yaml
+++ b/Documentation/devicetree/bindings/arm/altera.yaml
@@ -43,6 +43,11 @@ properties:
- const: altr,socfpga-cyclone5
- const: altr,socfpga
+ - description: SoCFPGA VT
+ items:
+ - const: altr,socfpga-vt
+ - const: altr,socfpga
+
additionalProperties: true
...
--
2.32.0
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 06/19] dt-bindings: altera: document Stratix 10 based board compatibles
2021-12-27 13:31 [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema Krzysztof Kozlowski
` (4 preceding siblings ...)
2021-12-27 13:31 ` [PATCH 05/19] dt-bindings: altera: document VT compatibles Krzysztof Kozlowski
@ 2021-12-27 13:35 ` Krzysztof Kozlowski
2021-12-27 13:35 ` [PATCH 07/19] dt-bindings: intel: document Agilex " Krzysztof Kozlowski
` (13 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-27 13:35 UTC (permalink / raw)
To: Rob Herring, Michael Turquette, Stephen Boyd, Ulf Hansson,
Dinh Nguyen, devicetree, linux-kernel, linux-clk, linux-mmc
Cc: Krzysztof Kozlowski
Add new compatible for Stratix 10 based boards.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
Documentation/devicetree/bindings/arm/altera.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml
index f4e07a21aaf5..5e2017c0a051 100644
--- a/Documentation/devicetree/bindings/arm/altera.yaml
+++ b/Documentation/devicetree/bindings/arm/altera.yaml
@@ -43,6 +43,12 @@ properties:
- const: altr,socfpga-cyclone5
- const: altr,socfpga
+ - description: Stratix 10 boards
+ items:
+ - enum:
+ - altr,socfpga-stratix10-socdk
+ - const: altr,socfpga-stratix10
+
- description: SoCFPGA VT
items:
- const: altr,socfpga-vt
--
2.32.0
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 07/19] dt-bindings: intel: document Agilex based board compatibles
2021-12-27 13:31 [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema Krzysztof Kozlowski
` (5 preceding siblings ...)
2021-12-27 13:35 ` [PATCH 06/19] dt-bindings: altera: document Stratix 10 based board compatibles Krzysztof Kozlowski
@ 2021-12-27 13:35 ` Krzysztof Kozlowski
2021-12-27 13:35 ` [PATCH 08/19] dt-bindings: clock: intel,stratix10: convert to dtschema Krzysztof Kozlowski
` (12 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-27 13:35 UTC (permalink / raw)
To: Rob Herring, Michael Turquette, Stephen Boyd, Ulf Hansson,
Dinh Nguyen, devicetree, linux-kernel, linux-clk, linux-mmc
Cc: Krzysztof Kozlowski
Add new compatible for Agilex based boards.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
.../bindings/arm/intel,socfpga.yaml | 26 +++++++++++++++++++
1 file changed, 26 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/intel,socfpga.yaml
diff --git a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml
new file mode 100644
index 000000000000..6e043459fcd5
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml
@@ -0,0 +1,26 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/intel,socfpga.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Intel SoCFPGA platform device tree bindings
+
+maintainers:
+ - Dinh Nguyen <dinguyen@kernel.org>
+
+properties:
+ $nodename:
+ const: "/"
+ compatible:
+ oneOf:
+ - description: AgileX boards
+ items:
+ - enum:
+ - intel,n5x-socdk
+ - intel,socfpga-agilex-socdk
+ - const: intel,socfpga-agilex
+
+additionalProperties: true
+
+...
--
2.32.0
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 08/19] dt-bindings: clock: intel,stratix10: convert to dtschema
2021-12-27 13:31 [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema Krzysztof Kozlowski
` (6 preceding siblings ...)
2021-12-27 13:35 ` [PATCH 07/19] dt-bindings: intel: document Agilex " Krzysztof Kozlowski
@ 2021-12-27 13:35 ` Krzysztof Kozlowski
2022-01-06 0:34 ` Stephen Boyd
2021-12-27 13:35 ` [PATCH 09/19] dt-bindings: mmc: synopsys-dw-mshc: integrate Altera and Imagination Krzysztof Kozlowski
` (11 subsequent siblings)
19 siblings, 1 reply; 23+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-27 13:35 UTC (permalink / raw)
To: Rob Herring, Michael Turquette, Stephen Boyd, Ulf Hansson,
Dinh Nguyen, devicetree, linux-kernel, linux-clk, linux-mmc
Cc: Krzysztof Kozlowski
Convert the Intel Stratix 10 clock controller bindings to DT schema format.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
.../bindings/clock/intc_stratix10.txt | 20 -----------
.../bindings/clock/intel,stratix10.yaml | 35 +++++++++++++++++++
2 files changed, 35 insertions(+), 20 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/clock/intc_stratix10.txt
create mode 100644 Documentation/devicetree/bindings/clock/intel,stratix10.yaml
diff --git a/Documentation/devicetree/bindings/clock/intc_stratix10.txt b/Documentation/devicetree/bindings/clock/intc_stratix10.txt
deleted file mode 100644
index 9f4ec5cb5c6b..000000000000
--- a/Documentation/devicetree/bindings/clock/intc_stratix10.txt
+++ /dev/null
@@ -1,20 +0,0 @@
-Device Tree Clock bindings for Intel's SoCFPGA Stratix10 platform
-
-This binding uses the common clock binding[1].
-
-[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
-
-Required properties:
-- compatible : shall be
- "intel,stratix10-clkmgr"
-
-- reg : shall be the control register offset from CLOCK_MANAGER's base for the clock.
-
-- #clock-cells : from common clock binding, shall be set to 1.
-
-Example:
- clkmgr: clock-controller@ffd10000 {
- compatible = "intel,stratix10-clkmgr";
- reg = <0xffd10000 0x1000>;
- #clock-cells = <1>;
- };
diff --git a/Documentation/devicetree/bindings/clock/intel,stratix10.yaml b/Documentation/devicetree/bindings/clock/intel,stratix10.yaml
new file mode 100644
index 000000000000..f506e3db9782
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/intel,stratix10.yaml
@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/intel,stratix10.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Intel SoCFPGA Stratix10 platform clock controller binding
+
+maintainers:
+ - Dinh Nguyen <dinguyen@kernel.org>
+
+properties:
+ compatible:
+ const: intel,stratix10-clkmgr
+
+ '#clock-cells':
+ const: 1
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ clock-controller@ffd10000 {
+ compatible = "intel,stratix10-clkmgr";
+ reg = <0xffd10000 0x1000>;
+ #clock-cells = <1>;
+ };
--
2.32.0
^ permalink raw reply related [flat|nested] 23+ messages in thread* Re: [PATCH 08/19] dt-bindings: clock: intel,stratix10: convert to dtschema
2021-12-27 13:35 ` [PATCH 08/19] dt-bindings: clock: intel,stratix10: convert to dtschema Krzysztof Kozlowski
@ 2022-01-06 0:34 ` Stephen Boyd
0 siblings, 0 replies; 23+ messages in thread
From: Stephen Boyd @ 2022-01-06 0:34 UTC (permalink / raw)
To: Dinh Nguyen, Krzysztof Kozlowski, Michael Turquette, Rob Herring,
Ulf Hansson, devicetree, linux-clk, linux-kernel, linux-mmc
Cc: Krzysztof Kozlowski
Quoting Krzysztof Kozlowski (2021-12-27 05:35:47)
> Convert the Intel Stratix 10 clock controller bindings to DT schema format.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> ---
Acked-by: Stephen Boyd <sboyd@kernel.org>
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH 09/19] dt-bindings: mmc: synopsys-dw-mshc: integrate Altera and Imagination
2021-12-27 13:31 [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema Krzysztof Kozlowski
` (7 preceding siblings ...)
2021-12-27 13:35 ` [PATCH 08/19] dt-bindings: clock: intel,stratix10: convert to dtschema Krzysztof Kozlowski
@ 2021-12-27 13:35 ` Krzysztof Kozlowski
2021-12-28 16:58 ` Ulf Hansson
2021-12-27 13:35 ` [PATCH 10/19] ARM: dts: arria5: add board compatible for SoCFPGA DK Krzysztof Kozlowski
` (10 subsequent siblings)
19 siblings, 1 reply; 23+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-27 13:35 UTC (permalink / raw)
To: Rob Herring, Michael Turquette, Stephen Boyd, Ulf Hansson,
Dinh Nguyen, devicetree, linux-kernel, linux-clk, linux-mmc
Cc: Krzysztof Kozlowski
The bindings for Altera and Imagination extensions are the same as for
the original Synopsys Designware Mobile Storage Host Controller.
Integrate them into Synopsys bindings to have dtschema coverage.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
.../devicetree/bindings/mmc/img-dw-mshc.txt | 28 -------------------
.../bindings/mmc/socfpga-dw-mshc.txt | 23 ---------------
.../bindings/mmc/synopsys-dw-mshc.yaml | 5 +++-
3 files changed, 4 insertions(+), 52 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/mmc/img-dw-mshc.txt
delete mode 100644 Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt
diff --git a/Documentation/devicetree/bindings/mmc/img-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/img-dw-mshc.txt
deleted file mode 100644
index c54e577eea07..000000000000
--- a/Documentation/devicetree/bindings/mmc/img-dw-mshc.txt
+++ /dev/null
@@ -1,28 +0,0 @@
-* Imagination specific extensions to the Synopsys Designware Mobile Storage
- Host Controller
-
-The Synopsys designware mobile storage host controller is used to interface
-a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
-differences between the core Synopsys dw mshc controller properties described
-by synopsys-dw-mshc.txt and the properties used by the Imagination specific
-extensions to the Synopsys Designware Mobile Storage Host Controller.
-
-Required Properties:
-
-* compatible: should be
- - "img,pistachio-dw-mshc": for Pistachio SoCs
-
-Example:
-
- mmc@18142000 {
- compatible = "img,pistachio-dw-mshc";
- reg = <0x18142000 0x400>;
- interrupts = <GIC_SHARED 39 IRQ_TYPE_LEVEL_HIGH>;
-
- clocks = <&system_clk>, <&sdhost_clk>;
- clock-names = "biu", "ciu";
-
- fifo-depth = <0x20>;
- bus-width = <4>;
- disable-wp;
- };
diff --git a/Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt
deleted file mode 100644
index 4897bea7e3f8..000000000000
--- a/Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt
+++ /dev/null
@@ -1,23 +0,0 @@
-* Altera SOCFPGA specific extensions to the Synopsys Designware Mobile
- Storage Host Controller
-
-The Synopsys designware mobile storage host controller is used to interface
-a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
-differences between the core Synopsys dw mshc controller properties described
-by synopsys-dw-mshc.txt and the properties used by the Altera SOCFPGA specific
-extensions to the Synopsys Designware Mobile Storage Host Controller.
-
-Required Properties:
-
-* compatible: should be
- - "altr,socfpga-dw-mshc": for Altera's SOCFPGA platform
-
-Example:
-
- mmc: dwmmc0@ff704000 {
- compatible = "altr,socfpga-dw-mshc";
- reg = <0xff704000 0x1000>;
- interrupts = <0 129 4>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml
index 240abb6f102c..ae6d6fca79e2 100644
--- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml
+++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml
@@ -15,7 +15,10 @@ maintainers:
# Everything else is described in the common file
properties:
compatible:
- const: snps,dw-mshc
+ enum:
+ - altr,socfpga-dw-mshc
+ - img,pistachio-dw-mshc
+ - snps,dw-mshc
reg:
maxItems: 1
--
2.32.0
^ permalink raw reply related [flat|nested] 23+ messages in thread* Re: [PATCH 09/19] dt-bindings: mmc: synopsys-dw-mshc: integrate Altera and Imagination
2021-12-27 13:35 ` [PATCH 09/19] dt-bindings: mmc: synopsys-dw-mshc: integrate Altera and Imagination Krzysztof Kozlowski
@ 2021-12-28 16:58 ` Ulf Hansson
0 siblings, 0 replies; 23+ messages in thread
From: Ulf Hansson @ 2021-12-28 16:58 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Rob Herring, Michael Turquette, Stephen Boyd, Dinh Nguyen,
devicetree, linux-kernel, linux-clk, linux-mmc
On Mon, 27 Dec 2021 at 14:36, Krzysztof Kozlowski
<krzysztof.kozlowski@canonical.com> wrote:
>
> The bindings for Altera and Imagination extensions are the same as for
> the original Synopsys Designware Mobile Storage Host Controller.
> Integrate them into Synopsys bindings to have dtschema coverage.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Applied for next, thanks!
Kind regards
Uffe
> ---
> .../devicetree/bindings/mmc/img-dw-mshc.txt | 28 -------------------
> .../bindings/mmc/socfpga-dw-mshc.txt | 23 ---------------
> .../bindings/mmc/synopsys-dw-mshc.yaml | 5 +++-
> 3 files changed, 4 insertions(+), 52 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/mmc/img-dw-mshc.txt
> delete mode 100644 Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt
>
> diff --git a/Documentation/devicetree/bindings/mmc/img-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/img-dw-mshc.txt
> deleted file mode 100644
> index c54e577eea07..000000000000
> --- a/Documentation/devicetree/bindings/mmc/img-dw-mshc.txt
> +++ /dev/null
> @@ -1,28 +0,0 @@
> -* Imagination specific extensions to the Synopsys Designware Mobile Storage
> - Host Controller
> -
> -The Synopsys designware mobile storage host controller is used to interface
> -a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
> -differences between the core Synopsys dw mshc controller properties described
> -by synopsys-dw-mshc.txt and the properties used by the Imagination specific
> -extensions to the Synopsys Designware Mobile Storage Host Controller.
> -
> -Required Properties:
> -
> -* compatible: should be
> - - "img,pistachio-dw-mshc": for Pistachio SoCs
> -
> -Example:
> -
> - mmc@18142000 {
> - compatible = "img,pistachio-dw-mshc";
> - reg = <0x18142000 0x400>;
> - interrupts = <GIC_SHARED 39 IRQ_TYPE_LEVEL_HIGH>;
> -
> - clocks = <&system_clk>, <&sdhost_clk>;
> - clock-names = "biu", "ciu";
> -
> - fifo-depth = <0x20>;
> - bus-width = <4>;
> - disable-wp;
> - };
> diff --git a/Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt
> deleted file mode 100644
> index 4897bea7e3f8..000000000000
> --- a/Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt
> +++ /dev/null
> @@ -1,23 +0,0 @@
> -* Altera SOCFPGA specific extensions to the Synopsys Designware Mobile
> - Storage Host Controller
> -
> -The Synopsys designware mobile storage host controller is used to interface
> -a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
> -differences between the core Synopsys dw mshc controller properties described
> -by synopsys-dw-mshc.txt and the properties used by the Altera SOCFPGA specific
> -extensions to the Synopsys Designware Mobile Storage Host Controller.
> -
> -Required Properties:
> -
> -* compatible: should be
> - - "altr,socfpga-dw-mshc": for Altera's SOCFPGA platform
> -
> -Example:
> -
> - mmc: dwmmc0@ff704000 {
> - compatible = "altr,socfpga-dw-mshc";
> - reg = <0xff704000 0x1000>;
> - interrupts = <0 129 4>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - };
> diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml
> index 240abb6f102c..ae6d6fca79e2 100644
> --- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml
> +++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml
> @@ -15,7 +15,10 @@ maintainers:
> # Everything else is described in the common file
> properties:
> compatible:
> - const: snps,dw-mshc
> + enum:
> + - altr,socfpga-dw-mshc
> + - img,pistachio-dw-mshc
> + - snps,dw-mshc
>
> reg:
> maxItems: 1
> --
> 2.32.0
>
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH 10/19] ARM: dts: arria5: add board compatible for SoCFPGA DK
2021-12-27 13:31 [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema Krzysztof Kozlowski
` (8 preceding siblings ...)
2021-12-27 13:35 ` [PATCH 09/19] dt-bindings: mmc: synopsys-dw-mshc: integrate Altera and Imagination Krzysztof Kozlowski
@ 2021-12-27 13:35 ` Krzysztof Kozlowski
2021-12-27 13:35 ` [PATCH 11/19] ARM: dts: arria10: add board compatible for Mercury AA1 Krzysztof Kozlowski
` (9 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-27 13:35 UTC (permalink / raw)
To: Rob Herring, Michael Turquette, Stephen Boyd, Ulf Hansson,
Dinh Nguyen, devicetree, linux-kernel, linux-clk, linux-mmc
Cc: Krzysztof Kozlowski
The Altera SoCFPGA Arria V SoC Development Kit is a board with Arria 5,
so it needs its own compatible.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
arch/arm/boot/dts/socfpga_arria5_socdk.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/socfpga_arria5_socdk.dts b/arch/arm/boot/dts/socfpga_arria5_socdk.dts
index 1b02d46496a8..0e03011d0247 100644
--- a/arch/arm/boot/dts/socfpga_arria5_socdk.dts
+++ b/arch/arm/boot/dts/socfpga_arria5_socdk.dts
@@ -7,7 +7,7 @@
/ {
model = "Altera SOCFPGA Arria V SoC Development Kit";
- compatible = "altr,socfpga-arria5", "altr,socfpga";
+ compatible = "altr,socfpga-arria5-socdk", "altr,socfpga-arria5", "altr,socfpga";
chosen {
bootargs = "earlyprintk";
--
2.32.0
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 11/19] ARM: dts: arria10: add board compatible for Mercury AA1
2021-12-27 13:31 [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema Krzysztof Kozlowski
` (9 preceding siblings ...)
2021-12-27 13:35 ` [PATCH 10/19] ARM: dts: arria5: add board compatible for SoCFPGA DK Krzysztof Kozlowski
@ 2021-12-27 13:35 ` Krzysztof Kozlowski
2021-12-27 13:35 ` [PATCH 12/19] ARM: dts: arria10: add board compatible for SoCFPGA DK Krzysztof Kozlowski
` (8 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-27 13:35 UTC (permalink / raw)
To: Rob Herring, Michael Turquette, Stephen Boyd, Ulf Hansson,
Dinh Nguyen, devicetree, linux-kernel, linux-clk, linux-mmc
Cc: Krzysztof Kozlowski
The Enclustra Mercury AA1 is a module with Arria 10, so it needs its own
compatible.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts
index 2a3364b26361..a75c059b6727 100644
--- a/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts
+++ b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts
@@ -6,7 +6,7 @@
/ {
model = "Enclustra Mercury AA1";
- compatible = "altr,socfpga-arria10", "altr,socfpga";
+ compatible = "enclustra,mercury-aa1", "altr,socfpga-arria10", "altr,socfpga";
aliases {
ethernet0 = &gmac0;
--
2.32.0
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 12/19] ARM: dts: arria10: add board compatible for SoCFPGA DK
2021-12-27 13:31 [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema Krzysztof Kozlowski
` (10 preceding siblings ...)
2021-12-27 13:35 ` [PATCH 11/19] ARM: dts: arria10: add board compatible for Mercury AA1 Krzysztof Kozlowski
@ 2021-12-27 13:35 ` Krzysztof Kozlowski
2021-12-27 13:35 ` [PATCH 13/19] arm64: dts: stratix10: " Krzysztof Kozlowski
` (7 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-27 13:35 UTC (permalink / raw)
To: Rob Herring, Michael Turquette, Stephen Boyd, Ulf Hansson,
Dinh Nguyen, devicetree, linux-kernel, linux-clk, linux-mmc
Cc: Krzysztof Kozlowski
The Altera SoCFPGA Arria 10 SoC Development Kit is a board with Arria 10,
so it needs its own compatible.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
arch/arm/boot/dts/socfpga_arria10_socdk.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
index 7edebe20e859..ec7365444a3b 100644
--- a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
@@ -6,7 +6,7 @@
/ {
model = "Altera SOCFPGA Arria 10";
- compatible = "altr,socfpga-arria10", "altr,socfpga";
+ compatible = "altr,socfpga-arria10-socdk", "altr,socfpga-arria10", "altr,socfpga";
aliases {
ethernet0 = &gmac0;
--
2.32.0
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 13/19] arm64: dts: stratix10: add board compatible for SoCFPGA DK
2021-12-27 13:31 [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema Krzysztof Kozlowski
` (11 preceding siblings ...)
2021-12-27 13:35 ` [PATCH 12/19] ARM: dts: arria10: add board compatible for SoCFPGA DK Krzysztof Kozlowski
@ 2021-12-27 13:35 ` Krzysztof Kozlowski
2021-12-27 13:35 ` [PATCH 14/19] arm64: dts: stratix10: move ARM timer out of SoC node Krzysztof Kozlowski
` (6 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-27 13:35 UTC (permalink / raw)
To: Rob Herring, Michael Turquette, Stephen Boyd, Ulf Hansson,
Dinh Nguyen, devicetree, linux-kernel, linux-clk, linux-mmc
Cc: Krzysztof Kozlowski
The Altera SoCFPGA Stratix 10 SoC Development Kit is a board with
Stratix 10, so it needs its own compatible.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts | 1 +
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
index 46e558ab7729..12392292c62c 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
@@ -7,6 +7,7 @@
/ {
model = "SoCFPGA Stratix 10 SoCDK";
+ compatible = "altr,socfpga-stratix10-socdk", "altr,socfpga-stratix10";
aliases {
serial0 = &uart0;
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts
index bbc3db42d6e8..2d53a06deab5 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts
@@ -7,6 +7,7 @@
/ {
model = "SoCFPGA Stratix 10 SoCDK";
+ compatible = "altr,socfpga-stratix10-socdk", "altr,socfpga-stratix10";
aliases {
serial0 = &uart0;
--
2.32.0
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 14/19] arm64: dts: stratix10: move ARM timer out of SoC node
2021-12-27 13:31 [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema Krzysztof Kozlowski
` (12 preceding siblings ...)
2021-12-27 13:35 ` [PATCH 13/19] arm64: dts: stratix10: " Krzysztof Kozlowski
@ 2021-12-27 13:35 ` Krzysztof Kozlowski
2021-12-27 13:35 ` [PATCH 15/19] arm64: dts: stratix10: align mmc node names with dtschema Krzysztof Kozlowski
` (5 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-27 13:35 UTC (permalink / raw)
To: Rob Herring, Michael Turquette, Stephen Boyd, Ulf Hansson,
Dinh Nguyen, devicetree, linux-kernel, linux-clk, linux-mmc
Cc: Krzysztof Kozlowski
The ARM timer is usually considered not part of SoC node, just like
other ARM designed blocks (PMU, PSCI). This fixes dtbs_check warning:
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dt.yaml: soc: timer:
{'compatible': ['arm,armv8-timer'], 'interrupts': [[1, 13, 3848], [1, 14, 3848], [1, 11, 3848], [1, 10, 3848]]} should not be valid under {'type': 'object'}
From schema: dtschema/schemas/simple-bus.yaml
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
.../boot/dts/altera/socfpga_stratix10.dtsi | 19 ++++++++++---------
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index d301ac0d406b..4a527d614ee5 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -77,6 +77,16 @@ psci {
method = "smc";
};
+ /* Local timer */
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <1 13 0xf08>,
+ <1 14 0xf08>,
+ <1 11 0xf08>,
+ <1 10 0xf08>;
+ interrupt-parent = <&intc>;
+ };
+
intc: interrupt-controller@fffc1000 {
compatible = "arm,gic-400", "arm,cortex-a15-gic";
#interrupt-cells = <3>;
@@ -406,15 +416,6 @@ sysmgr: sysmgr@ffd12000 {
reg = <0xffd12000 0x228>;
};
- /* Local timer */
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <1 13 0xf08>,
- <1 14 0xf08>,
- <1 11 0xf08>,
- <1 10 0xf08>;
- };
-
timer0: timer0@ffc03000 {
compatible = "snps,dw-apb-timer";
interrupts = <0 113 4>;
--
2.32.0
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 15/19] arm64: dts: stratix10: align mmc node names with dtschema
2021-12-27 13:31 [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema Krzysztof Kozlowski
` (13 preceding siblings ...)
2021-12-27 13:35 ` [PATCH 14/19] arm64: dts: stratix10: move ARM timer out of SoC node Krzysztof Kozlowski
@ 2021-12-27 13:35 ` Krzysztof Kozlowski
2021-12-27 13:35 ` [PATCH 16/19] arm64: dts: stratix10: align regulator " Krzysztof Kozlowski
` (4 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-27 13:35 UTC (permalink / raw)
To: Rob Herring, Michael Turquette, Stephen Boyd, Ulf Hansson,
Dinh Nguyen, devicetree, linux-kernel, linux-clk, linux-mmc
Cc: Krzysztof Kozlowski
The Synopsys DW MSHC bindings require node name to be 'mmc':
dwmmc0@ff808000: $nodename:0: 'dwmmc0@ff808000' does not match '^mmc(@.*)?$'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index 4a527d614ee5..eadc81dfaa79 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -296,7 +296,7 @@ i2c4: i2c@ffc02c00 {
status = "disabled";
};
- mmc: dwmmc0@ff808000 {
+ mmc: mmc@ff808000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "altr,socfpga-dw-mshc";
--
2.32.0
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 16/19] arm64: dts: stratix10: align regulator node names with dtschema
2021-12-27 13:31 [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema Krzysztof Kozlowski
` (14 preceding siblings ...)
2021-12-27 13:35 ` [PATCH 15/19] arm64: dts: stratix10: align mmc node names with dtschema Krzysztof Kozlowski
@ 2021-12-27 13:35 ` Krzysztof Kozlowski
2021-12-27 13:35 ` [PATCH 17/19] arm64: dts: agilex: add board compatible for SoCFPGA DK Krzysztof Kozlowski
` (3 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-27 13:35 UTC (permalink / raw)
To: Rob Herring, Michael Turquette, Stephen Boyd, Ulf Hansson,
Dinh Nguyen, devicetree, linux-kernel, linux-clk, linux-mmc
Cc: Krzysztof Kozlowski
The devicetree specification requires that node name should be generic.
The dtschema complains if name does not match pattern, so make the
0.33 V regulator node name more generic.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts | 2 +-
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
index 12392292c62c..5159cd5771dc 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
@@ -44,7 +44,7 @@ memory {
reg = <0 0 0 0>;
};
- ref_033v: 033-v-ref {
+ ref_033v: regulator-v-ref {
compatible = "regulator-fixed";
regulator-name = "0.33V";
regulator-min-microvolt = <330000>;
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts
index 2d53a06deab5..0ab676c639a1 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts
@@ -44,7 +44,7 @@ memory {
reg = <0 0 0 0>;
};
- ref_033v: 033-v-ref {
+ ref_033v: regulator-v-ref {
compatible = "regulator-fixed";
regulator-name = "0.33V";
regulator-min-microvolt = <330000>;
--
2.32.0
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 17/19] arm64: dts: agilex: add board compatible for SoCFPGA DK
2021-12-27 13:31 [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema Krzysztof Kozlowski
` (15 preceding siblings ...)
2021-12-27 13:35 ` [PATCH 16/19] arm64: dts: stratix10: align regulator " Krzysztof Kozlowski
@ 2021-12-27 13:35 ` Krzysztof Kozlowski
2021-12-27 13:35 ` [PATCH 18/19] arm64: dts: agilex: add board compatible for N5X DK Krzysztof Kozlowski
` (2 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-27 13:35 UTC (permalink / raw)
To: Rob Herring, Michael Turquette, Stephen Boyd, Ulf Hansson,
Dinh Nguyen, devicetree, linux-kernel, linux-clk, linux-mmc
Cc: Krzysztof Kozlowski
The Intel SoCFPGA Agilex 10 SoC Development Kit is a board with
Agilex, so it needs its own compatible.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts | 1 +
arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
index 0f7a0ba344be..ea37ba7ccff9 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
@@ -6,6 +6,7 @@
/ {
model = "SoCFPGA Agilex SoCDK";
+ compatible = "intel,socfpga-agilex-socdk", "intel,socfpga-agilex";
aliases {
serial0 = &uart0;
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts
index 57f83481f551..51f83f96ec65 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts
@@ -6,6 +6,7 @@
/ {
model = "SoCFPGA Agilex SoCDK";
+ compatible = "intel,socfpga-agilex-socdk", "intel,socfpga-agilex";
aliases {
serial0 = &uart0;
--
2.32.0
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 18/19] arm64: dts: agilex: add board compatible for N5X DK
2021-12-27 13:31 [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema Krzysztof Kozlowski
` (16 preceding siblings ...)
2021-12-27 13:35 ` [PATCH 17/19] arm64: dts: agilex: add board compatible for SoCFPGA DK Krzysztof Kozlowski
@ 2021-12-27 13:35 ` Krzysztof Kozlowski
2021-12-27 13:35 ` [PATCH 19/19] arm64: dts: agilex: align mmc node names with dtschema Krzysztof Kozlowski
2022-01-03 16:06 ` [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema Dinh Nguyen
19 siblings, 0 replies; 23+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-27 13:35 UTC (permalink / raw)
To: Rob Herring, Michael Turquette, Stephen Boyd, Ulf Hansson,
Dinh Nguyen, devicetree, linux-kernel, linux-clk, linux-mmc
Cc: Krzysztof Kozlowski
The Intel SoCFPGA N5X SoC Development Kit is a board with
Agilex, so it needs its own compatible.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts
index f3c1310dae0a..5609d8df6729 100644
--- a/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts
+++ b/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts
@@ -6,6 +6,7 @@
/ {
model = "eASIC N5X SoCDK";
+ compatible = "intel,n5x-socdk", "intel,socfpga-agilex";
aliases {
serial0 = &uart0;
--
2.32.0
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 19/19] arm64: dts: agilex: align mmc node names with dtschema
2021-12-27 13:31 [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema Krzysztof Kozlowski
` (17 preceding siblings ...)
2021-12-27 13:35 ` [PATCH 18/19] arm64: dts: agilex: add board compatible for N5X DK Krzysztof Kozlowski
@ 2021-12-27 13:35 ` Krzysztof Kozlowski
2022-01-03 16:06 ` [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema Dinh Nguyen
19 siblings, 0 replies; 23+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-27 13:35 UTC (permalink / raw)
To: Rob Herring, Michael Turquette, Stephen Boyd, Ulf Hansson,
Dinh Nguyen, devicetree, linux-kernel, linux-clk, linux-mmc
Cc: Krzysztof Kozlowski
The Synopsys DW MSHC bindings require node name to be 'mmc':
dwmmc0@ff808000: $nodename:0: 'dwmmc0@ff808000' does not match '^mmc(@.*)?$'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
index 163f33b46e4f..0a37821af9aa 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
@@ -300,7 +300,7 @@ i2c4: i2c@ffc02c00 {
status = "disabled";
};
- mmc: dwmmc0@ff808000 {
+ mmc: mmc@ff808000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "altr,socfpga-dw-mshc";
--
2.32.0
^ permalink raw reply related [flat|nested] 23+ messages in thread* Re: [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema
2021-12-27 13:31 [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema Krzysztof Kozlowski
` (18 preceding siblings ...)
2021-12-27 13:35 ` [PATCH 19/19] arm64: dts: agilex: align mmc node names with dtschema Krzysztof Kozlowski
@ 2022-01-03 16:06 ` Dinh Nguyen
19 siblings, 0 replies; 23+ messages in thread
From: Dinh Nguyen @ 2022-01-03 16:06 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Michael Turquette,
Stephen Boyd, Ulf Hansson, devicetree, linux-kernel, linux-clk,
linux-mmc
On 12/27/21 7:31 AM, Krzysztof Kozlowski wrote:
> Hi,
>
> Partial cleanup of Altera/Intel ARMv7 and ARMv8 DTS and bindings.
>
> The patches are independent, unless touching same files (e.g.
> bindings/arm/altera.yaml).
>
> Best regards,
> Krzysztof
>
> Krzysztof Kozlowski (19):
> dt-bindings: vendor-prefixes: add Enclustra
> dt-bindings: altera: document existing Cyclone 5 board compatibles
> dt-bindings: altera: document Arria 5 based board compatibles
> dt-bindings: altera: document Arria 10 based board compatibles
> dt-bindings: altera: document VT compatibles
> dt-bindings: altera: document Stratix 10 based board compatibles
> dt-bindings: intel: document Agilex based board compatibles
> dt-bindings: clock: intel,stratix10: convert to dtschema
> dt-bindings: mmc: synopsys-dw-mshc: integrate Altera and Imagination
> ARM: dts: arria5: add board compatible for SoCFPGA DK
> ARM: dts: arria10: add board compatible for Mercury AA1
> ARM: dts: arria10: add board compatible for SoCFPGA DK
> arm64: dts: stratix10: add board compatible for SoCFPGA DK
> arm64: dts: stratix10: move ARM timer out of SoC node
> arm64: dts: stratix10: align mmc node names with dtschema
> arm64: dts: stratix10: align regulator node names with dtschema
> arm64: dts: agilex: add board compatible for SoCFPGA DK
> arm64: dts: agilex: add board compatible for N5X DK
> arm64: dts: agilex: align mmc node names with dtschema
>
> .../devicetree/bindings/arm/altera.yaml | 46 ++++++++++++++++---
> .../bindings/arm/intel,socfpga.yaml | 26 +++++++++++
> .../bindings/clock/intc_stratix10.txt | 20 --------
> .../bindings/clock/intel,stratix10.yaml | 35 ++++++++++++++
> .../devicetree/bindings/mmc/img-dw-mshc.txt | 28 -----------
> .../bindings/mmc/socfpga-dw-mshc.txt | 23 ----------
> .../bindings/mmc/synopsys-dw-mshc.yaml | 5 +-
> .../devicetree/bindings/vendor-prefixes.yaml | 2 +
> .../boot/dts/socfpga_arria10_mercury_aa1.dts | 2 +-
> arch/arm/boot/dts/socfpga_arria10_socdk.dtsi | 2 +-
> arch/arm/boot/dts/socfpga_arria5_socdk.dts | 2 +-
> .../boot/dts/altera/socfpga_stratix10.dtsi | 21 +++++----
> .../dts/altera/socfpga_stratix10_socdk.dts | 3 +-
> .../altera/socfpga_stratix10_socdk_nand.dts | 3 +-
> arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 2 +-
> .../boot/dts/intel/socfpga_agilex_socdk.dts | 1 +
> .../dts/intel/socfpga_agilex_socdk_nand.dts | 1 +
> .../boot/dts/intel/socfpga_n5x_socdk.dts | 1 +
> 18 files changed, 129 insertions(+), 94 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/arm/intel,socfpga.yaml
> delete mode 100644 Documentation/devicetree/bindings/clock/intc_stratix10.txt
> create mode 100644 Documentation/devicetree/bindings/clock/intel,stratix10.yaml
> delete mode 100644 Documentation/devicetree/bindings/mmc/img-dw-mshc.txt
> delete mode 100644 Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt
>
Applied for all SoCFPGA patches.
Thanks,
Dinh
^ permalink raw reply [flat|nested] 23+ messages in thread