From: Anup Patel <apatel@ventanamicro.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Atish Patra <atishp@atishpatra.org>,
Alistair Francis <Alistair.Francis@wdc.com>,
Anup Patel <anup@brainfault.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Anup Patel <apatel@ventanamicro.com>
Subject: [PATCH v2 0/6] RISC-V IPI Improvements
Date: Fri, 28 Jan 2022 10:54:59 +0530 [thread overview]
Message-ID: <20220128052505.859518-1-apatel@ventanamicro.com> (raw)
This series aims to improve IPI support in Linux RISC-V in following ways:
1) Treat IPIs as normal per-CPU interrupts instead of having custom RISC-V
specific hooks. This also makes Linux RISC-V IPI support aligned with
other architectures.
2) Remote TLB flushes and icache flushes should prefer local IPIs instead
of SBI calls whenever we have specialized hardware (such as RISC-V AIA
IMSIC and RISC-V ACLINT) which allows S-mode software to directly inject
IPIs without any assistance from M-mode runtime firmware.
These patches were already part of the "Linux RISC-V ACLINT Support" series
but this now a separate series so that it can be merged independently of
the "Linux RISC-V ACLINT Support" series.
(Refer, https://lore.kernel.org/lkml/20211007123632.697666-1-anup.patel@wdc.com/)
These patches are also a preparatory patches for the up-coming:
1) Linux RISC-V ACLINT support
2) Linux RISC-V AIA support
3) KVM RISC-V TLB flush improvements
These patches can also be found in riscv_ipi_imp_v2 branch at:
https://github.com/avpatel/linux.git
Changes since v1:
- Use synthetic fwnode for INTC instead of irq_set_default_host() in PATCH2
Anup Patel (6):
RISC-V: Clear SIP bit only when using SBI IPI operations
irqchip/riscv-intc: Create domain using named fwnode
RISC-V: Treat IPIs as normal Linux IRQs
RISC-V: Allow marking IPIs as suitable for remote FENCEs
RISC-V: Use IPIs for remote TLB flush when possible
RISC-V: Use IPIs for remote icache flush when possible
arch/riscv/Kconfig | 1 +
arch/riscv/include/asm/ipi-mux.h | 45 ++++++
arch/riscv/include/asm/irq.h | 2 +
arch/riscv/include/asm/sbi.h | 2 +
arch/riscv/include/asm/smp.h | 49 +++++--
arch/riscv/kernel/Makefile | 1 +
arch/riscv/kernel/cpu-hotplug.c | 3 +-
arch/riscv/kernel/ipi-mux.c | 223 ++++++++++++++++++++++++++++++
arch/riscv/kernel/irq.c | 16 ++-
arch/riscv/kernel/sbi.c | 18 ++-
arch/riscv/kernel/smp.c | 164 +++++++++++-----------
arch/riscv/kernel/smpboot.c | 5 +-
arch/riscv/mm/cacheflush.c | 5 +-
arch/riscv/mm/tlbflush.c | 93 +++++++++++--
drivers/clocksource/timer-clint.c | 21 ++-
drivers/clocksource/timer-riscv.c | 11 +-
drivers/irqchip/irq-riscv-intc.c | 67 ++++-----
drivers/irqchip/irq-sifive-plic.c | 19 +--
18 files changed, 563 insertions(+), 182 deletions(-)
create mode 100644 arch/riscv/include/asm/ipi-mux.h
create mode 100644 arch/riscv/kernel/ipi-mux.c
--
2.25.1
next reply other threads:[~2022-01-28 5:25 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-28 5:24 Anup Patel [this message]
2022-01-28 5:25 ` [PATCH v2 1/6] RISC-V: Clear SIP bit only when using SBI IPI operations Anup Patel
2022-01-28 5:25 ` [PATCH v2 2/6] irqchip/riscv-intc: Create domain using named fwnode Anup Patel
2022-02-17 15:12 ` Marc Zyngier
2022-02-19 3:38 ` Anup Patel
2022-02-19 9:32 ` Marc Zyngier
2022-02-19 13:03 ` Anup Patel
2022-02-21 9:07 ` Marc Zyngier
2022-02-21 9:38 ` Anup Patel
2022-02-19 14:51 ` Jessica Clarke
2022-02-21 9:25 ` Marc Zyngier
2022-02-21 9:44 ` Anup Patel
2022-01-28 5:25 ` [PATCH v2 3/6] RISC-V: Treat IPIs as normal Linux IRQs Anup Patel
2022-01-28 5:25 ` [PATCH v2 4/6] RISC-V: Allow marking IPIs as suitable for remote FENCEs Anup Patel
2022-01-28 5:25 ` [PATCH v2 5/6] RISC-V: Use IPIs for remote TLB flush when possible Anup Patel
2022-01-28 5:25 ` [PATCH v2 6/6] RISC-V: Use IPIs for remote icache " Anup Patel
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