* [PATCH 01/10] staging: r8188eu: set path a explicitly
2022-02-12 16:17 [PATCH 00/10] remove rf register access for path b Martin Kaiser
@ 2022-02-12 16:17 ` Martin Kaiser
2022-02-12 16:17 ` [PATCH 02/10] staging: r8188eu: write only path a registers in rtw_dbg_port Martin Kaiser
` (8 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Martin Kaiser @ 2022-02-12 16:17 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Larry Finger, Phillip Potter, Michael Straube, linux-staging,
linux-kernel, Martin Kaiser
We've already limited the rtw_wx_write_rf function to RF_PATH_A in commit
3b011b097c38 ("staging: r8188eu: limit rf register writes to path a").
Set RF_PATH_A explicitly when we call rtl8188e_PHY_SetRFReg. This will
make it easier later to verify that all callers of rtl8188e_PHY_SetRFReg
use path a.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
---
drivers/staging/r8188eu/os_dep/ioctl_linux.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/r8188eu/os_dep/ioctl_linux.c b/drivers/staging/r8188eu/os_dep/ioctl_linux.c
index c41d75666568..8c49df724461 100644
--- a/drivers/staging/r8188eu/os_dep/ioctl_linux.c
+++ b/drivers/staging/r8188eu/os_dep/ioctl_linux.c
@@ -2088,7 +2088,7 @@ static int rtw_wx_write_rf(struct net_device *dev,
addr = *((u32 *)extra + 1);
data32 = *((u32 *)extra + 2);
- rtl8188e_PHY_SetRFReg(padapter, path, addr, 0xFFFFF, data32);
+ rtl8188e_PHY_SetRFReg(padapter, RF_PATH_A, addr, 0xFFFFF, data32);
return 0;
}
--
2.30.2
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 02/10] staging: r8188eu: write only path a registers in rtw_dbg_port
2022-02-12 16:17 [PATCH 00/10] remove rf register access for path b Martin Kaiser
2022-02-12 16:17 ` [PATCH 01/10] staging: r8188eu: set path a explicitly Martin Kaiser
@ 2022-02-12 16:17 ` Martin Kaiser
2022-02-12 16:17 ` [PATCH 03/10] staging: r8188eu: remove path parameter from rtl8188e_PHY_SetRFReg Martin Kaiser
` (7 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Martin Kaiser @ 2022-02-12 16:17 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Larry Finger, Phillip Potter, Michael Straube, linux-staging,
linux-kernel, Martin Kaiser
Commit 3b011b097c38 ("staging: r8188eu: limit rf register writes to
path a") limited the rtw_wx_write_rf function to write only rf registers
for path a.
The private ioctl 0x0B invokes the rtw_dbg_port function. This ioctl
can also be used for writing rf registers. We should limit these register
writes to rf path a as well.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
---
drivers/staging/r8188eu/os_dep/ioctl_linux.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/r8188eu/os_dep/ioctl_linux.c b/drivers/staging/r8188eu/os_dep/ioctl_linux.c
index 8c49df724461..9d3488c28048 100644
--- a/drivers/staging/r8188eu/os_dep/ioctl_linux.c
+++ b/drivers/staging/r8188eu/os_dep/ioctl_linux.c
@@ -3621,7 +3621,11 @@ static int rtw_dbg_port(struct net_device *dev,
DBG_88E("read RF_reg path(0x%02x), offset(0x%x), value(0x%08x)\n", minor_cmd, arg, rtl8188e_PHY_QueryRFReg(padapter, minor_cmd, arg, 0xffffffff));
break;
case 0x75:/* write_rf */
- rtl8188e_PHY_SetRFReg(padapter, minor_cmd, arg, 0xffffffff, extra_arg);
+ if (minor_cmd != RF_PATH_A) {
+ ret = -EINVAL;
+ break;
+ }
+ rtl8188e_PHY_SetRFReg(padapter, RF_PATH_A, arg, 0xffffffff, extra_arg);
DBG_88E("write RF_reg path(0x%02x), offset(0x%x), value(0x%08x)\n", minor_cmd, arg, rtl8188e_PHY_QueryRFReg(padapter, minor_cmd, arg, 0xffffffff));
break;
--
2.30.2
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 03/10] staging: r8188eu: remove path parameter from rtl8188e_PHY_SetRFReg
2022-02-12 16:17 [PATCH 00/10] remove rf register access for path b Martin Kaiser
2022-02-12 16:17 ` [PATCH 01/10] staging: r8188eu: set path a explicitly Martin Kaiser
2022-02-12 16:17 ` [PATCH 02/10] staging: r8188eu: write only path a registers in rtw_dbg_port Martin Kaiser
@ 2022-02-12 16:17 ` Martin Kaiser
2022-02-12 16:17 ` [PATCH 04/10] staging: r8188eu: remove path parameter from phy_RFSerialWrite Martin Kaiser
` (6 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Martin Kaiser @ 2022-02-12 16:17 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Larry Finger, Phillip Potter, Michael Straube, linux-staging,
linux-kernel, Martin Kaiser
All callers of rtl8188e_PHY_SetRFReg set the eRFPath parameter
to RF_PATH_A. Remove the parameter and use RF_PATH_A directly.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
---
drivers/staging/r8188eu/hal/HalPhyRf_8188e.c | 28 +++++++++----------
drivers/staging/r8188eu/hal/odm.c | 2 +-
.../staging/r8188eu/hal/odm_RegConfig8188E.c | 2 +-
drivers/staging/r8188eu/hal/rtl8188e_phycfg.c | 8 ++----
drivers/staging/r8188eu/hal/rtl8188e_rf6052.c | 4 +--
.../staging/r8188eu/include/Hal8188EPhyCfg.h | 3 +-
drivers/staging/r8188eu/os_dep/ioctl_linux.c | 4 +--
7 files changed, 24 insertions(+), 27 deletions(-)
diff --git a/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c b/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c
index 8edae488d998..c7aed5ed5fa5 100644
--- a/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c
+++ b/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c
@@ -327,14 +327,14 @@ phy_PathA_RxIQK(struct adapter *adapt)
/* 1 Get TXIMR setting */
/* modify RXIQK mode table */
rtl8188e_PHY_SetBBReg(adapt, rFPGA0_IQK, bMaskDWord, 0x00000000);
- rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0);
- rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000);
- rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f);
- rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf117B);
+ rtl8188e_PHY_SetRFReg(adapt, RF_WE_LUT, bRFRegOffsetMask, 0x800a0);
+ rtl8188e_PHY_SetRFReg(adapt, RF_RCK_OS, bRFRegOffsetMask, 0x30000);
+ rtl8188e_PHY_SetRFReg(adapt, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f);
+ rtl8188e_PHY_SetRFReg(adapt, RF_TXPA_G2, bRFRegOffsetMask, 0xf117B);
/* PA,PAD off */
- rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x980);
- rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, 0x56, bRFRegOffsetMask, 0x51000);
+ rtl8188e_PHY_SetRFReg(adapt, 0xdf, bRFRegOffsetMask, 0x980);
+ rtl8188e_PHY_SetRFReg(adapt, 0x56, bRFRegOffsetMask, 0x51000);
rtl8188e_PHY_SetBBReg(adapt, rFPGA0_IQK, bMaskDWord, 0x80800000);
@@ -376,10 +376,10 @@ phy_PathA_RxIQK(struct adapter *adapt)
/* 1 RX IQK */
/* modify RXIQK mode table */
rtl8188e_PHY_SetBBReg(adapt, rFPGA0_IQK, bMaskDWord, 0x00000000);
- rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0);
- rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000);
- rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f);
- rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7ffa);
+ rtl8188e_PHY_SetRFReg(adapt, RF_WE_LUT, bRFRegOffsetMask, 0x800a0);
+ rtl8188e_PHY_SetRFReg(adapt, RF_RCK_OS, bRFRegOffsetMask, 0x30000);
+ rtl8188e_PHY_SetRFReg(adapt, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f);
+ rtl8188e_PHY_SetRFReg(adapt, RF_TXPA_G2, bRFRegOffsetMask, 0xf7ffa);
rtl8188e_PHY_SetBBReg(adapt, rFPGA0_IQK, bMaskDWord, 0x80800000);
/* IQK setting */
@@ -410,7 +410,7 @@ phy_PathA_RxIQK(struct adapter *adapt)
/* reload RF 0xdf */
rtl8188e_PHY_SetBBReg(adapt, rFPGA0_IQK, bMaskDWord, 0x00000000);
- rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x180);
+ rtl8188e_PHY_SetRFReg(adapt, 0xdf, bRFRegOffsetMask, 0x180);
if (!(regeac & BIT(27)) && /* if Tx is OK, check whether Rx is OK */
(((regEA4 & 0x03FF0000) >> 16) != 0x132) &&
@@ -763,14 +763,14 @@ static void phy_LCCalibrate_8188E(struct adapter *adapt)
/* 2. Set RF mode = standby mode */
/* Path-A */
- rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode & 0x8FFFF) | 0x10000);
+ rtl8188e_PHY_SetRFReg(adapt, RF_AC, bMask12Bits, (RF_Amode & 0x8FFFF) | 0x10000);
}
/* 3. Read RF reg18 */
LC_Cal = rtl8188e_PHY_QueryRFReg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits);
/* 4. Set LC calibration begin bit15 */
- rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal | 0x08000);
+ rtl8188e_PHY_SetRFReg(adapt, RF_CHNLBW, bMask12Bits, LC_Cal | 0x08000);
msleep(100);
@@ -779,7 +779,7 @@ static void phy_LCCalibrate_8188E(struct adapter *adapt)
/* Deal with continuous TX case */
/* Path-A */
rtw_write8(adapt, 0xd03, tmpreg);
- rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_AC, bMask12Bits, RF_Amode);
+ rtl8188e_PHY_SetRFReg(adapt, RF_AC, bMask12Bits, RF_Amode);
} else {
/* Deal with Packet TX case */
rtw_write8(adapt, REG_TXPAUSE, 0x00);
diff --git a/drivers/staging/r8188eu/hal/odm.c b/drivers/staging/r8188eu/hal/odm.c
index a759c2fe5d66..b4be706545ff 100644
--- a/drivers/staging/r8188eu/hal/odm.c
+++ b/drivers/staging/r8188eu/hal/odm.c
@@ -896,7 +896,7 @@ void ODM_TXPowerTrackingCheck(struct odm_dm_struct *pDM_Odm)
struct adapter *Adapter = pDM_Odm->Adapter;
if (!pDM_Odm->RFCalibrateInfo.TM_Trigger) { /* at least delay 1 sec */
- rtl8188e_PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03);
+ rtl8188e_PHY_SetRFReg(Adapter, RF_T_METER_88E, BIT(17) | BIT(16), 0x03);
pDM_Odm->RFCalibrateInfo.TM_Trigger = 1;
return;
diff --git a/drivers/staging/r8188eu/hal/odm_RegConfig8188E.c b/drivers/staging/r8188eu/hal/odm_RegConfig8188E.c
index 9059f2533b0b..0fa17a99f9e9 100644
--- a/drivers/staging/r8188eu/hal/odm_RegConfig8188E.c
+++ b/drivers/staging/r8188eu/hal/odm_RegConfig8188E.c
@@ -19,7 +19,7 @@ static void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr,
} else if (Addr == 0xf9) {
udelay(1);
} else {
- rtl8188e_PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RegAddr, bRFRegOffsetMask, Data);
+ rtl8188e_PHY_SetRFReg(pDM_Odm->Adapter, RegAddr, bRFRegOffsetMask, Data);
/* Add 1us delay between BB/RF register setting. */
udelay(1);
}
diff --git a/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c b/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
index cd82452238e0..628cec40db5f 100644
--- a/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
@@ -282,7 +282,6 @@ u32 rtl8188e_PHY_QueryRFReg(struct adapter *Adapter, enum rf_radio_path eRFPath,
*
* Input:
* struct adapter *Adapter,
-* enum rf_radio_path eRFPath, Radio path of A/B/C/D
* u32 RegAddr, The target address to be modified
* u32 BitMask The target bit position in the target address
* to be modified
@@ -296,7 +295,6 @@ u32 rtl8188e_PHY_QueryRFReg(struct adapter *Adapter, enum rf_radio_path eRFPath,
void
rtl8188e_PHY_SetRFReg(
struct adapter *Adapter,
- enum rf_radio_path eRFPath,
u32 RegAddr,
u32 BitMask,
u32 Data
@@ -306,12 +304,12 @@ rtl8188e_PHY_SetRFReg(
/* RF data is 12 bits only */
if (BitMask != bRFRegOffsetMask) {
- Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr);
+ Original_Value = phy_RFSerialRead(Adapter, RF_PATH_A, RegAddr);
BitShift = phy_CalculateBitShift(BitMask);
Data = ((Original_Value & (~BitMask)) | (Data << BitShift));
}
- phy_RFSerialWrite(Adapter, eRFPath, RegAddr, Data);
+ phy_RFSerialWrite(Adapter, RF_PATH_A, RegAddr, Data);
}
/* */
@@ -725,7 +723,7 @@ static void _PHY_SwChnl8192C(struct adapter *Adapter, u8 channel)
param1 = RF_CHNLBW;
param2 = channel;
pHalData->RfRegChnlVal = ((pHalData->RfRegChnlVal & 0xfffffc00) | param2);
- rtl8188e_PHY_SetRFReg(Adapter, RF_PATH_A, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal);
+ rtl8188e_PHY_SetRFReg(Adapter, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal);
}
void PHY_SwChnl8188E(struct adapter *Adapter, u8 channel)
diff --git a/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c b/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c
index 2d5d04b384d1..4a7a877e4017 100644
--- a/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c
+++ b/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c
@@ -51,11 +51,11 @@ void rtl8188e_PHY_RF6052SetBandwidth(struct adapter *Adapter,
switch (Bandwidth) {
case HT_CHANNEL_WIDTH_20:
pHalData->RfRegChnlVal = ((pHalData->RfRegChnlVal & 0xfffff3ff) | BIT(10) | BIT(11));
- rtl8188e_PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal);
+ rtl8188e_PHY_SetRFReg(Adapter, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal);
break;
case HT_CHANNEL_WIDTH_40:
pHalData->RfRegChnlVal = ((pHalData->RfRegChnlVal & 0xfffff3ff) | BIT(10));
- rtl8188e_PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal);
+ rtl8188e_PHY_SetRFReg(Adapter, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal);
break;
default:
break;
diff --git a/drivers/staging/r8188eu/include/Hal8188EPhyCfg.h b/drivers/staging/r8188eu/include/Hal8188EPhyCfg.h
index 2517a08bc95a..e0dff772534d 100644
--- a/drivers/staging/r8188eu/include/Hal8188EPhyCfg.h
+++ b/drivers/staging/r8188eu/include/Hal8188EPhyCfg.h
@@ -75,8 +75,7 @@ void rtl8188e_PHY_SetBBReg(struct adapter *Adapter, u32 RegAddr,
u32 mask, u32 data);
u32 rtl8188e_PHY_QueryRFReg(struct adapter *adapter, enum rf_radio_path rfpath,
u32 regaddr, u32 mask);
-void rtl8188e_PHY_SetRFReg(struct adapter *adapter, enum rf_radio_path rfpath,
- u32 regaddr, u32 mask, u32 data);
+void rtl8188e_PHY_SetRFReg(struct adapter *adapter, u32 regaddr, u32 mask, u32 data);
/* Initialization related function */
/* MAC/BB/RF HAL config */
diff --git a/drivers/staging/r8188eu/os_dep/ioctl_linux.c b/drivers/staging/r8188eu/os_dep/ioctl_linux.c
index 9d3488c28048..548ed6f965f8 100644
--- a/drivers/staging/r8188eu/os_dep/ioctl_linux.c
+++ b/drivers/staging/r8188eu/os_dep/ioctl_linux.c
@@ -2088,7 +2088,7 @@ static int rtw_wx_write_rf(struct net_device *dev,
addr = *((u32 *)extra + 1);
data32 = *((u32 *)extra + 2);
- rtl8188e_PHY_SetRFReg(padapter, RF_PATH_A, addr, 0xFFFFF, data32);
+ rtl8188e_PHY_SetRFReg(padapter, addr, 0xFFFFF, data32);
return 0;
}
@@ -3625,7 +3625,7 @@ static int rtw_dbg_port(struct net_device *dev,
ret = -EINVAL;
break;
}
- rtl8188e_PHY_SetRFReg(padapter, RF_PATH_A, arg, 0xffffffff, extra_arg);
+ rtl8188e_PHY_SetRFReg(padapter, arg, 0xffffffff, extra_arg);
DBG_88E("write RF_reg path(0x%02x), offset(0x%x), value(0x%08x)\n", minor_cmd, arg, rtl8188e_PHY_QueryRFReg(padapter, minor_cmd, arg, 0xffffffff));
break;
--
2.30.2
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 04/10] staging: r8188eu: remove path parameter from phy_RFSerialWrite
2022-02-12 16:17 [PATCH 00/10] remove rf register access for path b Martin Kaiser
` (2 preceding siblings ...)
2022-02-12 16:17 ` [PATCH 03/10] staging: r8188eu: remove path parameter from rtl8188e_PHY_SetRFReg Martin Kaiser
@ 2022-02-12 16:17 ` Martin Kaiser
2022-02-12 16:17 ` [PATCH 05/10] staging: r8188eu: clarify that bb_reg_dump uses only path a Martin Kaiser
` (5 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Martin Kaiser @ 2022-02-12 16:17 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Larry Finger, Phillip Potter, Michael Straube, linux-staging,
linux-kernel, Martin Kaiser
The only caller of phy_RFSerialWrite sets the eRFPath parameter
to RF_PATH_A. Remove the parameter and use RF_PATH_A directly.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
---
drivers/staging/r8188eu/hal/rtl8188e_phycfg.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c b/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
index 628cec40db5f..9e02855c47b2 100644
--- a/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
@@ -217,14 +217,13 @@ phy_RFSerialRead(
static void
phy_RFSerialWrite(
struct adapter *Adapter,
- enum rf_radio_path eRFPath,
u32 Offset,
u32 Data
)
{
u32 DataAndAddr = 0;
struct hal_data_8188e *pHalData = &Adapter->haldata;
- struct bb_reg_def *pPhyReg = &pHalData->PHYRegDef[eRFPath];
+ struct bb_reg_def *pPhyReg = &pHalData->PHYRegDef[RF_PATH_A];
u32 NewOffset;
/* 2009/06/17 MH We can not execute IO for power save or other accident mode. */
@@ -309,7 +308,7 @@ rtl8188e_PHY_SetRFReg(
Data = ((Original_Value & (~BitMask)) | (Data << BitShift));
}
- phy_RFSerialWrite(Adapter, RF_PATH_A, RegAddr, Data);
+ phy_RFSerialWrite(Adapter, RegAddr, Data);
}
/* */
--
2.30.2
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 05/10] staging: r8188eu: clarify that bb_reg_dump uses only path a
2022-02-12 16:17 [PATCH 00/10] remove rf register access for path b Martin Kaiser
` (3 preceding siblings ...)
2022-02-12 16:17 ` [PATCH 04/10] staging: r8188eu: remove path parameter from phy_RFSerialWrite Martin Kaiser
@ 2022-02-12 16:17 ` Martin Kaiser
2022-02-12 16:17 ` [PATCH 06/10] staging: r8188eu: limit rtw_wx_read_rf to " Martin Kaiser
` (4 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Martin Kaiser @ 2022-02-12 16:17 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Larry Finger, Phillip Potter, Michael Straube, linux-staging,
linux-kernel, Martin Kaiser
The path variable is always 0 in bb_reg_dump. Remove the path variable
and replace the constant 0 with RF_PATH_A to make it clearer that path
a is used.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
---
drivers/staging/r8188eu/os_dep/ioctl_linux.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/r8188eu/os_dep/ioctl_linux.c b/drivers/staging/r8188eu/os_dep/ioctl_linux.c
index 548ed6f965f8..e815ae223f53 100644
--- a/drivers/staging/r8188eu/os_dep/ioctl_linux.c
+++ b/drivers/staging/r8188eu/os_dep/ioctl_linux.c
@@ -3538,13 +3538,13 @@ static void bb_reg_dump(struct adapter *padapter)
static void rf_reg_dump(struct adapter *padapter)
{
- int i, j = 1, path = 0;
+ int i, j = 1;
u32 value;
pr_info("\n ======= RF REG =======\n");
- pr_info("\nRF_Path(%x)\n", path);
+ pr_info("\nRF_Path(%x)\n", RF_PATH_A);
for (i = 0; i < 0x100; i++) {
- value = rtl8188e_PHY_QueryRFReg(padapter, path, i, 0xffffffff);
+ value = rtl8188e_PHY_QueryRFReg(padapter, RF_PATH_A, i, 0xffffffff);
if (j % 4 == 1)
pr_info("0x%02x ", i);
pr_info(" 0x%08x ", value);
--
2.30.2
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 06/10] staging: r8188eu: limit rtw_wx_read_rf to path a
2022-02-12 16:17 [PATCH 00/10] remove rf register access for path b Martin Kaiser
` (4 preceding siblings ...)
2022-02-12 16:17 ` [PATCH 05/10] staging: r8188eu: clarify that bb_reg_dump uses only path a Martin Kaiser
@ 2022-02-12 16:17 ` Martin Kaiser
2022-02-12 16:17 ` [PATCH 07/10] staging: r8188eu: limit rtw_dbg_port " Martin Kaiser
` (3 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Martin Kaiser @ 2022-02-12 16:17 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Larry Finger, Phillip Potter, Michael Straube, linux-staging,
linux-kernel, Martin Kaiser
Commit 3b011b097c38 ("staging: r8188eu: limit rf register writes to
path a") limits rf register writes by private ioctls to RF_PATH_A.
Apart from private ioctls, the rest of the driver uses only path a.
This patch limits rf register reads by the private ioctl 0x0D, which
calls rtw_wx_read_rf, to path a.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
---
drivers/staging/r8188eu/os_dep/ioctl_linux.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/r8188eu/os_dep/ioctl_linux.c b/drivers/staging/r8188eu/os_dep/ioctl_linux.c
index e815ae223f53..30fdc8afcffe 100644
--- a/drivers/staging/r8188eu/os_dep/ioctl_linux.c
+++ b/drivers/staging/r8188eu/os_dep/ioctl_linux.c
@@ -2063,8 +2063,11 @@ static int rtw_wx_read_rf(struct net_device *dev,
u32 path, addr, data32;
path = *(u32 *)extra;
+ if (path != RF_PATH_A)
+ return -EINVAL;
+
addr = *((u32 *)extra + 1);
- data32 = rtl8188e_PHY_QueryRFReg(padapter, path, addr, 0xFFFFF);
+ data32 = rtl8188e_PHY_QueryRFReg(padapter, RF_PATH_A, addr, 0xFFFFF);
/*
* IMPORTANT!!
* Only when wireless private ioctl is at odd order,
@@ -3626,7 +3629,7 @@ static int rtw_dbg_port(struct net_device *dev,
break;
}
rtl8188e_PHY_SetRFReg(padapter, arg, 0xffffffff, extra_arg);
- DBG_88E("write RF_reg path(0x%02x), offset(0x%x), value(0x%08x)\n", minor_cmd, arg, rtl8188e_PHY_QueryRFReg(padapter, minor_cmd, arg, 0xffffffff));
+ DBG_88E("write RF_reg path(0x%02x), offset(0x%x), value(0x%08x)\n", RF_PATH_A, arg, rtl8188e_PHY_QueryRFReg(padapter, RF_PATH_A, arg, 0xffffffff));
break;
case 0x76:
--
2.30.2
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 07/10] staging: r8188eu: limit rtw_dbg_port to path a
2022-02-12 16:17 [PATCH 00/10] remove rf register access for path b Martin Kaiser
` (5 preceding siblings ...)
2022-02-12 16:17 ` [PATCH 06/10] staging: r8188eu: limit rtw_wx_read_rf to " Martin Kaiser
@ 2022-02-12 16:17 ` Martin Kaiser
2022-02-12 16:17 ` [PATCH 08/10] staging: r8188eu: remove path parameter from rtl8188e_PHY_QueryRFReg Martin Kaiser
` (2 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Martin Kaiser @ 2022-02-12 16:17 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Larry Finger, Phillip Potter, Michael Straube, linux-staging,
linux-kernel, Martin Kaiser
Rf registers can be read by rtw_wx_read_rf or via the private ioctl 0x0B.
The latter calls rtw_dbg_port. Limit rf register reads to path a in
rtw_debug_port.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
---
drivers/staging/r8188eu/os_dep/ioctl_linux.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/r8188eu/os_dep/ioctl_linux.c b/drivers/staging/r8188eu/os_dep/ioctl_linux.c
index 30fdc8afcffe..4b3134aef917 100644
--- a/drivers/staging/r8188eu/os_dep/ioctl_linux.c
+++ b/drivers/staging/r8188eu/os_dep/ioctl_linux.c
@@ -3621,7 +3621,11 @@ static int rtw_dbg_port(struct net_device *dev,
DBG_88E("write_bbreg(0x%x) = 0x%x\n", arg, rtl8188e_PHY_QueryBBReg(padapter, arg, 0xffffffff));
break;
case 0x74:/* read_rf */
- DBG_88E("read RF_reg path(0x%02x), offset(0x%x), value(0x%08x)\n", minor_cmd, arg, rtl8188e_PHY_QueryRFReg(padapter, minor_cmd, arg, 0xffffffff));
+ if (minor_cmd != RF_PATH_A) {
+ ret = -EINVAL;
+ break;
+ }
+ DBG_88E("read RF_reg path(0x%02x), offset(0x%x), value(0x%08x)\n", RF_PATH_A, arg, rtl8188e_PHY_QueryRFReg(padapter, RF_PATH_A, arg, 0xffffffff));
break;
case 0x75:/* write_rf */
if (minor_cmd != RF_PATH_A) {
--
2.30.2
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 08/10] staging: r8188eu: remove path parameter from rtl8188e_PHY_QueryRFReg
2022-02-12 16:17 [PATCH 00/10] remove rf register access for path b Martin Kaiser
` (6 preceding siblings ...)
2022-02-12 16:17 ` [PATCH 07/10] staging: r8188eu: limit rtw_dbg_port " Martin Kaiser
@ 2022-02-12 16:17 ` Martin Kaiser
2022-02-12 16:17 ` [PATCH 09/10] staging: r8188eu: remove path parameter from phy_RFSerialRead Martin Kaiser
2022-02-12 16:17 ` [PATCH 10/10] staging: r8188eu: we only need one struct bb_reg_def for path a Martin Kaiser
9 siblings, 0 replies; 11+ messages in thread
From: Martin Kaiser @ 2022-02-12 16:17 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Larry Finger, Phillip Potter, Michael Straube, linux-staging,
linux-kernel, Martin Kaiser
All callers of rtl8188e_PHY_QueryRFReg set the eRFPath parameter
to RF_PATH_A. Remove the parameter and use RF_PATH_A directly.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
---
drivers/staging/r8188eu/hal/HalPhyRf_8188e.c | 6 +++---
drivers/staging/r8188eu/hal/rtl8188e_phycfg.c | 6 ++----
drivers/staging/r8188eu/hal/usb_halinit.c | 2 +-
drivers/staging/r8188eu/include/Hal8188EPhyCfg.h | 3 +--
drivers/staging/r8188eu/os_dep/ioctl_linux.c | 8 ++++----
5 files changed, 11 insertions(+), 14 deletions(-)
diff --git a/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c b/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c
index c7aed5ed5fa5..0fcf094ae594 100644
--- a/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c
+++ b/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c
@@ -132,7 +132,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
/* <Kordan> RFCalibrateInfo.RegA24 will be initialized when ODM HW configuring, but MP configures with para files. */
dm_odm->RFCalibrateInfo.RegA24 = 0x090e1317;
- ThermalValue = (u8)rtl8188e_PHY_QueryRFReg(Adapter, RF_PATH_A, RF_T_METER_88E, 0xfc00); /* 0x42: RF Reg[15:10] 88E */
+ ThermalValue = (u8)rtl8188e_PHY_QueryRFReg(Adapter, RF_T_METER_88E, 0xfc00); /* 0x42: RF Reg[15:10] 88E */
if (ThermalValue) {
/* Query OFDM path A default setting */
@@ -759,7 +759,7 @@ static void phy_LCCalibrate_8188E(struct adapter *adapt)
if ((tmpreg & 0x70) != 0) {
/* 1. Read original RF mode */
/* Path-A */
- RF_Amode = rtl8188e_PHY_QueryRFReg(adapt, RF_PATH_A, RF_AC, bMask12Bits);
+ RF_Amode = rtl8188e_PHY_QueryRFReg(adapt, RF_AC, bMask12Bits);
/* 2. Set RF mode = standby mode */
/* Path-A */
@@ -767,7 +767,7 @@ static void phy_LCCalibrate_8188E(struct adapter *adapt)
}
/* 3. Read RF reg18 */
- LC_Cal = rtl8188e_PHY_QueryRFReg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits);
+ LC_Cal = rtl8188e_PHY_QueryRFReg(adapt, RF_CHNLBW, bMask12Bits);
/* 4. Set LC calibration begin bit15 */
rtl8188e_PHY_SetRFReg(adapt, RF_CHNLBW, bMask12Bits, LC_Cal | 0x08000);
diff --git a/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c b/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
index 9e02855c47b2..2dcd1df58aaa 100644
--- a/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
@@ -253,7 +253,6 @@ phy_RFSerialWrite(
*
* Input:
* struct adapter *Adapter,
-* enum rf_radio_path eRFPath, Radio path of A/B/C/D
* u32 RegAddr, The target address to be read
* u32 BitMask The target bit position in the target address
* to be read
@@ -262,12 +261,11 @@ phy_RFSerialWrite(
* Return: u32 Readback value
* Note: This function is equal to "GetRFRegSetting" in PHY programming guide
*/
-u32 rtl8188e_PHY_QueryRFReg(struct adapter *Adapter, enum rf_radio_path eRFPath,
- u32 RegAddr, u32 BitMask)
+u32 rtl8188e_PHY_QueryRFReg(struct adapter *Adapter, u32 RegAddr, u32 BitMask)
{
u32 Original_Value, Readback_Value, BitShift;
- Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr);
+ Original_Value = phy_RFSerialRead(Adapter, RF_PATH_A, RegAddr);
BitShift = phy_CalculateBitShift(BitMask);
Readback_Value = (Original_Value & BitMask) >> BitShift;
diff --git a/drivers/staging/r8188eu/hal/usb_halinit.c b/drivers/staging/r8188eu/hal/usb_halinit.c
index 1f2c736c3bc4..63e6337c2344 100644
--- a/drivers/staging/r8188eu/hal/usb_halinit.c
+++ b/drivers/staging/r8188eu/hal/usb_halinit.c
@@ -662,7 +662,7 @@ u32 rtl8188eu_hal_init(struct adapter *Adapter)
rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */
/* Keep RfRegChnlVal for later use. */
- haldata->RfRegChnlVal = rtl8188e_PHY_QueryRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask);
+ haldata->RfRegChnlVal = rtl8188e_PHY_QueryRFReg(Adapter, RF_CHNLBW, bRFRegOffsetMask);
_BBTurnOnBlock(Adapter);
diff --git a/drivers/staging/r8188eu/include/Hal8188EPhyCfg.h b/drivers/staging/r8188eu/include/Hal8188EPhyCfg.h
index e0dff772534d..9e6f2361b090 100644
--- a/drivers/staging/r8188eu/include/Hal8188EPhyCfg.h
+++ b/drivers/staging/r8188eu/include/Hal8188EPhyCfg.h
@@ -73,8 +73,7 @@ struct bb_reg_def {
u32 rtl8188e_PHY_QueryBBReg(struct adapter *adapter, u32 regaddr, u32 mask);
void rtl8188e_PHY_SetBBReg(struct adapter *Adapter, u32 RegAddr,
u32 mask, u32 data);
-u32 rtl8188e_PHY_QueryRFReg(struct adapter *adapter, enum rf_radio_path rfpath,
- u32 regaddr, u32 mask);
+u32 rtl8188e_PHY_QueryRFReg(struct adapter *adapter, u32 regaddr, u32 mask);
void rtl8188e_PHY_SetRFReg(struct adapter *adapter, u32 regaddr, u32 mask, u32 data);
/* Initialization related function */
diff --git a/drivers/staging/r8188eu/os_dep/ioctl_linux.c b/drivers/staging/r8188eu/os_dep/ioctl_linux.c
index 4b3134aef917..f6a683cda614 100644
--- a/drivers/staging/r8188eu/os_dep/ioctl_linux.c
+++ b/drivers/staging/r8188eu/os_dep/ioctl_linux.c
@@ -2067,7 +2067,7 @@ static int rtw_wx_read_rf(struct net_device *dev,
return -EINVAL;
addr = *((u32 *)extra + 1);
- data32 = rtl8188e_PHY_QueryRFReg(padapter, RF_PATH_A, addr, 0xFFFFF);
+ data32 = rtl8188e_PHY_QueryRFReg(padapter, addr, 0xFFFFF);
/*
* IMPORTANT!!
* Only when wireless private ioctl is at odd order,
@@ -3547,7 +3547,7 @@ static void rf_reg_dump(struct adapter *padapter)
pr_info("\n ======= RF REG =======\n");
pr_info("\nRF_Path(%x)\n", RF_PATH_A);
for (i = 0; i < 0x100; i++) {
- value = rtl8188e_PHY_QueryRFReg(padapter, RF_PATH_A, i, 0xffffffff);
+ value = rtl8188e_PHY_QueryRFReg(padapter, i, 0xffffffff);
if (j % 4 == 1)
pr_info("0x%02x ", i);
pr_info(" 0x%08x ", value);
@@ -3625,7 +3625,7 @@ static int rtw_dbg_port(struct net_device *dev,
ret = -EINVAL;
break;
}
- DBG_88E("read RF_reg path(0x%02x), offset(0x%x), value(0x%08x)\n", RF_PATH_A, arg, rtl8188e_PHY_QueryRFReg(padapter, RF_PATH_A, arg, 0xffffffff));
+ DBG_88E("read RF_reg path(0x%02x), offset(0x%x), value(0x%08x)\n", RF_PATH_A, arg, rtl8188e_PHY_QueryRFReg(padapter, arg, 0xffffffff));
break;
case 0x75:/* write_rf */
if (minor_cmd != RF_PATH_A) {
@@ -3633,7 +3633,7 @@ static int rtw_dbg_port(struct net_device *dev,
break;
}
rtl8188e_PHY_SetRFReg(padapter, arg, 0xffffffff, extra_arg);
- DBG_88E("write RF_reg path(0x%02x), offset(0x%x), value(0x%08x)\n", RF_PATH_A, arg, rtl8188e_PHY_QueryRFReg(padapter, RF_PATH_A, arg, 0xffffffff));
+ DBG_88E("write RF_reg path(0x%02x), offset(0x%x), value(0x%08x)\n", RF_PATH_A, arg, rtl8188e_PHY_QueryRFReg(padapter, arg, 0xffffffff));
break;
case 0x76:
--
2.30.2
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 09/10] staging: r8188eu: remove path parameter from phy_RFSerialRead
2022-02-12 16:17 [PATCH 00/10] remove rf register access for path b Martin Kaiser
` (7 preceding siblings ...)
2022-02-12 16:17 ` [PATCH 08/10] staging: r8188eu: remove path parameter from rtl8188e_PHY_QueryRFReg Martin Kaiser
@ 2022-02-12 16:17 ` Martin Kaiser
2022-02-12 16:17 ` [PATCH 10/10] staging: r8188eu: we only need one struct bb_reg_def for path a Martin Kaiser
9 siblings, 0 replies; 11+ messages in thread
From: Martin Kaiser @ 2022-02-12 16:17 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Larry Finger, Phillip Potter, Michael Straube, linux-staging,
linux-kernel, Martin Kaiser
All callers of phy_RFSerialRead set the eRFPath parameter to
RF_PATH_A. Remove the parameter and use RF_PATH_A directly.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
---
drivers/staging/r8188eu/hal/rtl8188e_phycfg.c | 18 +++++-------------
1 file changed, 5 insertions(+), 13 deletions(-)
diff --git a/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c b/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
index 2dcd1df58aaa..e2e4443b7414 100644
--- a/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
@@ -104,7 +104,6 @@ void rtl8188e_PHY_SetBBReg(struct adapter *Adapter, u32 RegAddr, u32 BitMask, u3
*
* Input:
* struct adapter *Adapter,
-* enum rf_radio_path eRFPath, Radio path of A/B/C/D
* u32 Offset, The target address to be read
*
* Output: None
@@ -119,13 +118,12 @@ void rtl8188e_PHY_SetBBReg(struct adapter *Adapter, u32 RegAddr, u32 BitMask, u3
static u32
phy_RFSerialRead(
struct adapter *Adapter,
- enum rf_radio_path eRFPath,
u32 Offset
)
{
u32 retValue = 0;
struct hal_data_8188e *pHalData = &Adapter->haldata;
- struct bb_reg_def *pPhyReg = &pHalData->PHYRegDef[eRFPath];
+ struct bb_reg_def *pPhyReg = &pHalData->PHYRegDef[RF_PATH_A];
u32 NewOffset;
u32 tmplong, tmplong2;
u8 RfPiEnable = 0;
@@ -143,10 +141,7 @@ phy_RFSerialRead(
/* For RF A/B write 0x824/82c(does not work in the future) */
/* We must use 0x824 for RF A and B to execute read trigger */
tmplong = rtl8188e_PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord);
- if (eRFPath == RF_PATH_A)
- tmplong2 = tmplong;
- else
- tmplong2 = rtl8188e_PHY_QueryBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord);
+ tmplong2 = tmplong;
tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset << 23) | bLSSIReadEdge; /* T65 RF */
@@ -158,10 +153,7 @@ phy_RFSerialRead(
udelay(10);/* PlatformStallExecution(10); */
- if (eRFPath == RF_PATH_A)
- RfPiEnable = (u8)rtl8188e_PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1, BIT(8));
- else if (eRFPath == RF_PATH_B)
- RfPiEnable = (u8)rtl8188e_PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1, BIT(8));
+ RfPiEnable = (u8)rtl8188e_PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1, BIT(8));
if (RfPiEnable) { /* Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF */
retValue = rtl8188e_PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi, bLSSIReadBackData);
@@ -265,7 +257,7 @@ u32 rtl8188e_PHY_QueryRFReg(struct adapter *Adapter, u32 RegAddr, u32 BitMask)
{
u32 Original_Value, Readback_Value, BitShift;
- Original_Value = phy_RFSerialRead(Adapter, RF_PATH_A, RegAddr);
+ Original_Value = phy_RFSerialRead(Adapter, RegAddr);
BitShift = phy_CalculateBitShift(BitMask);
Readback_Value = (Original_Value & BitMask) >> BitShift;
@@ -301,7 +293,7 @@ rtl8188e_PHY_SetRFReg(
/* RF data is 12 bits only */
if (BitMask != bRFRegOffsetMask) {
- Original_Value = phy_RFSerialRead(Adapter, RF_PATH_A, RegAddr);
+ Original_Value = phy_RFSerialRead(Adapter, RegAddr);
BitShift = phy_CalculateBitShift(BitMask);
Data = ((Original_Value & (~BitMask)) | (Data << BitShift));
}
--
2.30.2
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 10/10] staging: r8188eu: we only need one struct bb_reg_def for path a
2022-02-12 16:17 [PATCH 00/10] remove rf register access for path b Martin Kaiser
` (8 preceding siblings ...)
2022-02-12 16:17 ` [PATCH 09/10] staging: r8188eu: remove path parameter from phy_RFSerialRead Martin Kaiser
@ 2022-02-12 16:17 ` Martin Kaiser
9 siblings, 0 replies; 11+ messages in thread
From: Martin Kaiser @ 2022-02-12 16:17 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Larry Finger, Phillip Potter, Michael Straube, linux-staging,
linux-kernel, Martin Kaiser
The r8188eu driver does no longer access rf path b registers via
PHYRegDef.
Change the PHYRegDef array in struct hal_data_8188e to a single
variable that holds the register addresses for rf path a. Remove
the initialisation of path b register addresses.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
---
drivers/staging/r8188eu/hal/rtl8188e_phycfg.c | 58 +++++++------------
drivers/staging/r8188eu/hal/rtl8188e_rf6052.c | 2 +-
.../staging/r8188eu/include/rtl8188e_hal.h | 2 +-
3 files changed, 22 insertions(+), 40 deletions(-)
diff --git a/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c b/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
index e2e4443b7414..b0e5b9f6a005 100644
--- a/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
@@ -123,7 +123,7 @@ phy_RFSerialRead(
{
u32 retValue = 0;
struct hal_data_8188e *pHalData = &Adapter->haldata;
- struct bb_reg_def *pPhyReg = &pHalData->PHYRegDef[RF_PATH_A];
+ struct bb_reg_def *pPhyReg = &pHalData->PHYRegDef;
u32 NewOffset;
u32 tmplong, tmplong2;
u8 RfPiEnable = 0;
@@ -215,7 +215,7 @@ phy_RFSerialWrite(
{
u32 DataAndAddr = 0;
struct hal_data_8188e *pHalData = &Adapter->haldata;
- struct bb_reg_def *pPhyReg = &pHalData->PHYRegDef[RF_PATH_A];
+ struct bb_reg_def *pPhyReg = &pHalData->PHYRegDef;
u32 NewOffset;
/* 2009/06/17 MH We can not execute IO for power save or other accident mode. */
@@ -358,76 +358,58 @@ phy_InitBBRFRegisterDefinition(
struct hal_data_8188e *pHalData = &Adapter->haldata;
/* RF Interface Sowrtware Control */
- pHalData->PHYRegDef[RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 LSBs if read 32-bit from 0x870 */
- pHalData->PHYRegDef[RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872) */
+ pHalData->PHYRegDef.rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 LSBs if read 32-bit from 0x870 */
/* RF Interface Readback Value */
- pHalData->PHYRegDef[RF_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB; /* 16 LSBs if read 32-bit from 0x8E0 */
- pHalData->PHYRegDef[RF_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB;/* 16 MSBs if read 32-bit from 0x8E0 (16-bit for 0x8E2) */
+ pHalData->PHYRegDef.rfintfi = rFPGA0_XAB_RFInterfaceRB; /* 16 LSBs if read 32-bit from 0x8E0 */
/* RF Interface Output (and Enable) */
- pHalData->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; /* 16 LSBs if read 32-bit from 0x860 */
- pHalData->PHYRegDef[RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; /* 16 LSBs if read 32-bit from 0x864 */
+ pHalData->PHYRegDef.rfintfo = rFPGA0_XA_RFInterfaceOE; /* 16 LSBs if read 32-bit from 0x860 */
/* RF Interface (Output and) Enable */
- pHalData->PHYRegDef[RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; /* 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) */
- pHalData->PHYRegDef[RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; /* 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866) */
+ pHalData->PHYRegDef.rfintfe = rFPGA0_XA_RFInterfaceOE; /* 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) */
/* Addr of LSSI. Wirte RF register by driver */
- pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; /* LSSI Parameter */
- pHalData->PHYRegDef[RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter;
+ pHalData->PHYRegDef.rf3wireOffset = rFPGA0_XA_LSSIParameter; /* LSSI Parameter */
/* RF parameter */
- pHalData->PHYRegDef[RF_PATH_A].rfLSSI_Select = rFPGA0_XAB_RFParameter; /* BB Band Select */
- pHalData->PHYRegDef[RF_PATH_B].rfLSSI_Select = rFPGA0_XAB_RFParameter;
+ pHalData->PHYRegDef.rfLSSI_Select = rFPGA0_XAB_RFParameter; /* BB Band Select */
/* Tx AGC Gain Stage (same for all path. Should we remove this?) */
- pHalData->PHYRegDef[RF_PATH_A].rfTxGainStage = rFPGA0_TxGainStage; /* Tx gain stage */
- pHalData->PHYRegDef[RF_PATH_B].rfTxGainStage = rFPGA0_TxGainStage; /* Tx gain stage */
+ pHalData->PHYRegDef.rfTxGainStage = rFPGA0_TxGainStage; /* Tx gain stage */
/* Tranceiver A~D HSSI Parameter-1 */
- pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; /* wire control parameter1 */
- pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1; /* wire control parameter1 */
+ pHalData->PHYRegDef.rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; /* wire control parameter1 */
/* Tranceiver A~D HSSI Parameter-2 */
- pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; /* wire control parameter2 */
- pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; /* wire control parameter2 */
+ pHalData->PHYRegDef.rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; /* wire control parameter2 */
/* RF switch Control */
- pHalData->PHYRegDef[RF_PATH_A].rfSwitchControl = rFPGA0_XAB_SwitchControl; /* TR/Ant switch control */
- pHalData->PHYRegDef[RF_PATH_B].rfSwitchControl = rFPGA0_XAB_SwitchControl;
+ pHalData->PHYRegDef.rfSwitchControl = rFPGA0_XAB_SwitchControl; /* TR/Ant switch control */
/* AGC control 1 */
- pHalData->PHYRegDef[RF_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1;
- pHalData->PHYRegDef[RF_PATH_B].rfAGCControl1 = rOFDM0_XBAGCCore1;
+ pHalData->PHYRegDef.rfAGCControl1 = rOFDM0_XAAGCCore1;
/* AGC control 2 */
- pHalData->PHYRegDef[RF_PATH_A].rfAGCControl2 = rOFDM0_XAAGCCore2;
- pHalData->PHYRegDef[RF_PATH_B].rfAGCControl2 = rOFDM0_XBAGCCore2;
+ pHalData->PHYRegDef.rfAGCControl2 = rOFDM0_XAAGCCore2;
/* RX AFE control 1 */
- pHalData->PHYRegDef[RF_PATH_A].rfRxIQImbalance = rOFDM0_XARxIQImbalance;
- pHalData->PHYRegDef[RF_PATH_B].rfRxIQImbalance = rOFDM0_XBRxIQImbalance;
+ pHalData->PHYRegDef.rfRxIQImbalance = rOFDM0_XARxIQImbalance;
/* RX AFE control 1 */
- pHalData->PHYRegDef[RF_PATH_A].rfRxAFE = rOFDM0_XARxAFE;
- pHalData->PHYRegDef[RF_PATH_B].rfRxAFE = rOFDM0_XBRxAFE;
+ pHalData->PHYRegDef.rfRxAFE = rOFDM0_XARxAFE;
/* Tx AFE control 1 */
- pHalData->PHYRegDef[RF_PATH_A].rfTxIQImbalance = rOFDM0_XATxIQImbalance;
- pHalData->PHYRegDef[RF_PATH_B].rfTxIQImbalance = rOFDM0_XBTxIQImbalance;
+ pHalData->PHYRegDef.rfTxIQImbalance = rOFDM0_XATxIQImbalance;
/* Tx AFE control 2 */
- pHalData->PHYRegDef[RF_PATH_A].rfTxAFE = rOFDM0_XATxAFE;
- pHalData->PHYRegDef[RF_PATH_B].rfTxAFE = rOFDM0_XBTxAFE;
+ pHalData->PHYRegDef.rfTxAFE = rOFDM0_XATxAFE;
/* Tranceiver LSSI Readback SI mode */
- pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack;
- pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack;
+ pHalData->PHYRegDef.rfLSSIReadBack = rFPGA0_XA_LSSIReadBack;
/* Tranceiver LSSI Readback PI mode */
- pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback;
- pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback;
+ pHalData->PHYRegDef.rfLSSIReadBackPi = TransceiverA_HSPI_Readback;
}
void storePwrIndexDiffRateOffset(struct adapter *Adapter, u32 RegAddr, u32 BitMask, u32 Data)
diff --git a/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c b/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c
index 4a7a877e4017..d043b7bc4142 100644
--- a/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c
+++ b/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c
@@ -375,7 +375,7 @@ static int phy_RF6052_Config_ParaFile(struct adapter *Adapter)
/* Initialize RF */
- pPhyReg = &pHalData->PHYRegDef[0];
+ pPhyReg = &pHalData->PHYRegDef;
/*----Store original RFENV control type----*/
u4RegValue = rtl8188e_PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV);
diff --git a/drivers/staging/r8188eu/include/rtl8188e_hal.h b/drivers/staging/r8188eu/include/rtl8188e_hal.h
index 5b27bae97e91..44321a53a345 100644
--- a/drivers/staging/r8188eu/include/rtl8188e_hal.h
+++ b/drivers/staging/r8188eu/include/rtl8188e_hal.h
@@ -141,7 +141,7 @@ struct hal_data_8188e {
u32 AcParam_BE; /* Original parameter for BE, use for EDCA turbo. */
- struct bb_reg_def PHYRegDef[2]; /* Radio A/B */
+ struct bb_reg_def PHYRegDef;
u32 RfRegChnlVal;
--
2.30.2
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