From: Pratyush Yadav <p.yadav@ti.com>
To: Michael Walle <michael@walle.cc>
Cc: <linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
Tudor Ambarus <tudor.ambarus@microchip.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>
Subject: Re: [PATCH v1 07/14] mtd: spi-nor: move all micron-st specifics into micron-st.c
Date: Wed, 16 Feb 2022 00:43:18 +0530 [thread overview]
Message-ID: <20220215191318.a3dzc26dazgd6i4k@ti.com> (raw)
In-Reply-To: <20220202145853.4187726-8-michael@walle.cc>
On 02/02/22 03:58PM, Michael Walle wrote:
> The flag status register is only available on micron flashes. Move all
> the functions around that into the micron module.
>
> This is almost a mechanical move except for the spi_nor_fsr_ready()
> which now also checks the normal status register. Previously, this was
> done in spi_nor_ready().
>
> Signed-off-by: Michael Walle <michael@walle.cc>
> ---
> drivers/mtd/spi-nor/core.c | 123 +-----------------------------
> drivers/mtd/spi-nor/micron-st.c | 129 ++++++++++++++++++++++++++++++++
> include/linux/mtd/spi-nor.h | 8 --
> 3 files changed, 130 insertions(+), 130 deletions(-)
>
[...]
> diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c
> index bb95b1aabf74..c66580e8aa00 100644
> --- a/drivers/mtd/spi-nor/micron-st.c
> +++ b/drivers/mtd/spi-nor/micron-st.c
> @@ -8,6 +8,8 @@
>
> #include "core.h"
>
> +#define SPINOR_OP_RDFSR 0x70 /* Read flag status register */
> +#define SPINOR_OP_CLFSR 0x50 /* Clear flag status register */
> #define SPINOR_OP_MT_DTR_RD 0xfd /* Fast Read opcode in DTR mode */
> #define SPINOR_OP_MT_RD_ANY_REG 0x85 /* Read volatile register */
> #define SPINOR_OP_MT_WR_ANY_REG 0x81 /* Write volatile register */
> @@ -17,6 +19,12 @@
> #define SPINOR_MT_OCT_DTR 0xe7 /* Enable Octal DTR. */
> #define SPINOR_MT_EXSPI 0xff /* Enable Extended SPI (default) */
>
> +/* Flag Status Register bits */
> +#define FSR_READY BIT(7) /* Device status, 0 = Busy, 1 = Ready */
> +#define FSR_E_ERR BIT(5) /* Erase operation status */
> +#define FSR_P_ERR BIT(4) /* Program operation status */
> +#define FSR_PT_ERR BIT(1) /* Protection error bit */
> +
> static int spi_nor_micron_octal_dtr_enable(struct spi_nor *nor, bool enable)
> {
> struct spi_mem_op op;
> @@ -273,12 +281,133 @@ static int st_micron_set_4byte_addr_mode(struct spi_nor *nor, bool enable)
> return spi_nor_write_disable(nor);
> }
>
> +/**
> + * spi_nor_read_fsr() - Read the Flag Status Register.
> + * @nor: pointer to 'struct spi_nor'
> + * @fsr: pointer to a DMA-able buffer where the value of the
> + * Flag Status Register will be written. Should be at least 2
> + * bytes.
> + *
> + * Return: 0 on success, -errno otherwise.
> + */
> +static int spi_nor_read_fsr(struct spi_nor *nor, u8 *fsr)
> +{
> + int ret;
> +
> + if (nor->spimem) {
> + struct spi_mem_op op =
> + SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDFSR, 0),
> + SPI_MEM_OP_NO_ADDR,
> + SPI_MEM_OP_NO_DUMMY,
> + SPI_MEM_OP_DATA_IN(1, fsr, 0));
> +
> + if (nor->reg_proto == SNOR_PROTO_8_8_8_DTR) {
> + op.addr.nbytes = nor->params->rdsr_addr_nbytes;
> + op.dummy.nbytes = nor->params->rdsr_dummy;
> + /*
> + * We don't want to read only one byte in DTR mode. So,
> + * read 2 and then discard the second byte.
> + */
> + op.data.nbytes = 2;
> + }
> +
> + spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
> +
> + ret = spi_mem_exec_op(nor->spimem, &op);
> + } else {
> + ret = spi_nor_controller_ops_read_reg(nor, SPINOR_OP_RDFSR, fsr,
> + 1);
> + }
> +
> + if (ret)
> + dev_dbg(nor->dev, "error %d reading FSR\n", ret);
> +
> + return ret;
> +}
> +
> +/**
> + * spi_nor_clear_fsr() - Clear the Flag Status Register.
> + * @nor: pointer to 'struct spi_nor'.
> + */
> +static void spi_nor_clear_fsr(struct spi_nor *nor)
> +{
> + int ret;
> +
> + if (nor->spimem) {
> + struct spi_mem_op op =
> + SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_CLFSR, 0),
> + SPI_MEM_OP_NO_ADDR,
> + SPI_MEM_OP_NO_DUMMY,
> + SPI_MEM_OP_NO_DATA);
> +
> + spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
> +
> + ret = spi_mem_exec_op(nor->spimem, &op);
> + } else {
> + ret = spi_nor_controller_ops_write_reg(nor, SPINOR_OP_CLFSR,
> + NULL, 0);
> + }
> +
> + if (ret)
> + dev_dbg(nor->dev, "error %d clearing FSR\n", ret);
> +}
> +
> +/**
> + * spi_nor_fsr_ready() - Query the Flag Status Register to see if the flash is
> + * ready for new commands.
> + * @nor: pointer to 'struct spi_nor'.
> + *
> + * Return: 1 if ready, 0 if not ready, -errno on errors.
> + */
> +static int spi_nor_fsr_ready(struct spi_nor *nor)
Nitpick: At this point this function is not just spi_nor_fsr_ready(). I
think it should be renamed to something more accurate like
micron_st_ready() (with whatever prefix scheme that was decided upon).
Looks good otherwise.
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
--
Regards,
Pratyush Yadav
Texas Instruments Inc.
next prev parent reply other threads:[~2022-02-15 19:14 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-02 14:58 [PATCH v1 00/14] mtd: spi-nor: move vendor specific code into vendor modules Michael Walle
2022-02-02 14:58 ` [PATCH v1 01/14] mtd: spi-nor: export more function to be used in " Michael Walle
2022-02-10 3:13 ` Tudor.Ambarus
2022-02-15 18:30 ` Pratyush Yadav
2022-02-02 14:58 ` [PATCH v1 02/14] mtd: spi-nor: slightly refactor the spi_nor_setup() Michael Walle
2022-02-10 3:00 ` Tudor.Ambarus
2022-02-10 8:01 ` Michael Walle
2022-02-10 8:05 ` Tudor.Ambarus
2022-02-15 18:32 ` Pratyush Yadav
2022-02-02 14:58 ` [PATCH v1 03/14] mtd: spi-nor: allow a flash to define its own ready() function Michael Walle
2022-02-10 3:05 ` Tudor.Ambarus
2022-02-15 18:36 ` Pratyush Yadav
2022-02-02 14:58 ` [PATCH v1 04/14] mtd: spi-nor: move all xilinx specifics into xilinx.c Michael Walle
2022-02-10 3:04 ` Tudor.Ambarus
2022-02-15 18:57 ` Pratyush Yadav
2022-02-02 14:58 ` [PATCH v1 05/14] mtd: spi-nor: xilinx: rename vendor specific functions and defines Michael Walle
2022-02-02 17:14 ` kernel test robot
2022-02-02 20:07 ` kernel test robot
2022-02-10 3:08 ` Tudor.Ambarus
2022-02-10 8:04 ` Michael Walle
2022-02-10 8:06 ` Tudor.Ambarus
2022-02-15 8:25 ` Michael Walle
2022-02-15 8:52 ` Tudor.Ambarus
2022-02-15 9:58 ` Michael Walle
2022-02-15 10:12 ` Tudor.Ambarus
2022-02-15 19:04 ` Pratyush Yadav
2022-02-02 14:58 ` [PATCH v1 06/14] mtd: spi-nor: xilinx: correct the debug message Michael Walle
2022-02-10 3:11 ` Tudor.Ambarus
2022-02-15 19:05 ` Pratyush Yadav
2022-02-02 14:58 ` [PATCH v1 07/14] mtd: spi-nor: move all micron-st specifics into micron-st.c Michael Walle
2022-02-10 3:18 ` Tudor.Ambarus
2022-02-15 19:13 ` Pratyush Yadav [this message]
2022-02-02 14:58 ` [PATCH v1 08/14] mtd: spi-nor: micron-st: convert USE_FSR to a manufacturer flag Michael Walle
2022-02-10 3:37 ` Tudor.Ambarus
2022-02-15 19:16 ` Pratyush Yadav
2022-02-02 14:58 ` [PATCH v1 09/14] mtd: spi-nor: micron-st: fix micron_st prefix Michael Walle
2022-02-10 3:23 ` Tudor.Ambarus
2022-02-15 19:16 ` Pratyush Yadav
2022-02-02 14:58 ` [PATCH v1 10/14] mtd: spi-nor: micron-st: rename vendor specific functions and defines Michael Walle
2022-02-10 3:23 ` Tudor.Ambarus
2022-02-02 14:58 ` [PATCH v1 11/14] mtd: spi-nor: spansion: slightly rework control flow in late_init() Michael Walle
2022-02-10 3:26 ` Tudor.Ambarus
2022-02-10 8:16 ` Michael Walle
2022-02-10 8:42 ` Tudor.Ambarus
2022-02-14 18:59 ` Pratyush Yadav
2022-02-02 14:58 ` [PATCH v1 12/14] mtd: spi-nor: move all spansion specifics into spansion.c Michael Walle
2022-02-02 18:15 ` kernel test robot
2022-02-02 20:07 ` kernel test robot
2022-02-02 21:38 ` [RFC PATCH] mtd: spi-nor: spi_nor_sr_ready_and_clear() can be static kernel test robot
2022-02-02 21:48 ` [PATCH v1 12/14] mtd: spi-nor: move all spansion specifics into spansion.c kernel test robot
2022-02-10 3:32 ` Tudor.Ambarus
2022-02-15 19:23 ` Pratyush Yadav
2022-02-02 14:58 ` [PATCH v1 13/14] mtd: spi-nor: spansion: convert USE_CLSR to a manufacturer flag Michael Walle
2022-02-10 3:34 ` Tudor.Ambarus
2022-02-15 19:25 ` Pratyush Yadav
2022-02-02 14:58 ` [PATCH v1 14/14] mtd: spi-nor: renumber flags Michael Walle
2022-02-10 3:38 ` Tudor.Ambarus
2022-02-15 19:27 ` Pratyush Yadav
2022-02-10 3:42 ` [PATCH v1 00/14] mtd: spi-nor: move vendor specific code into vendor modules Tudor.Ambarus
2022-02-17 7:31 ` Tudor.Ambarus
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