From: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-media@vger.kernel.org
Cc: "Rob Herring" <robh+dt@kernel.org>,
"Chen-Yu Tsai" <wens@csie.org>,
"Jernej Skrabec" <jernej.skrabec@gmail.com>,
"Samuel Holland" <samuel@sholland.org>,
"Michael Turquette" <mturquette@baylibre.com>,
"Stephen Boyd" <sboyd@kernel.org>,
"Frank Rowand" <frowand.list@gmail.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Laurent Pinchart" <laurent.pinchart@ideasonboard.com>,
"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
"Kévin L'hôpital" <kevin.lhopital@bootlin.com>,
"Paul Kocialkowski" <paul.kocialkowski@bootlin.com>
Subject: [PATCH NOT FOR MERGE v3 8/8] ARM: dts: sun8i: a83t: bananapi-m3: Enable MIPI CSI-2 with OV8865
Date: Wed, 2 Mar 2022 22:11:00 +0100 [thread overview]
Message-ID: <20220302211100.65264-9-paul.kocialkowski@bootlin.com> (raw)
In-Reply-To: <20220302211100.65264-1-paul.kocialkowski@bootlin.com>
From: Kévin L'hôpital <kevin.lhopital@bootlin.com>
The Bananapi M3 supports a camera module which includes an OV8865 sensor
connected via the parallel CSI interface and an OV8865 sensor connected
via MIPI CSI-2.
The I2C2 bus is shared by the two sensors as well as the (active-low)
reset signal, but each sensor has it own shutdown line.
Signed-off-by: Kévin L'hôpital <kevin.lhopital@bootlin.com>
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
---
arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 102 +++++++++++++++++++
1 file changed, 102 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
index 5a7e1bd5f825..80fd99cf24b2 100644
--- a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
@@ -85,6 +85,30 @@ led-1 {
};
};
+ reg_ov8865_avdd: ov8865-avdd {
+ compatible = "regulator-fixed";
+ regulator-name = "ov8865-avdd";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ vin-supply = <®_dldo4>;
+ };
+
+ reg_ov8865_dovdd: ov8865-dovdd {
+ compatible = "regulator-fixed";
+ regulator-name = "ov8865-dovdd";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ vin-supply = <®_dldo4>;
+ };
+
+ reg_ov8865_dvdd: ov8865-dvdd {
+ compatible = "regulator-fixed";
+ regulator-name = "ov8865-dvdd";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ vin-supply = <®_eldo1>;
+ };
+
reg_usb1_vbus: reg-usb1-vbus {
compatible = "regulator-fixed";
regulator-name = "usb1-vbus";
@@ -115,6 +139,23 @@ &cpu100 {
cpu-supply = <®_dcdc3>;
};
+&csi {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@1 {
+ reg = <1>;
+
+ csi_in_mipi_csi2: endpoint {
+ remote-endpoint = <&mipi_csi2_out_csi>;
+ };
+ };
+ };
+};
+
&de {
status = "okay";
};
@@ -147,6 +188,36 @@ hdmi_out_con: endpoint {
};
};
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pe_pins>;
+ status = "okay";
+
+ ov8865: camera@36 {
+ compatible = "ovti,ov8865";
+ reg = <0x36>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&csi_mclk_pin>;
+ clocks = <&ccu CLK_CSI_MCLK>;
+ assigned-clocks = <&ccu CLK_CSI_MCLK>;
+ assigned-clock-rates = <24000000>;
+ avdd-supply = <®_ov8865_avdd>;
+ dovdd-supply = <®_ov8865_dovdd>;
+ dvdd-supply = <®_ov8865_dvdd>;
+ powerdown-gpios = <&pio 4 17 GPIO_ACTIVE_LOW>; /* PE17 */
+ reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */
+
+ port {
+ ov8865_out_mipi_csi2: endpoint {
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <360000000>;
+
+ remote-endpoint = <&mipi_csi2_in_ov8865>;
+ };
+ };
+ };
+};
+
&mdio {
rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
@@ -154,6 +225,24 @@ rgmii_phy: ethernet-phy@1 {
};
};
+&mipi_csi2 {
+ status = "okay";
+};
+
+&mipi_csi2_in {
+ mipi_csi2_in_ov8865: endpoint {
+ data-lanes = <1 2 3 4>;
+
+ remote-endpoint = <&ov8865_out_mipi_csi2>;
+ };
+};
+
+&mipi_csi2_out {
+ mipi_csi2_out_csi: endpoint {
+ remote-endpoint = <&csi_in_mipi_csi2>;
+ };
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
@@ -327,11 +416,24 @@ ®_dldo3 {
regulator-name = "vcc-pd";
};
+®_dldo4 {
+ regulator-always-on;
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "avdd-csi";
+};
+
®_drivevbus {
regulator-name = "usb0-vbus";
status = "okay";
};
+®_eldo1 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "dvdd-csi-r";
+};
+
®_fldo1 {
regulator-min-microvolt = <1080000>;
regulator-max-microvolt = <1320000>;
--
2.35.1
prev parent reply other threads:[~2022-03-02 21:11 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-02 21:10 [PATCH v3 0/8] Allwinner A31/A83T MIPI CSI-2 and A31 ISP / Platform Support Paul Kocialkowski
2022-03-02 21:10 ` [PATCH RFC v3 1/8] of: Mark interconnects property supplier as optional Paul Kocialkowski
2022-03-07 23:21 ` Rob Herring
2022-03-08 3:34 ` Saravana Kannan
2022-07-27 12:06 ` Maxime Ripard
2022-07-27 16:06 ` Saravana Kannan
2022-07-27 17:17 ` Paul Kocialkowski
2022-07-27 18:07 ` Saravana Kannan
2022-03-02 21:10 ` [PATCH v3 2/8] dt-bindings: interconnect: sunxi: Add V3s mbus compatible Paul Kocialkowski
2022-03-07 23:21 ` Rob Herring
2022-04-10 3:51 ` Samuel Holland
2022-03-02 21:10 ` [PATCH v3 3/8] clk: sunxi-ng: v3s: Export MBUS and DRAM clocks to the public header Paul Kocialkowski
2022-04-10 3:51 ` Samuel Holland
2022-03-02 21:10 ` [PATCH v3 4/8] ARM: dts: sun8i: v3s: Add mbus node to represent the interconnect Paul Kocialkowski
2022-04-10 3:51 ` Samuel Holland
2022-03-02 21:10 ` [PATCH v3 5/8] ARM: dts: sun8i: v3s: Add nodes for MIPI CSI-2 support Paul Kocialkowski
2022-03-02 21:10 ` [PATCH v3 6/8] ARM: dts: sun8i: v3s: Add support for the ISP Paul Kocialkowski
2022-03-02 21:10 ` [PATCH v3 7/8] ARM: dts: sun8i: a83t: Add MIPI CSI-2 controller node Paul Kocialkowski
2022-03-02 21:11 ` Paul Kocialkowski [this message]
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