From: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Cc: <Project_Global_Chrome_Upstream_Group@mediatek.com>,
<devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>,
"Chen-Yu Tsai" <wenst@chromium.org>,
Ryder Lee <ryder.lee@kernel.org>, Hui Liu <hui.liu@mediatek.com>,
Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Subject: [PATCH v3 18/21] arm64: dts: mt8192: Add display nodes
Date: Fri, 4 Mar 2022 21:08:06 +0800 [thread overview]
Message-ID: <20220304130809.12924-19-allen-kh.cheng@mediatek.com> (raw)
In-Reply-To: <20220304130809.12924-1-allen-kh.cheng@mediatek.com>
Add display nodes for mt8192 SoC.
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 111 +++++++++++++++++++++++
1 file changed, 111 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 039aba7ac0e2..94f88e52776b 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -1205,6 +1205,13 @@
#clock-cells = <1>;
};
+ mutex: mutex@14001000 {
+ compatible = "mediatek,mt8192-disp-mutex";
+ reg = <0 0x14001000 0 0x1000>;
+ interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&mmsys CLK_MM_DISP_MUTEX0>;
+ };
+
smi_common: smi@14002000 {
compatible = "mediatek,mt8192-smi-common";
reg = <0 0x14002000 0 0x1000>;
@@ -1236,6 +1243,110 @@
power-domains = <&spm MT8192_POWER_DOMAIN_DISP>;
};
+ ovl0: ovl@14005000 {
+ compatible = "mediatek,mt8192-disp-ovl";
+ reg = <0 0x14005000 0 0x1000>;
+ interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&mmsys CLK_MM_DISP_OVL0>;
+ iommus = <&iommu0 M4U_PORT_L0_OVL_RDMA0>,
+ <&iommu0 M4U_PORT_L0_OVL_RDMA0_HDR>;
+ power-domains = <&spm MT8192_POWER_DOMAIN_DISP>;
+ };
+
+ ovl_2l0: ovl@14006000 {
+ compatible = "mediatek,mt8192-disp-ovl-2l";
+ reg = <0 0x14006000 0 0x1000>;
+ interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH 0>;
+ power-domains = <&spm MT8192_POWER_DOMAIN_DISP>;
+ clocks = <&mmsys CLK_MM_DISP_OVL0_2L>;
+ iommus = <&iommu0 M4U_PORT_L1_OVL_2L_RDMA0>,
+ <&iommu0 M4U_PORT_L1_OVL_2L_RDMA0_HDR>;
+ };
+
+ rdma0: rdma@14007000 {
+ compatible = "mediatek,mt8192-disp-rdma";
+ reg = <0 0x14007000 0 0x1000>;
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&mmsys CLK_MM_DISP_RDMA0>;
+ iommus = <&iommu0 M4U_PORT_L0_DISP_RDMA0>;
+ mediatek,larb = <&larb0>;
+ mediatek,rdma-fifo-size = <5120>;
+ power-domains = <&spm MT8192_POWER_DOMAIN_DISP>;
+ };
+
+ color0: color@14009000 {
+ compatible = "mediatek,mt8192-disp-color",
+ "mediatek,mt8173-disp-color";
+ reg = <0 0x14009000 0 0x1000>;
+ interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH 0>;
+ power-domains = <&spm MT8192_POWER_DOMAIN_DISP>;
+ clocks = <&mmsys CLK_MM_DISP_COLOR0>;
+ };
+
+ ccorr0: ccorr@1400a000 {
+ compatible = "mediatek,mt8192-disp-ccorr";
+ reg = <0 0x1400a000 0 0x1000>;
+ interrupts = <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH 0>;
+ power-domains = <&spm MT8192_POWER_DOMAIN_DISP>;
+ clocks = <&mmsys CLK_MM_DISP_CCORR0>;
+ };
+
+ aal0: aal@1400b000 {
+ compatible = "mediatek,mt8192-disp-aal",
+ "mediatek,mt8193-disp-aal";
+ reg = <0 0x1400b000 0 0x1000>;
+ interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH 0>;
+ power-domains = <&spm MT8192_POWER_DOMAIN_DISP>;
+ clocks = <&mmsys CLK_MM_DISP_AAL0>;
+ };
+
+ gamma0: gamma@1400c000 {
+ compatible = "mediatek,mt8192-disp-gamma",
+ "mediatek,mt8183-disp-gamma";
+ reg = <0 0x1400c000 0 0x1000>;
+ interrupts = <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH 0>;
+ power-domains = <&spm MT8192_POWER_DOMAIN_DISP>;
+ clocks = <&mmsys CLK_MM_DISP_GAMMA0>;
+ };
+
+ postmask0: postmask@1400d000 {
+ compatible = "mediatek,mt8192-disp-postmask";
+ reg = <0 0x1400d000 0 0x1000>;
+ interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH 0>;
+ power-domains = <&spm MT8192_POWER_DOMAIN_DISP>;
+ clocks = <&mmsys CLK_MM_DISP_POSTMASK0>;
+ iommus = <&iommu0 M4U_PORT_L0_DISP_POSTMASK0>;
+ };
+
+ dither0: dither@1400e000 {
+ compatible = "mediatek,mt8192-disp-dither",
+ "mediatek,mt8183-disp-dither";
+ reg = <0 0x1400e000 0 0x1000>;
+ interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH 0>;
+ power-domains = <&spm MT8192_POWER_DOMAIN_DISP>;
+ clocks = <&mmsys CLK_MM_DISP_DITHER0>;
+ };
+
+ ovl_2l2: ovl@14014000 {
+ compatible = "mediatek,mt8192-disp-ovl-2l";
+ reg = <0 0x14014000 0 0x1000>;
+ interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH 0>;
+ power-domains = <&spm MT8192_POWER_DOMAIN_DISP>;
+ clocks = <&mmsys CLK_MM_DISP_OVL2_2L>;
+ iommus = <&iommu0 M4U_PORT_L1_OVL_2L_RDMA2>,
+ <&iommu0 M4U_PORT_L1_OVL_2L_RDMA2_HDR>;
+ };
+
+ rdma4: rdma@14015000 {
+ compatible = "mediatek,mt8192-disp-rdma";
+ reg = <0 0x14015000 0 0x1000>;
+ interrupts = <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH 0>;
+ power-domains = <&spm MT8192_POWER_DOMAIN_DISP>;
+ clocks = <&mmsys CLK_MM_DISP_RDMA4>;
+ iommus = <&iommu0 M4U_PORT_L1_DISP_RDMA4>;
+ mediatek,rdma-fifo-size = <2048>;
+ };
+
dpi0: dpi@14016000 {
compatible = "mediatek,mt8192-dpi";
reg = <0 0x14016000 0 0x1000>;
--
2.18.0
next prev parent reply other threads:[~2022-03-04 13:09 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-04 13:07 [PATCH v3 00/21] Add driver nodes for MT8192 SoC Allen-KH Cheng
2022-03-04 13:07 ` [PATCH v3 01/21] arm64: dts: mt8192: Add pwrap node Allen-KH Cheng
2022-03-04 13:07 ` [PATCH v3 02/21] arm64: dts: mt8192: Add spmi node Allen-KH Cheng
2022-03-04 13:07 ` [PATCH v3 03/21] arm64: dts: mt8192: Add gce node Allen-KH Cheng
2022-03-04 13:07 ` [PATCH v3 04/21] arm64: dts: mt8192: Add SCP node Allen-KH Cheng
2022-03-15 14:34 ` AngeloGioacchino Del Regno
2022-03-04 13:07 ` [PATCH v3 05/21] arm64: dts: mt8192: Add usb-phy node Allen-KH Cheng
2022-03-15 14:34 ` AngeloGioacchino Del Regno
2022-03-04 13:07 ` [PATCH v3 06/21] arm64: dts: mt8192: Add xhci node Allen-KH Cheng
2022-03-04 13:07 ` [PATCH v3 07/21] arm64: dts: mt8192: Add audio-related nodes Allen-KH Cheng
2022-03-04 13:07 ` [PATCH v3 08/21] arm64: dts: mt8192: Add infracfg_rst node Allen-KH Cheng
2022-03-04 13:07 ` [PATCH v3 09/21] arm64: dts: mt8192: Add PCIe node Allen-KH Cheng
2022-03-04 13:07 ` [PATCH v3 10/21] arm64: dts: mt8192: Fix nor_flash status disable typo Allen-KH Cheng
2022-03-04 13:07 ` [PATCH v3 11/21] arm64: dts: mt8192: Add efuse node Allen-KH Cheng
2022-03-15 14:34 ` AngeloGioacchino Del Regno
2022-03-04 13:08 ` [PATCH v3 12/21] arm64: dts: mt8192: Add mmc device nodes Allen-KH Cheng
2022-03-15 14:47 ` AngeloGioacchino Del Regno
2022-03-04 13:08 ` [PATCH v3 13/21] arm64: dts: mt8192: Add mipi_tx node Allen-KH Cheng
2022-03-15 14:35 ` AngeloGioacchino Del Regno
2022-03-04 13:08 ` [PATCH v3 14/21] arm64: dts: mt8192: Add m4u and smi nodes Allen-KH Cheng
2022-03-04 13:08 ` [PATCH v3 15/21] arm64: dts: mt8192: Add H264 venc device node Allen-KH Cheng
2022-03-04 13:08 ` [PATCH v3 16/21] arm64: dts: mt8192: Add vcodec lat and core nodes Allen-KH Cheng
2022-03-15 14:39 ` AngeloGioacchino Del Regno
2022-03-04 13:08 ` [PATCH v3 17/21] arm64: dts: mt8192: Add dpi node Allen-KH Cheng
2022-03-15 14:41 ` AngeloGioacchino Del Regno
2022-03-04 13:08 ` Allen-KH Cheng [this message]
2022-03-04 13:08 ` [PATCH v3 19/21] arm64: dts: mt8192: Add dsi node Allen-KH Cheng
2022-03-15 14:51 ` AngeloGioacchino Del Regno
2022-03-04 13:08 ` [PATCH v3 20/21] arm64: dts: mt8192: Add gce info for display nodes Allen-KH Cheng
2022-03-15 14:54 ` AngeloGioacchino Del Regno
2022-03-04 13:08 ` [PATCH v3 21/21] arm64: dts: mt8192: Add pwm node Allen-KH Cheng
2022-03-15 14:54 ` AngeloGioacchino Del Regno
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