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From: Pavan Kondeti <quic_pkondeti@quicinc.com>
To: Matthias Kaehlcke <mka@chromium.org>
Cc: Pavan Kondeti <quic_pkondeti@quicinc.com>,
	"Sandeep Maheswaram (Temp)" <quic_c_sanm@quicinc.com>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Felipe Balbi <balbi@kernel.org>,
	Stephen Boyd <swboyd@chromium.org>,
	Doug Anderson <dianders@chromium.org>,
	Mathias Nyman <mathias.nyman@intel.com>,
	<linux-arm-msm@vger.kernel.org>, <linux-usb@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <quic_ppratap@quicinc.com>
Subject: Re: [PATCH v11 2/5] usb: dwc3: core: Host wake up support from system suspend
Date: Thu, 31 Mar 2022 08:44:36 +0530	[thread overview]
Message-ID: <20220331031436.GD29680@hu-pkondeti-hyd.qualcomm.com> (raw)
In-Reply-To: <YkSJbLRL1QbINedE@google.com>

Hi Matthias,

On Wed, Mar 30, 2022 at 09:46:36AM -0700, Matthias Kaehlcke wrote:
> On Wed, Mar 30, 2022 at 09:33:18AM +0530, Pavan Kondeti wrote:
> > Hi Sandeep/Matthias,
> > 
> > On Thu, Mar 24, 2022 at 10:24:55AM +0530, Sandeep Maheswaram (Temp) wrote:
> > > 
> > > On 3/23/2022 11:37 PM, Matthias Kaehlcke wrote:
> > > >On Tue, Mar 22, 2022 at 12:37:53PM +0530, Sandeep Maheswaram wrote:
> > > >>During suspend read the status of all port and make sure the PHYs
> > > >>are in the correct mode based on current speed.
> > > >>Phy interrupt masks are set based on this mode. Keep track of the mode
> > > >>of the HS PHY to be able to configure wakeup properly.
> > > >>
> > > >>Also check during suspend if any wakeup capable devices are
> > > >>connected to the controller (directly or through hubs), if there
> > > >>are none set a flag to indicate that the PHY is powered
> > > >>down during suspend.
> > > >>
> > > >>Signed-off-by: Sandeep Maheswaram <quic_c_sanm@quicinc.com>
> > > >>---
> > > >>  drivers/usb/dwc3/core.c | 54 ++++++++++++++++++++++++++++++++++++++++---------
> > > >>  1 file changed, 45 insertions(+), 9 deletions(-)
> > > >>
> > > >>diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> > > >>index 1170b80..232a734 100644
> > > >>--- a/drivers/usb/dwc3/core.c
> > > >>+++ b/drivers/usb/dwc3/core.c
> > > >>@@ -32,12 +32,14 @@
> > > >>  #include <linux/usb/gadget.h>
> > > >>  #include <linux/usb/of.h>
> > > >>  #include <linux/usb/otg.h>
> > > >>+#include <linux/usb/hcd.h>
> > > >>  #include "core.h"
> > > >>  #include "gadget.h"
> > > >>  #include "io.h"
> > > >>  #include "debug.h"
> > > >>+#include "../host/xhci.h"
> > > >>  #define DWC3_DEFAULT_AUTOSUSPEND_DELAY	5000 /* ms */
> > > >>@@ -1861,10 +1863,36 @@ static int dwc3_core_init_for_resume(struct dwc3 *dwc)
> > > >>  	return ret;
> > > >>  }
> > > >>+static void dwc3_set_phy_speed_mode(struct dwc3 *dwc)
> > > >>+{
> > > >>+
> > > >>+	int i, num_ports;
> > > >>+	u32 reg;
> > > >>+	struct usb_hcd	*hcd = platform_get_drvdata(dwc->xhci);
> > > >>+	struct xhci_hcd	*xhci_hcd = hcd_to_xhci(hcd);
> > > >>+
> > > >>+	dwc->hs_phy_mode = 0;
> > > >>+
> > > >>+	reg = readl(&xhci_hcd->cap_regs->hcs_params1);
> > > >>+
> > > >>+	num_ports = HCS_MAX_PORTS(reg);
> > > >>+	for (i = 0; i < num_ports; i++) {
> > > >>+		reg = readl(&xhci_hcd->op_regs->port_status_base + i * 0x04);
> > > >s/0x04/NUM_PORT_REGS/
> > > Okay. Will update in next version.
> > > >
> > > >>+		if (reg & PORT_PE) {
> > > >>+			if (DEV_HIGHSPEED(reg) || DEV_FULLSPEED(reg))
> > > >>+				dwc->hs_phy_mode |= PHY_MODE_USB_HOST_HS;
> > > >>+			else if (DEV_LOWSPEED(reg))
> > > >>+				dwc->hs_phy_mode |= PHY_MODE_USB_HOST_LS;
> > > >>+		}
> > > >>+	}
> > > >>+	phy_set_mode(dwc->usb2_generic_phy, dwc->hs_phy_mode);
> > > >>+}
> > > >>+
> > > >>  static int dwc3_suspend_common(struct dwc3 *dwc, pm_message_t msg)
> > > >>  {
> > > >>  	unsigned long	flags;
> > > >>  	u32 reg;
> > > >>+	struct usb_hcd  *hcd = platform_get_drvdata(dwc->xhci);
> > > >>  	switch (dwc->current_dr_role) {
> > > >>  	case DWC3_GCTL_PRTCAP_DEVICE:
> > > >>@@ -1877,10 +1905,7 @@ static int dwc3_suspend_common(struct dwc3 *dwc, pm_message_t msg)
> > > >>  		dwc3_core_exit(dwc);
> > > >>  		break;
> > > >>  	case DWC3_GCTL_PRTCAP_HOST:
> > > >>-		if (!PMSG_IS_AUTO(msg)) {
> > > >>-			dwc3_core_exit(dwc);
> > > >>-			break;
> > > >>-		}
> > > >>+		dwc3_set_phy_speed_mode(dwc);
> > > >>  		/* Let controller to suspend HSPHY before PHY driver suspends */
> > > >>  		if (dwc->dis_u2_susphy_quirk ||
> > > >>@@ -1896,6 +1921,16 @@ static int dwc3_suspend_common(struct dwc3 *dwc, pm_message_t msg)
> > > >>  		phy_pm_runtime_put_sync(dwc->usb2_generic_phy);
> > > >>  		phy_pm_runtime_put_sync(dwc->usb3_generic_phy);
> > > >>+
> > > >>+		if (!PMSG_IS_AUTO(msg)) {
> > > >>+			if (device_may_wakeup(&dwc->xhci->dev) &&
> > > >Does the xHCI actually provide the correct information? I think Brian brought
> > > >up earlier that xhci-plat always marks the xHCI as wakeup capable, regardless
> > > >of whether the specific implementation actually supports wakeup. So a dwc3
> > > >without wakeup support would keep the PHY and the dwc3 active during suspend
> > > >if wakeup capable devices are connected (unless the admin disabled wakeup),
> > > >even though wakeup it doesn't support wakeup.
> > > >
> > > >Using the wakeup capability/policy of the xHCI to make decisions in the dwc3
> > > >driver might still be the best we can do with the weird driver split over 3
> > > >drivers for dwc3. Maybe the dwc3 could pass the actual capability to wake up
> > > >to the xHCI through a property_entry? Then again, it's actually the 'glue'
> > > >driver (dwc3-qcom) who knows about the actual wakeup capability, and not the
> > > >dwc3 core/host ...
> > > Will check if we can do something regarding this.
> > 
> > Can we introduce a device tree param to xhci-plat to specify if the underlying
> > device is wakeup capable or not. Based on this xhci-plat can call
> > device_set_wakeup_capable() with correct argument.
> 
> This also came to my mind, the existing 'wakeup-source' property could be an
> option, I share your concern about breaking existing use cases though ...
> 
> > One immediate problem is that current code unconditionally calls
> > device_set_wakeup_capable(&pdev->dev, true). So we may break existing use
> > cases also.
> 
> > Given that xHC assumes that the undelying device is wakeup capable but dwc3
> > tearing the stack during PM suspend does not make any sense. can we atleast
> > create a device tree param for dwc3 not to do this?
> 
> I'm not sure I fully understand what you have in mind. Are you thinking about
> a parameter/property to indicate whether wakeup should be enabled for the dwc3?
> 'wakeup_source' could serve that purpose, it is also used by xhci-mtk.c and
> mtu3_host.c.

Yes, I was suggesting we can have a device tree param for dwc3 node to decide
instead of relying on device_may_wakeup() checks in this patch. 

Thanks for pointing out wakeup-source property. That sounds perfect here to
me.

Thanks,
Pavan

  reply	other threads:[~2022-03-31  4:09 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-22  7:07 [PATCH v11 0/5] USB DWC3 host wake up support from system suspend Sandeep Maheswaram
2022-03-22  7:07 ` [PATCH v11 1/5] usb: dwc3: core: Add HS phy mode variable and phy poweroff flag Sandeep Maheswaram
2022-03-22  8:09   ` Pavan Kondeti
2022-03-22  8:42     ` Sandeep Maheswaram (Temp)
2022-03-22  7:07 ` [PATCH v11 2/5] usb: dwc3: core: Host wake up support from system suspend Sandeep Maheswaram
2022-03-22  8:32   ` Pavan Kondeti
2022-03-22  8:40     ` Pavan Kondeti
2022-04-05  9:25     ` Pavan Kondeti
2022-03-23 18:07   ` Matthias Kaehlcke
2022-03-24  4:54     ` Sandeep Maheswaram (Temp)
2022-03-30  4:03       ` Pavan Kondeti
2022-03-30 16:46         ` Matthias Kaehlcke
2022-03-31  3:14           ` Pavan Kondeti [this message]
2022-03-22  7:07 ` [PATCH v11 3/5] usb: dwc3: qcom: Add helper functions to enable,disable wake irqs Sandeep Maheswaram
2022-03-22  8:33   ` Pavan Kondeti
2022-03-22  7:07 ` [PATCH v11 4/5] usb: dwc3: qcom: Configure wakeup interrupts during suspend Sandeep Maheswaram
2022-03-22  8:36   ` Pavan Kondeti
2022-03-22  7:07 ` [PATCH v11 5/5] usb: dwc3: qcom: Keep power domain on to retain controller status Sandeep Maheswaram
2022-03-22  8:37   ` Pavan Kondeti
2022-03-22  9:18     ` Sandeep Maheswaram (Temp)

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