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* [PATCH v2 0/1] mt8192: Add mmc device nodes
@ 2022-04-07 11:37 Allen-KH Cheng
  2022-04-07 11:37 ` [PATCH v2 1/1] arm64: dts: " Allen-KH Cheng
  0 siblings, 1 reply; 5+ messages in thread
From: Allen-KH Cheng @ 2022-04-07 11:37 UTC (permalink / raw)
  To: Matthias Brugger, Rob Herring
  Cc: Project_Global_Chrome_Upstream_Group, devicetree,
	linux-arm-kernel, linux-kernel, linux-mediatek, Chen-Yu Tsai,
	Ryder Lee, Hui Liu, Allen-KH Cheng

Take mmc device patch from series 20220330133816.30806-1-allen-kh.cheng@mediatek.com/
This series are based on matthias.bgg/linux.git, v5.18-next/dts64

In mt8192 SoC.
mmc driver would directly read/write register(11f60000) to control clock configure.
Alos there is no other module using msdc: clock-controller.
In order to not cause duplicate unit-address warning, I remove the clock-controller
entirely.

changes since v1:
- remove msdc clock node

Changes history of mmc:
- mmc: diable the msdc clock node, drop reviewed-by tags.
- mmc: reserve msdc node
- mmc: reorder clocks as specified in the dt-bindings
- mmc: use single line for reg

Allen-KH Cheng (1):
  arm64: dts: mt8192: Add mmc device nodes

 arch/arm64/boot/dts/mediatek/mt8192.dtsi | 34 +++++++++++++++++++++---
 1 file changed, 30 insertions(+), 4 deletions(-)

-- 
2.18.0


^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH v2 1/1] arm64: dts: mt8192: Add mmc device nodes
  2022-04-07 11:37 [PATCH v2 0/1] mt8192: Add mmc device nodes Allen-KH Cheng
@ 2022-04-07 11:37 ` Allen-KH Cheng
  2022-04-07 12:21   ` AngeloGioacchino Del Regno
                     ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: Allen-KH Cheng @ 2022-04-07 11:37 UTC (permalink / raw)
  To: Matthias Brugger, Rob Herring
  Cc: Project_Global_Chrome_Upstream_Group, devicetree,
	linux-arm-kernel, linux-kernel, linux-mediatek, Chen-Yu Tsai,
	Ryder Lee, Hui Liu, Allen-KH Cheng

In mt8192 SoC, mmc driver dose not use the MSDC module to control
clock. It will read/write register to enable/disable clock. Also
there is no other device of mt8192 using MSDC controller.

We add mmc nodes for mt8192 SoC and remove the clock-controller in
dts for avoid a duplicate unit-address(11f60000) warning.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8192.dtsi | 34 +++++++++++++++++++++---
 1 file changed, 30 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index a6da7b04b9d4..18a58239d6f1 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -985,10 +985,36 @@
 			#clock-cells = <1>;
 		};
 
-		msdc: clock-controller@11f60000 {
-			compatible = "mediatek,mt8192-msdc";
-			reg = <0 0x11f60000 0 0x1000>;
-			#clock-cells = <1>;
+		mmc0: mmc@11f60000 {
+			compatible = "mediatek,mt8192-mmc", "mediatek,mt8183-mmc";
+			reg = <0 0x11f60000 0 0x1000>, <0 0x11f50000 0 0x1000>;
+			interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH 0>;
+			clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>,
+				 <&msdc_top CLK_MSDC_TOP_H_MST_0P>,
+				 <&msdc_top CLK_MSDC_TOP_SRC_0P>,
+				 <&msdc_top CLK_MSDC_TOP_P_CFG>,
+				 <&msdc_top CLK_MSDC_TOP_P_MSDC0>,
+				 <&msdc_top CLK_MSDC_TOP_AXI>,
+				 <&msdc_top CLK_MSDC_TOP_AHB2AXI_BRG_AXI>;
+			clock-names = "source", "hclk", "source_cg", "sys_cg",
+				      "pclk_cg", "axi_cg", "ahb_cg";
+			status = "disabled";
+		};
+
+		mmc1: mmc@11f70000 {
+			compatible = "mediatek,mt8192-mmc", "mediatek,mt8183-mmc";
+			reg = <0 0x11f70000 0 0x1000>, <0 0x11c70000 0 0x1000>;
+			interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>;
+			clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>,
+				 <&msdc_top CLK_MSDC_TOP_H_MST_1P>,
+				 <&msdc_top CLK_MSDC_TOP_SRC_1P>,
+				 <&msdc_top CLK_MSDC_TOP_P_CFG>,
+				 <&msdc_top CLK_MSDC_TOP_P_MSDC1>,
+				 <&msdc_top CLK_MSDC_TOP_AXI>,
+				 <&msdc_top CLK_MSDC_TOP_AHB2AXI_BRG_AXI>;
+			clock-names = "source", "hclk", "source_cg", "sys_cg",
+				      "pclk_cg", "axi_cg", "ahb_cg";
+			status = "disabled";
 		};
 
 		mfgcfg: clock-controller@13fbf000 {
-- 
2.18.0


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH v2 1/1] arm64: dts: mt8192: Add mmc device nodes
  2022-04-07 11:37 ` [PATCH v2 1/1] arm64: dts: " Allen-KH Cheng
@ 2022-04-07 12:21   ` AngeloGioacchino Del Regno
  2022-04-14 21:18   ` Nícolas F. R. A. Prado
  2022-04-22 14:31   ` Matthias Brugger
  2 siblings, 0 replies; 5+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-04-07 12:21 UTC (permalink / raw)
  To: Allen-KH Cheng, Matthias Brugger, Rob Herring
  Cc: Project_Global_Chrome_Upstream_Group, devicetree,
	linux-arm-kernel, linux-kernel, linux-mediatek, Chen-Yu Tsai,
	Ryder Lee, Hui Liu

Il 07/04/22 13:37, Allen-KH Cheng ha scritto:
> In mt8192 SoC, mmc driver dose not use the MSDC module to control
> clock. It will read/write register to enable/disable clock. Also
> there is no other device of mt8192 using MSDC controller.
> 
> We add mmc nodes for mt8192 SoC and remove the clock-controller in
> dts for avoid a duplicate unit-address(11f60000) warning.
> 
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>


^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH v2 1/1] arm64: dts: mt8192: Add mmc device nodes
  2022-04-07 11:37 ` [PATCH v2 1/1] arm64: dts: " Allen-KH Cheng
  2022-04-07 12:21   ` AngeloGioacchino Del Regno
@ 2022-04-14 21:18   ` Nícolas F. R. A. Prado
  2022-04-22 14:31   ` Matthias Brugger
  2 siblings, 0 replies; 5+ messages in thread
From: Nícolas F. R. A. Prado @ 2022-04-14 21:18 UTC (permalink / raw)
  To: Allen-KH Cheng
  Cc: Matthias Brugger, Rob Herring,
	Project_Global_Chrome_Upstream_Group, devicetree,
	linux-arm-kernel, linux-kernel, linux-mediatek, Chen-Yu Tsai,
	Ryder Lee, Hui Liu

On Thu, Apr 07, 2022 at 07:37:03PM +0800, Allen-KH Cheng wrote:
> In mt8192 SoC, mmc driver dose not use the MSDC module to control
> clock. It will read/write register to enable/disable clock. Also
> there is no other device of mt8192 using MSDC controller.
> 
> We add mmc nodes for mt8192 SoC and remove the clock-controller in
> dts for avoid a duplicate unit-address(11f60000) warning.
> 
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>

Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>

> ---
>  arch/arm64/boot/dts/mediatek/mt8192.dtsi | 34 +++++++++++++++++++++---
>  1 file changed, 30 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> index a6da7b04b9d4..18a58239d6f1 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> @@ -985,10 +985,36 @@
>  			#clock-cells = <1>;
>  		};
>  
> -		msdc: clock-controller@11f60000 {
> -			compatible = "mediatek,mt8192-msdc";
> -			reg = <0 0x11f60000 0 0x1000>;
> -			#clock-cells = <1>;
> +		mmc0: mmc@11f60000 {
> +			compatible = "mediatek,mt8192-mmc", "mediatek,mt8183-mmc";
> +			reg = <0 0x11f60000 0 0x1000>, <0 0x11f50000 0 0x1000>;
> +			interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH 0>;
> +			clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>,
> +				 <&msdc_top CLK_MSDC_TOP_H_MST_0P>,
> +				 <&msdc_top CLK_MSDC_TOP_SRC_0P>,
> +				 <&msdc_top CLK_MSDC_TOP_P_CFG>,
> +				 <&msdc_top CLK_MSDC_TOP_P_MSDC0>,
> +				 <&msdc_top CLK_MSDC_TOP_AXI>,
> +				 <&msdc_top CLK_MSDC_TOP_AHB2AXI_BRG_AXI>;
> +			clock-names = "source", "hclk", "source_cg", "sys_cg",
> +				      "pclk_cg", "axi_cg", "ahb_cg";
> +			status = "disabled";
> +		};
> +
> +		mmc1: mmc@11f70000 {
> +			compatible = "mediatek,mt8192-mmc", "mediatek,mt8183-mmc";
> +			reg = <0 0x11f70000 0 0x1000>, <0 0x11c70000 0 0x1000>;
> +			interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>;
> +			clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>,
> +				 <&msdc_top CLK_MSDC_TOP_H_MST_1P>,
> +				 <&msdc_top CLK_MSDC_TOP_SRC_1P>,
> +				 <&msdc_top CLK_MSDC_TOP_P_CFG>,
> +				 <&msdc_top CLK_MSDC_TOP_P_MSDC1>,
> +				 <&msdc_top CLK_MSDC_TOP_AXI>,
> +				 <&msdc_top CLK_MSDC_TOP_AHB2AXI_BRG_AXI>;
> +			clock-names = "source", "hclk", "source_cg", "sys_cg",
> +				      "pclk_cg", "axi_cg", "ahb_cg";
> +			status = "disabled";
>  		};
>  
>  		mfgcfg: clock-controller@13fbf000 {
> -- 
> 2.18.0
> 
> 

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH v2 1/1] arm64: dts: mt8192: Add mmc device nodes
  2022-04-07 11:37 ` [PATCH v2 1/1] arm64: dts: " Allen-KH Cheng
  2022-04-07 12:21   ` AngeloGioacchino Del Regno
  2022-04-14 21:18   ` Nícolas F. R. A. Prado
@ 2022-04-22 14:31   ` Matthias Brugger
  2 siblings, 0 replies; 5+ messages in thread
From: Matthias Brugger @ 2022-04-22 14:31 UTC (permalink / raw)
  To: Allen-KH Cheng, Rob Herring
  Cc: Project_Global_Chrome_Upstream_Group, devicetree,
	linux-arm-kernel, linux-kernel, linux-mediatek, Chen-Yu Tsai,
	Ryder Lee, Hui Liu



On 07/04/2022 13:37, Allen-KH Cheng wrote:
> In mt8192 SoC, mmc driver dose not use the MSDC module to control
> clock. It will read/write register to enable/disable clock. Also
> there is no other device of mt8192 using MSDC controller.
> 
> We add mmc nodes for mt8192 SoC and remove the clock-controller in
> dts for avoid a duplicate unit-address(11f60000) warning.
> 

Applied, thanks!

Matthias

> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
> ---
>   arch/arm64/boot/dts/mediatek/mt8192.dtsi | 34 +++++++++++++++++++++---
>   1 file changed, 30 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> index a6da7b04b9d4..18a58239d6f1 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> @@ -985,10 +985,36 @@
>   			#clock-cells = <1>;
>   		};
>   
> -		msdc: clock-controller@11f60000 {
> -			compatible = "mediatek,mt8192-msdc";
> -			reg = <0 0x11f60000 0 0x1000>;
> -			#clock-cells = <1>;
> +		mmc0: mmc@11f60000 {
> +			compatible = "mediatek,mt8192-mmc", "mediatek,mt8183-mmc";
> +			reg = <0 0x11f60000 0 0x1000>, <0 0x11f50000 0 0x1000>;
> +			interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH 0>;
> +			clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>,
> +				 <&msdc_top CLK_MSDC_TOP_H_MST_0P>,
> +				 <&msdc_top CLK_MSDC_TOP_SRC_0P>,
> +				 <&msdc_top CLK_MSDC_TOP_P_CFG>,
> +				 <&msdc_top CLK_MSDC_TOP_P_MSDC0>,
> +				 <&msdc_top CLK_MSDC_TOP_AXI>,
> +				 <&msdc_top CLK_MSDC_TOP_AHB2AXI_BRG_AXI>;
> +			clock-names = "source", "hclk", "source_cg", "sys_cg",
> +				      "pclk_cg", "axi_cg", "ahb_cg";
> +			status = "disabled";
> +		};
> +
> +		mmc1: mmc@11f70000 {
> +			compatible = "mediatek,mt8192-mmc", "mediatek,mt8183-mmc";
> +			reg = <0 0x11f70000 0 0x1000>, <0 0x11c70000 0 0x1000>;
> +			interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>;
> +			clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>,
> +				 <&msdc_top CLK_MSDC_TOP_H_MST_1P>,
> +				 <&msdc_top CLK_MSDC_TOP_SRC_1P>,
> +				 <&msdc_top CLK_MSDC_TOP_P_CFG>,
> +				 <&msdc_top CLK_MSDC_TOP_P_MSDC1>,
> +				 <&msdc_top CLK_MSDC_TOP_AXI>,
> +				 <&msdc_top CLK_MSDC_TOP_AHB2AXI_BRG_AXI>;
> +			clock-names = "source", "hclk", "source_cg", "sys_cg",
> +				      "pclk_cg", "axi_cg", "ahb_cg";
> +			status = "disabled";
>   		};
>   
>   		mfgcfg: clock-controller@13fbf000 {

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2022-04-22 14:31 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-04-07 11:37 [PATCH v2 0/1] mt8192: Add mmc device nodes Allen-KH Cheng
2022-04-07 11:37 ` [PATCH v2 1/1] arm64: dts: " Allen-KH Cheng
2022-04-07 12:21   ` AngeloGioacchino Del Regno
2022-04-14 21:18   ` Nícolas F. R. A. Prado
2022-04-22 14:31   ` Matthias Brugger

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