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From: Samuel Holland <samuel@sholland.org>
To: Chen-Yu Tsai <wens@csie.org>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	Maxime Ripard <mripard@kernel.org>
Cc: Samuel Holland <samuel@sholland.org>,
	Daniel Vetter <daniel@ffwll.ch>, David Airlie <airlied@linux.ie>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev
Subject: [PATCH 06/10] drm/sun4i: Allow VI layers to be primary planes
Date: Sun, 10 Apr 2022 23:34:18 -0500	[thread overview]
Message-ID: <20220411043423.37333-7-samuel@sholland.org> (raw)
In-Reply-To: <20220411043423.37333-1-samuel@sholland.org>

D1's mixer 1 has no UI layers, only a single VI layer. That means the
mixer can only be used if the primary plane comes from this VI layer.
Add the code to handle this case, setting the mixer's global registers
in the same way as when the primary plane comes from a UI layer.

Signed-off-by: Samuel Holland <samuel@sholland.org>
---

 drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 36 +++++++++++++++++++++++++-
 1 file changed, 35 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
index bb7c43036dfa..86212cb2098c 100644
--- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
@@ -146,6 +146,36 @@ static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel,
 	insize = SUN8I_MIXER_SIZE(src_w, src_h);
 	outsize = SUN8I_MIXER_SIZE(dst_w, dst_h);
 
+	if (plane->type == DRM_PLANE_TYPE_PRIMARY) {
+		bool interlaced = false;
+		u32 val;
+
+		DRM_DEBUG_DRIVER("Primary layer, updating global size W: %u H: %u\n",
+				 dst_w, dst_h);
+		regmap_write(mixer->engine.regs,
+			     SUN8I_MIXER_GLOBAL_SIZE,
+			     outsize);
+		regmap_write(mixer->engine.regs,
+			     SUN8I_MIXER_BLEND_OUTSIZE(bld_base), outsize);
+
+		if (state->crtc)
+			interlaced = state->crtc->state->adjusted_mode.flags
+				& DRM_MODE_FLAG_INTERLACE;
+
+		if (interlaced)
+			val = SUN8I_MIXER_BLEND_OUTCTL_INTERLACED;
+		else
+			val = 0;
+
+		regmap_update_bits(mixer->engine.regs,
+				   SUN8I_MIXER_BLEND_OUTCTL(bld_base),
+				   SUN8I_MIXER_BLEND_OUTCTL_INTERLACED,
+				   val);
+
+		DRM_DEBUG_DRIVER("Switching display mixer interlaced mode %s\n",
+				 interlaced ? "on" : "off");
+	}
+
 	/* Set height and width */
 	DRM_DEBUG_DRIVER("Layer source offset X: %d Y: %d\n",
 			 (state->src.x1 >> 16) & ~(format->hsub - 1),
@@ -542,6 +572,7 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm,
 					       struct sun8i_mixer *mixer,
 					       int index)
 {
+	enum drm_plane_type type = DRM_PLANE_TYPE_OVERLAY;
 	u32 supported_encodings, supported_ranges;
 	unsigned int plane_cnt, format_count;
 	struct sun8i_vi_layer *layer;
@@ -560,12 +591,15 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm,
 		format_count = ARRAY_SIZE(sun8i_vi_layer_formats);
 	}
 
+	if (!mixer->cfg->ui_num && index == 0)
+		type = DRM_PLANE_TYPE_PRIMARY;
+
 	/* possible crtcs are set later */
 	ret = drm_universal_plane_init(drm, &layer->plane, 0,
 				       &sun8i_vi_layer_funcs,
 				       formats, format_count,
 				       sun8i_layer_modifiers,
-				       DRM_PLANE_TYPE_OVERLAY, NULL);
+				       type, NULL);
 	if (ret) {
 		dev_err(drm->dev, "Couldn't initialize layer\n");
 		return ERR_PTR(ret);
-- 
2.35.1


  parent reply	other threads:[~2022-04-11  4:35 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-11  4:34 [PATCH 00/10] drm/sun4i: Allwinner D1 Display Engine 2.0 Support Samuel Holland
2022-04-11  4:34 ` [PATCH 01/10] dt-bindings: display: Separate clock item lists by compatible Samuel Holland
2022-04-11  6:37   ` Krzysztof Kozlowski
2022-04-11  4:34 ` [PATCH 02/10] dt-bindings: display: Add D1 display engine compatibles Samuel Holland
2022-04-11  6:38   ` Krzysztof Kozlowski
2022-04-11  4:34 ` [PATCH 03/10] drm/sun4i: Remove obsolete references to PHYS_OFFSET Samuel Holland
2022-04-11 15:37   ` Jernej Škrabec
2022-04-12  2:56     ` Samuel Holland
2022-04-11  4:34 ` [PATCH 04/10] drm/sun4i: Allow building the driver on RISC-V Samuel Holland
2022-04-11 15:38   ` Jernej Škrabec
2022-04-11 21:15   ` kernel test robot
2022-04-12 10:00   ` kernel test robot
2022-04-11  4:34 ` [PATCH 05/10] drm/sun4i: csc: Add support for the new MMIO layout Samuel Holland
2022-04-11 15:40   ` Jernej Škrabec
2022-04-11  4:34 ` Samuel Holland [this message]
2022-04-11 15:48   ` [PATCH 06/10] drm/sun4i: Allow VI layers to be primary planes Jernej Škrabec
2022-04-11  4:34 ` [PATCH 07/10] drm/sun4i: Add support for D1 mixers Samuel Holland
2022-04-11 15:51   ` Jernej Škrabec
2022-04-11  4:34 ` [PATCH 08/10] drm/sun4i: Add support for D1 TCON TOP Samuel Holland
2022-04-11  4:34 ` [PATCH 09/10] drm/sun4i: Add support for D1 TCONs Samuel Holland
2022-04-11  4:34 ` [PATCH 10/10] drm/sun4i: Add compatible for D1 display engine Samuel Holland
2022-04-11 15:54   ` Jernej Škrabec

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