From: kernel test robot <lkp@intel.com>
To: Samuel Holland <samuel@sholland.org>,
Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Maxime Ripard <mripard@kernel.org>
Cc: llvm@lists.linux.dev, kbuild-all@lists.01.org,
Samuel Holland <samuel@sholland.org>,
Daniel Vetter <daniel@ffwll.ch>, David Airlie <airlied@linux.ie>,
Krzysztof Kozlowski <krzk@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev
Subject: Re: [PATCH 04/10] drm/sun4i: Allow building the driver on RISC-V
Date: Tue, 12 Apr 2022 18:00:05 +0800 [thread overview]
Message-ID: <202204121758.QeUxJKUh-lkp@intel.com> (raw)
In-Reply-To: <20220411043423.37333-5-samuel@sholland.org>
Hi Samuel,
I love your patch! Yet something to improve:
[auto build test ERROR on sunxi/sunxi/for-next]
[also build test ERROR on drm/drm-next linus/master v5.18-rc2 next-20220412]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/intel-lab-lkp/linux/commits/Samuel-Holland/drm-sun4i-Allwinner-D1-Display-Engine-2-0-Support/20220411-123701
base: https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git sunxi/for-next
config: hexagon-allyesconfig (https://download.01.org/0day-ci/archive/20220412/202204121758.QeUxJKUh-lkp@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project c6e83f560f06cdfe8aa47b248d8bdc58f947274b)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/829dac8ee2cbb6d1b7bda1c513cc2ad1939fca53
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Samuel-Holland/drm-sun4i-Allwinner-D1-Display-Engine-2-0-Support/20220411-123701
git checkout 829dac8ee2cbb6d1b7bda1c513cc2ad1939fca53
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=hexagon SHELL=/bin/bash
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
>> drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c:59:3: error: implicit declaration of function 'readsb' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
readsb(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len);
^
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c:59:3: note: did you mean 'readb'?
arch/hexagon/include/asm/io.h:83:18: note: 'readb' declared here
static inline u8 readb(const volatile void __iomem *addr)
^
>> drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c:61:3: error: implicit declaration of function 'writesb' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
writesb(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len);
^
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c:61:3: note: did you mean 'writeb'?
arch/hexagon/include/asm/io.h:122:20: note: 'writeb' declared here
static inline void writeb(u8 data, volatile void __iomem *addr)
^
2 errors generated.
vim +/readsb +59 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
f0a3dd33ba685b Jonathan Liu 2017-07-02 24
f0a3dd33ba685b Jonathan Liu 2017-07-02 25 static int fifo_transfer(struct sun4i_hdmi *hdmi, u8 *buf, int len, bool read)
f0a3dd33ba685b Jonathan Liu 2017-07-02 26 {
f0a3dd33ba685b Jonathan Liu 2017-07-02 27 /*
f0a3dd33ba685b Jonathan Liu 2017-07-02 28 * 1 byte takes 9 clock cycles (8 bits + 1 ACK) = 90 us for 100 kHz
f0a3dd33ba685b Jonathan Liu 2017-07-02 29 * clock. As clock rate is fixed, just round it up to 100 us.
f0a3dd33ba685b Jonathan Liu 2017-07-02 30 */
f0a3dd33ba685b Jonathan Liu 2017-07-02 31 const unsigned long byte_time_ns = 100;
f0a3dd33ba685b Jonathan Liu 2017-07-02 32 const u32 mask = SUN4I_HDMI_DDC_INT_STATUS_ERROR_MASK |
f0a3dd33ba685b Jonathan Liu 2017-07-02 33 SUN4I_HDMI_DDC_INT_STATUS_FIFO_REQUEST |
f0a3dd33ba685b Jonathan Liu 2017-07-02 34 SUN4I_HDMI_DDC_INT_STATUS_TRANSFER_COMPLETE;
f0a3dd33ba685b Jonathan Liu 2017-07-02 35 u32 reg;
939d749ad6649c Chen-Yu Tsai 2017-10-10 36 /*
939d749ad6649c Chen-Yu Tsai 2017-10-10 37 * If threshold is inclusive, then the FIFO may only have
939d749ad6649c Chen-Yu Tsai 2017-10-10 38 * RX_THRESHOLD number of bytes, instead of RX_THRESHOLD + 1.
939d749ad6649c Chen-Yu Tsai 2017-10-10 39 */
939d749ad6649c Chen-Yu Tsai 2017-10-10 40 int read_len = RX_THRESHOLD +
939d749ad6649c Chen-Yu Tsai 2017-10-10 41 (hdmi->variant->ddc_fifo_thres_incl ? 0 : 1);
f0a3dd33ba685b Jonathan Liu 2017-07-02 42
939d749ad6649c Chen-Yu Tsai 2017-10-10 43 /*
939d749ad6649c Chen-Yu Tsai 2017-10-10 44 * Limit transfer length by FIFO threshold or FIFO size.
939d749ad6649c Chen-Yu Tsai 2017-10-10 45 * For TX the threshold is for an empty FIFO.
939d749ad6649c Chen-Yu Tsai 2017-10-10 46 */
939d749ad6649c Chen-Yu Tsai 2017-10-10 47 len = min_t(int, len, read ? read_len : SUN4I_HDMI_DDC_FIFO_SIZE);
f0a3dd33ba685b Jonathan Liu 2017-07-02 48
f0a3dd33ba685b Jonathan Liu 2017-07-02 49 /* Wait until error, FIFO request bit set or transfer complete */
939d749ad6649c Chen-Yu Tsai 2017-10-10 50 if (regmap_field_read_poll_timeout(hdmi->field_ddc_int_status, reg,
939d749ad6649c Chen-Yu Tsai 2017-10-10 51 reg & mask, len * byte_time_ns,
939d749ad6649c Chen-Yu Tsai 2017-10-10 52 100000))
f0a3dd33ba685b Jonathan Liu 2017-07-02 53 return -ETIMEDOUT;
f0a3dd33ba685b Jonathan Liu 2017-07-02 54
f0a3dd33ba685b Jonathan Liu 2017-07-02 55 if (reg & SUN4I_HDMI_DDC_INT_STATUS_ERROR_MASK)
f0a3dd33ba685b Jonathan Liu 2017-07-02 56 return -EIO;
f0a3dd33ba685b Jonathan Liu 2017-07-02 57
f0a3dd33ba685b Jonathan Liu 2017-07-02 58 if (read)
939d749ad6649c Chen-Yu Tsai 2017-10-10 @59 readsb(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len);
f0a3dd33ba685b Jonathan Liu 2017-07-02 60 else
939d749ad6649c Chen-Yu Tsai 2017-10-10 @61 writesb(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len);
f0a3dd33ba685b Jonathan Liu 2017-07-02 62
939d749ad6649c Chen-Yu Tsai 2017-10-10 63 /* Clear FIFO request bit by forcing a write to that bit */
939d749ad6649c Chen-Yu Tsai 2017-10-10 64 regmap_field_force_write(hdmi->field_ddc_int_status,
939d749ad6649c Chen-Yu Tsai 2017-10-10 65 SUN4I_HDMI_DDC_INT_STATUS_FIFO_REQUEST);
f0a3dd33ba685b Jonathan Liu 2017-07-02 66
f0a3dd33ba685b Jonathan Liu 2017-07-02 67 return len;
f0a3dd33ba685b Jonathan Liu 2017-07-02 68 }
f0a3dd33ba685b Jonathan Liu 2017-07-02 69
--
0-DAY CI Kernel Test Service
https://01.org/lkp
next prev parent reply other threads:[~2022-04-12 11:09 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-11 4:34 [PATCH 00/10] drm/sun4i: Allwinner D1 Display Engine 2.0 Support Samuel Holland
2022-04-11 4:34 ` [PATCH 01/10] dt-bindings: display: Separate clock item lists by compatible Samuel Holland
2022-04-11 6:37 ` Krzysztof Kozlowski
2022-04-11 4:34 ` [PATCH 02/10] dt-bindings: display: Add D1 display engine compatibles Samuel Holland
2022-04-11 6:38 ` Krzysztof Kozlowski
2022-04-11 4:34 ` [PATCH 03/10] drm/sun4i: Remove obsolete references to PHYS_OFFSET Samuel Holland
2022-04-11 15:37 ` Jernej Škrabec
2022-04-12 2:56 ` Samuel Holland
2022-04-11 4:34 ` [PATCH 04/10] drm/sun4i: Allow building the driver on RISC-V Samuel Holland
2022-04-11 15:38 ` Jernej Škrabec
2022-04-11 21:15 ` kernel test robot
2022-04-12 10:00 ` kernel test robot [this message]
2022-04-11 4:34 ` [PATCH 05/10] drm/sun4i: csc: Add support for the new MMIO layout Samuel Holland
2022-04-11 15:40 ` Jernej Škrabec
2022-04-11 4:34 ` [PATCH 06/10] drm/sun4i: Allow VI layers to be primary planes Samuel Holland
2022-04-11 15:48 ` Jernej Škrabec
2022-04-11 4:34 ` [PATCH 07/10] drm/sun4i: Add support for D1 mixers Samuel Holland
2022-04-11 15:51 ` Jernej Škrabec
2022-04-11 4:34 ` [PATCH 08/10] drm/sun4i: Add support for D1 TCON TOP Samuel Holland
2022-04-11 4:34 ` [PATCH 09/10] drm/sun4i: Add support for D1 TCONs Samuel Holland
2022-04-11 4:34 ` [PATCH 10/10] drm/sun4i: Add compatible for D1 display engine Samuel Holland
2022-04-11 15:54 ` Jernej Škrabec
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