[PATCH 1/1] drivers: edac: Fix bad bit shift operations

[PATCH 1/1] drivers: edac: Fix bad bit shift operations

[Priyanka Singh]

Fix possible bad bit shift operations in fsl_mc_check()

Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Sherry Sun <sherry.sun@nxp.com>
---
 drivers/edac/fsl_ddr_edac.c | 26 ++++++++++++++++----------
 1 file changed, 16 insertions(+), 10 deletions(-)

diff --git a/drivers/edac/fsl_ddr_edac.c b/drivers/edac/fsl_ddr_edac.c
index 6d8ea226010d..a4503137e62b 100644
--- a/drivers/edac/fsl_ddr_edac.c
+++ b/drivers/edac/fsl_ddr_edac.c
@@ -6,7 +6,7 @@
  * split out from mpc85xx_edac EDAC driver.
  *
  * Parts Copyrighted (c) 2013 by Freescale Semiconductor, Inc.
- *
+ * Parts Copyrighted (c) 2022 NXP
  * Author: Dave Jiang <djiang@mvista.com>
  *
  * 2006-2007 (c) MontaVista Software, Inc. This file is licensed under
@@ -334,18 +334,24 @@ static void fsl_mc_check(struct mem_ctl_info *mci)
 		sbe_ecc_decode(cap_high, cap_low, syndrome,
 				&bad_data_bit, &bad_ecc_bit);
 
-		if (bad_data_bit != -1)
+		if (bad_data_bit >= 0)
 			fsl_mc_printk(mci, KERN_ERR,
 				"Faulty Data bit: %d\n", bad_data_bit);
-		if (bad_ecc_bit != -1)
+		if (bad_ecc_bit >= 0)
 			fsl_mc_printk(mci, KERN_ERR,
-				"Faulty ECC bit: %d\n", bad_ecc_bit);
-
-		fsl_mc_printk(mci, KERN_ERR,
-			"Expected Data / ECC:\t%#8.8x_%08x / %#2.2x\n",
-			cap_high ^ (1 << (bad_data_bit - 32)),
-			cap_low ^ (1 << bad_data_bit),
-			syndrome ^ (1 << bad_ecc_bit));
+					"Faulty ECC bit: %d\n", bad_ecc_bit);
+		if ((bad_data_bit > 0 && bad_data_bit < 32) && bad_ecc_bit > 0) {
+			fsl_mc_printk(mci, KERN_ERR,
+				"Expected Data / ECC:\t%#8.8x_%08x / %#2.2x\n",
+				cap_high, cap_low ^ (1 << bad_data_bit),
+				syndrome ^ (1 << bad_ecc_bit));
+		}
+		if (bad_data_bit >= 32 && bad_ecc_bit > 0) {
+			fsl_mc_printk(mci, KERN_ERR,
+				"Expected Data / ECC:\t%#8.8x / %#2.2x\n",
+				cap_high ^ (1 << (bad_data_bit - 32)),
+				cap_low, syndrome ^ (1 << bad_ecc_bit));
+		}
 	}
 
 	fsl_mc_printk(mci, KERN_ERR,
-- 
2.17.1

Re: [PATCH 1/1] drivers: edac: Fix bad bit shift operations

[kernel test robot]

Hi Priyanka,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on ras/edac-for-next]
[also build test WARNING on v5.18-rc2 next-20220411]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/intel-lab-lkp/linux/commits/Priyanka-Singh/drivers-edac-Fix-bad-bit-shift-operations/20220411-190157
base:   https://git.kernel.org/pub/scm/linux/kernel/git/ras/ras.git edac-for-next
config: arm64-allyesconfig (https://download.01.org/0day-ci/archive/20220412/202204120819.tHnMbFil-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/c686e26cdea24d78450aaaff268558ea6842cd31
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Priyanka-Singh/drivers-edac-Fix-bad-bit-shift-operations/20220411-190157
        git checkout c686e26cdea24d78450aaaff268558ea6842cd31
        # save the config file to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=arm64 SHELL=/bin/bash drivers/edac/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

   In file included from include/asm-generic/bug.h:22,
                    from arch/arm64/include/asm/bug.h:26,
                    from include/linux/bug.h:5,
                    from arch/arm64/include/asm/cpufeature.h:19,
                    from arch/arm64/include/asm/hwcap.h:9,
                    from arch/arm64/include/asm/arch_timer.h:12,
                    from arch/arm64/include/asm/timex.h:8,
                    from include/linux/timex.h:65,
                    from include/linux/time32.h:13,
                    from include/linux/time.h:60,
                    from arch/arm64/include/asm/stat.h:12,
                    from include/linux/stat.h:6,
                    from include/linux/module.h:13,
                    from drivers/edac/fsl_ddr_edac.c:17:
   drivers/edac/fsl_ddr_edac.c: In function 'fsl_mc_check':
>> include/linux/kern_levels.h:5:25: warning: too many arguments for format [-Wformat-extra-args]
       5 | #define KERN_SOH        "\001"          /* ASCII Start Of Header */
         |                         ^~~~~~
   include/linux/printk.h:418:25: note: in definition of macro 'printk_index_wrap'
     418 |                 _p_func(_fmt, ##__VA_ARGS__);                           \
         |                         ^~~~
   drivers/edac/edac_mc.h:55:9: note: in expansion of macro 'printk'
      55 |         printk(level "EDAC " prefix " MC%d: " fmt, mci->mc_idx, ##arg)
         |         ^~~~~~
   drivers/edac/fsl_ddr_edac.h:20:9: note: in expansion of macro 'edac_mc_chipset_printk'
      20 |         edac_mc_chipset_printk(mci, level, "FSL_DDR", fmt, ##arg)
         |         ^~~~~~~~~~~~~~~~~~~~~~
   drivers/edac/fsl_ddr_edac.c:350:25: note: in expansion of macro 'fsl_mc_printk'
     350 |                         fsl_mc_printk(mci, KERN_ERR,
         |                         ^~~~~~~~~~~~~
   include/linux/kern_levels.h:11:25: note: in expansion of macro 'KERN_SOH'
      11 | #define KERN_ERR        KERN_SOH "3"    /* error conditions */
         |                         ^~~~~~~~
   drivers/edac/fsl_ddr_edac.c:350:44: note: in expansion of macro 'KERN_ERR'
     350 |                         fsl_mc_printk(mci, KERN_ERR,
         |                                            ^~~~~~~~


vim +5 include/linux/kern_levels.h

314ba3520e513a Joe Perches 2012-07-30  4  
04d2c8c83d0e3a Joe Perches 2012-07-30 @5  #define KERN_SOH	"\001"		/* ASCII Start Of Header */
04d2c8c83d0e3a Joe Perches 2012-07-30  6  #define KERN_SOH_ASCII	'\001'
04d2c8c83d0e3a Joe Perches 2012-07-30  7  

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0-DAY CI Kernel Test Service
https://01.org/lkp

Re: [PATCH 1/1] drivers: edac: Fix bad bit shift operations

[kernel test robot]

Hi Priyanka,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on ras/edac-for-next]
[also build test WARNING on next-20220411]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/intel-lab-lkp/linux/commits/Priyanka-Singh/drivers-edac-Fix-bad-bit-shift-operations/20220411-190157
base:   https://git.kernel.org/pub/scm/linux/kernel/git/ras/ras.git edac-for-next
config: arm64-buildonly-randconfig-r001-20220411 (https://download.01.org/0day-ci/archive/20220412/202204120845.og2FaL10-lkp@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project c6e83f560f06cdfe8aa47b248d8bdc58f947274b)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install arm64 cross compiling tool for clang build
        # apt-get install binutils-aarch64-linux-gnu
        # https://github.com/intel-lab-lkp/linux/commit/c686e26cdea24d78450aaaff268558ea6842cd31
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Priyanka-Singh/drivers-edac-Fix-bad-bit-shift-operations/20220411-190157
        git checkout c686e26cdea24d78450aaaff268558ea6842cd31
        # save the config file to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm64 SHELL=/bin/bash drivers/edac/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> drivers/edac/fsl_ddr_edac.c:353:14: warning: data argument not used by format string [-Wformat-extra-args]
                                   cap_low, syndrome ^ (1 << bad_ecc_bit));
                                   ~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/edac/fsl_ddr_edac.h:20:55: note: expanded from macro 'fsl_mc_printk'
           edac_mc_chipset_printk(mci, level, "FSL_DDR", fmt, ##arg)
           ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~
   drivers/edac/edac_mc.h:55:60: note: expanded from macro 'edac_mc_chipset_printk'
           printk(level "EDAC " prefix " MC%d: " fmt, mci->mc_idx, ##arg)
           ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~
   include/linux/printk.h:446:60: note: expanded from macro 'printk'
   #define printk(fmt, ...) printk_index_wrap(_printk, fmt, ##__VA_ARGS__)
                            ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~
   include/linux/printk.h:418:19: note: expanded from macro 'printk_index_wrap'
                   _p_func(_fmt, ##__VA_ARGS__);                           \
                           ~~~~    ^
   1 warning generated.


vim +353 drivers/edac/fsl_ddr_edac.c

   276	
   277	static void fsl_mc_check(struct mem_ctl_info *mci)
   278	{
   279		struct fsl_mc_pdata *pdata = mci->pvt_info;
   280		struct csrow_info *csrow;
   281		u32 bus_width;
   282		u32 err_detect;
   283		u32 syndrome;
   284		u64 err_addr;
   285		u32 pfn;
   286		int row_index;
   287		u32 cap_high;
   288		u32 cap_low;
   289		int bad_data_bit;
   290		int bad_ecc_bit;
   291	
   292		err_detect = ddr_in32(pdata->mc_vbase + FSL_MC_ERR_DETECT);
   293		if (!err_detect)
   294			return;
   295	
   296		fsl_mc_printk(mci, KERN_ERR, "Err Detect Register: %#8.8x\n",
   297			      err_detect);
   298	
   299		/* no more processing if not ECC bit errors */
   300		if (!(err_detect & (DDR_EDE_SBE | DDR_EDE_MBE))) {
   301			ddr_out32(pdata->mc_vbase + FSL_MC_ERR_DETECT, err_detect);
   302			return;
   303		}
   304	
   305		syndrome = ddr_in32(pdata->mc_vbase + FSL_MC_CAPTURE_ECC);
   306	
   307		/* Mask off appropriate bits of syndrome based on bus width */
   308		bus_width = (ddr_in32(pdata->mc_vbase + FSL_MC_DDR_SDRAM_CFG) &
   309			     DSC_DBW_MASK) ? 32 : 64;
   310		if (bus_width == 64)
   311			syndrome &= 0xff;
   312		else
   313			syndrome &= 0xffff;
   314	
   315		err_addr = make64(
   316			ddr_in32(pdata->mc_vbase + FSL_MC_CAPTURE_EXT_ADDRESS),
   317			ddr_in32(pdata->mc_vbase + FSL_MC_CAPTURE_ADDRESS));
   318		pfn = err_addr >> PAGE_SHIFT;
   319	
   320		for (row_index = 0; row_index < mci->nr_csrows; row_index++) {
   321			csrow = mci->csrows[row_index];
   322			if ((pfn >= csrow->first_page) && (pfn <= csrow->last_page))
   323				break;
   324		}
   325	
   326		cap_high = ddr_in32(pdata->mc_vbase + FSL_MC_CAPTURE_DATA_HI);
   327		cap_low = ddr_in32(pdata->mc_vbase + FSL_MC_CAPTURE_DATA_LO);
   328	
   329		/*
   330		 * Analyze single-bit errors on 64-bit wide buses
   331		 * TODO: Add support for 32-bit wide buses
   332		 */
   333		if ((err_detect & DDR_EDE_SBE) && (bus_width == 64)) {
   334			sbe_ecc_decode(cap_high, cap_low, syndrome,
   335					&bad_data_bit, &bad_ecc_bit);
   336	
   337			if (bad_data_bit >= 0)
   338				fsl_mc_printk(mci, KERN_ERR,
   339					"Faulty Data bit: %d\n", bad_data_bit);
   340			if (bad_ecc_bit >= 0)
   341				fsl_mc_printk(mci, KERN_ERR,
   342						"Faulty ECC bit: %d\n", bad_ecc_bit);
   343			if ((bad_data_bit > 0 && bad_data_bit < 32) && bad_ecc_bit > 0) {
   344				fsl_mc_printk(mci, KERN_ERR,
   345					"Expected Data / ECC:\t%#8.8x_%08x / %#2.2x\n",
   346					cap_high, cap_low ^ (1 << bad_data_bit),
   347					syndrome ^ (1 << bad_ecc_bit));
   348			}
   349			if (bad_data_bit >= 32 && bad_ecc_bit > 0) {
   350				fsl_mc_printk(mci, KERN_ERR,
   351					"Expected Data / ECC:\t%#8.8x / %#2.2x\n",
   352					cap_high ^ (1 << (bad_data_bit - 32)),
 > 353					cap_low, syndrome ^ (1 << bad_ecc_bit));
   354			}
   355		}
   356	
   357		fsl_mc_printk(mci, KERN_ERR,
   358				"Captured Data / ECC:\t%#8.8x_%08x / %#2.2x\n",
   359				cap_high, cap_low, syndrome);
   360		fsl_mc_printk(mci, KERN_ERR, "Err addr: %#8.8llx\n", err_addr);
   361		fsl_mc_printk(mci, KERN_ERR, "PFN: %#8.8x\n", pfn);
   362	
   363		/* we are out of range */
   364		if (row_index == mci->nr_csrows)
   365			fsl_mc_printk(mci, KERN_ERR, "PFN out of range!\n");
   366	
   367		if (err_detect & DDR_EDE_SBE)
   368			edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
   369					     pfn, err_addr & ~PAGE_MASK, syndrome,
   370					     row_index, 0, -1,
   371					     mci->ctl_name, "");
   372	
   373		if (err_detect & DDR_EDE_MBE)
   374			edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
   375					     pfn, err_addr & ~PAGE_MASK, syndrome,
   376					     row_index, 0, -1,
   377					     mci->ctl_name, "");
   378	
   379		ddr_out32(pdata->mc_vbase + FSL_MC_ERR_DETECT, err_detect);
   380	}
   381	

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