* [PATCH v1 0/4] polarfire soc kconfig/maintainers updates
@ 2022-04-15 12:52 Conor Dooley
2022-04-15 12:52 ` [PATCH v1 1/4] riscv: select peripheral drivers for polarfire soc Conor Dooley
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: Conor Dooley @ 2022-04-15 12:52 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: Paul Walmsley, Albert Ou, linux-kernel, linux-riscv, Conor Dooley
Hey Palmer,
As discussed, Kconfig.socs updated with the recently upstreamed drivers.
I took the liberty of also adding them to the maintainers entry.
The hwrng isnt in your tree, but was accepted today.
As you suggested, I added the vitesse phy driver in the kconfig.socs
entry - lmk if you don't like what I did with the comment.
Thanks,
Conor.
Conor Dooley (4):
riscv: select peripheral drivers for polarfire soc
riscv: config: enable the mailbox framework
riscv: select vitesse phy driver for polarfire soc
MAINTAINERS: add polarfire rng, pci and clock drivers
MAINTAINERS | 3 +++
arch/riscv/Kconfig.socs | 5 +++++
arch/riscv/configs/defconfig | 1 +
3 files changed, 9 insertions(+)
--
2.35.2
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v1 1/4] riscv: select peripheral drivers for polarfire soc
2022-04-15 12:52 [PATCH v1 0/4] polarfire soc kconfig/maintainers updates Conor Dooley
@ 2022-04-15 12:52 ` Conor Dooley
2022-04-15 12:52 ` [PATCH v1 2/4] riscv: config: enable the mailbox framework Conor Dooley
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Conor Dooley @ 2022-04-15 12:52 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: Paul Walmsley, Albert Ou, linux-kernel, linux-riscv, Conor Dooley
Update the SOC_MICROCHIP_POLARFIRE kconfig entry to select, where
applicable, the supported drivers for the SoC.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
arch/riscv/Kconfig.socs | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 34592d00dde8..7f93c729d51c 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -3,6 +3,10 @@ menu "SoC selection"
config SOC_MICROCHIP_POLARFIRE
bool "Microchip PolarFire SoCs"
select MCHP_CLK_MPFS
+ select POLARFIRE_SOC_MAILBOX if MAILBOX
+ select POLARFIRE_SOC_SYS_CTRL if MAILBOX
+ select HW_RANDOM_POLARFIRE_SOC if POLARFIRE_SOC_SYS_CTRL
+ select PCIE_MICROCHIP_HOST if PCI_MSI && OF
select SIFIVE_PLIC
help
This enables support for Microchip PolarFire SoC platforms.
--
2.35.2
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v1 2/4] riscv: config: enable the mailbox framework
2022-04-15 12:52 [PATCH v1 0/4] polarfire soc kconfig/maintainers updates Conor Dooley
2022-04-15 12:52 ` [PATCH v1 1/4] riscv: select peripheral drivers for polarfire soc Conor Dooley
@ 2022-04-15 12:52 ` Conor Dooley
2022-04-15 12:52 ` [PATCH v1 3/4] riscv: select vitesse phy driver for polarfire soc Conor Dooley
2022-04-15 12:52 ` [PATCH v1 4/4] MAINTAINERS: add polarfire rng, pci and clock drivers Conor Dooley
3 siblings, 0 replies; 5+ messages in thread
From: Conor Dooley @ 2022-04-15 12:52 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: Paul Walmsley, Albert Ou, linux-kernel, linux-riscv, Conor Dooley
Add the mailbox framework so that the system controller drivers get
compiled for PolarFire SoC.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
arch/riscv/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 30e3017f22bc..e8472ffbb4dc 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -100,6 +100,7 @@ CONFIG_VIRTIO_PCI=y
CONFIG_VIRTIO_BALLOON=y
CONFIG_VIRTIO_INPUT=y
CONFIG_VIRTIO_MMIO=y
+CONFIG_MAILBOX=y
CONFIG_RPMSG_CHAR=y
CONFIG_RPMSG_VIRTIO=y
CONFIG_EXT4_FS=y
--
2.35.2
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v1 3/4] riscv: select vitesse phy driver for polarfire soc
2022-04-15 12:52 [PATCH v1 0/4] polarfire soc kconfig/maintainers updates Conor Dooley
2022-04-15 12:52 ` [PATCH v1 1/4] riscv: select peripheral drivers for polarfire soc Conor Dooley
2022-04-15 12:52 ` [PATCH v1 2/4] riscv: config: enable the mailbox framework Conor Dooley
@ 2022-04-15 12:52 ` Conor Dooley
2022-04-15 12:52 ` [PATCH v1 4/4] MAINTAINERS: add polarfire rng, pci and clock drivers Conor Dooley
3 siblings, 0 replies; 5+ messages in thread
From: Conor Dooley @ 2022-04-15 12:52 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: Paul Walmsley, Albert Ou, linux-kernel, linux-riscv, Conor Dooley
There is a Vitesse VSC8662 on the Icicle Kit, until a better option
exists, select it in Kconfig.socs for SOC_MICROCHIP_POLARFIRE.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
Palmer: You said to put in a comment, but I have no idea how Kconfig
expects a mid line comment to look. kbuild didn't seem to complain about
what I did, but lmk if that's not what you meant.
---
arch/riscv/Kconfig.socs | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 7f93c729d51c..ff2b8b90db19 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -8,6 +8,7 @@ config SOC_MICROCHIP_POLARFIRE
select HW_RANDOM_POLARFIRE_SOC if POLARFIRE_SOC_SYS_CTRL
select PCIE_MICROCHIP_HOST if PCI_MSI && OF
select SIFIVE_PLIC
+ select VITESSE_PHY # present on icicle kit
help
This enables support for Microchip PolarFire SoC platforms.
--
2.35.2
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v1 4/4] MAINTAINERS: add polarfire rng, pci and clock drivers
2022-04-15 12:52 [PATCH v1 0/4] polarfire soc kconfig/maintainers updates Conor Dooley
` (2 preceding siblings ...)
2022-04-15 12:52 ` [PATCH v1 3/4] riscv: select vitesse phy driver for polarfire soc Conor Dooley
@ 2022-04-15 12:52 ` Conor Dooley
3 siblings, 0 replies; 5+ messages in thread
From: Conor Dooley @ 2022-04-15 12:52 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: Paul Walmsley, Albert Ou, linux-kernel, linux-riscv, Conor Dooley
Hardware random, PCI and clock drivers for the PolarFire SoC have been
upstreamed but are not covered by the MAINTAINERS entry, so add them.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
MAINTAINERS | 3 +++
1 file changed, 3 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index fd768d43e048..a1df9c89bd11 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -16944,7 +16944,10 @@ M: Conor Dooley <conor.dooley@microchip.com>
L: linux-riscv@lists.infradead.org
S: Supported
F: arch/riscv/boot/dts/microchip/
+F: drivers/char/hw_random/mpfs-rng.c
+F: drivers/clk/microchip/clk-mpfs.c
F: drivers/mailbox/mailbox-mpfs.c
+F: drivers/pci/controller/pcie-microchip-host.c
F: drivers/soc/microchip/
F: include/soc/microchip/mpfs.h
--
2.35.2
^ permalink raw reply related [flat|nested] 5+ messages in thread
end of thread, other threads:[~2022-04-15 12:54 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2022-04-15 12:52 [PATCH v1 0/4] polarfire soc kconfig/maintainers updates Conor Dooley
2022-04-15 12:52 ` [PATCH v1 1/4] riscv: select peripheral drivers for polarfire soc Conor Dooley
2022-04-15 12:52 ` [PATCH v1 2/4] riscv: config: enable the mailbox framework Conor Dooley
2022-04-15 12:52 ` [PATCH v1 3/4] riscv: select vitesse phy driver for polarfire soc Conor Dooley
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