[PATCH 0/3] dt-bindings: arm: mediatek: Convert some docs to DT schema

[PATCH 0/3] dt-bindings: arm: mediatek: Convert some docs to DT schema

[Yassine Oudjana]

From: Yassine Oudjana <y.oudjana@protonmail.com>

This series includes DT schema conversions for topckgen, apmixedsys
and infracfg bindings.

Yassine Oudjana (3):
  dt-bindings: arm: mediatek: topckgen: Convert to DT schema
  dt-bindings: arm: mediatek: apmixedsys: Convert to DT schema
  dt-bindings: arm: mediatek: infracfg: Convert to DT schema

 .../arm/mediatek/mediatek,apmixedsys.txt      | 35 --------
 .../arm/mediatek/mediatek,apmixedsys.yaml     | 60 ++++++++++++++
 .../arm/mediatek/mediatek,infracfg.txt        | 42 ----------
 .../arm/mediatek/mediatek,infracfg.yaml       | 79 +++++++++++++++++++
 .../arm/mediatek/mediatek,topckgen.txt        | 35 --------
 .../arm/mediatek/mediatek,topckgen.yaml       | 60 ++++++++++++++
 6 files changed, 199 insertions(+), 112 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt
 create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.yaml
 delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt
 create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml
 delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt
 create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.yaml

-- 
2.35.3

[PATCH 1/3] dt-bindings: arm: mediatek: topckgen: Convert to DT schema

[Yassine Oudjana]

From: Yassine Oudjana <y.oudjana@protonmail.com>

Convert topckgen bindings to DT schema format. MT2701, MT7623 and
MT7629 device trees currently have the syscon compatible without
it being mentioned in the old DT bindings file which introduces
dtbs_check errors when converting to DT schema as-is, so
mediatek,mt2701-topckgen and mediatek,mt7629-topckgen are placed
in the last items list with the syscon compatible, and syscon is
added to the mediatek,mt7623-topckgen list.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
---
 .../arm/mediatek/mediatek,topckgen.txt        | 35 -----------
 .../arm/mediatek/mediatek,topckgen.yaml       | 60 +++++++++++++++++++
 2 files changed, 60 insertions(+), 35 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt
 create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.yaml

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt
deleted file mode 100644
index b82422bb717f..000000000000
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt
+++ /dev/null
@@ -1,35 +0,0 @@
-Mediatek topckgen controller
-============================
-
-The Mediatek topckgen controller provides various clocks to the system.
-
-Required Properties:
-
-- compatible: Should be one of:
-	- "mediatek,mt2701-topckgen"
-	- "mediatek,mt2712-topckgen", "syscon"
-	- "mediatek,mt6765-topckgen", "syscon"
-	- "mediatek,mt6779-topckgen", "syscon"
-	- "mediatek,mt6797-topckgen"
-	- "mediatek,mt7622-topckgen"
-	- "mediatek,mt7623-topckgen", "mediatek,mt2701-topckgen"
-	- "mediatek,mt7629-topckgen"
-	- "mediatek,mt7986-topckgen", "syscon"
-	- "mediatek,mt8135-topckgen"
-	- "mediatek,mt8167-topckgen", "syscon"
-	- "mediatek,mt8173-topckgen"
-	- "mediatek,mt8183-topckgen", "syscon"
-	- "mediatek,mt8516-topckgen"
-- #clock-cells: Must be 1
-
-The topckgen controller uses the common clk binding from
-Documentation/devicetree/bindings/clock/clock-bindings.txt
-The available clocks are defined in dt-bindings/clock/mt*-clk.h.
-
-Example:
-
-topckgen: power-controller@10000000 {
-	compatible = "mediatek,mt8173-topckgen";
-	reg = <0 0x10000000 0 0x1000>;
-	#clock-cells = <1>;
-};
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.yaml
new file mode 100644
index 000000000000..9ce9cf673cbc
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.yaml
@@ -0,0 +1,60 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,topckgen.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: MediaTek Top Clock Generator Controller
+
+maintainers:
+  - Matthias Brugger <matthias.bgg@gmail.com>
+
+description:
+  The Mediatek topckgen controller provides various clocks to the system.
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - enum:
+              - mediatek,mt6797-topckgen
+              - mediatek,mt7622-topckgen
+              - mediatek,mt8135-topckgen
+              - mediatek,mt8173-topckgen
+              - mediatek,mt8516-topckgen
+      - items:
+          - const: mediatek,mt7623-topckgen
+          - const: mediatek,mt2701-topckgen
+          - const: syscon
+      - items:
+          - enum:
+              - mediatek,mt2701-topckgen
+              - mediatek,mt2712-topckgen
+              - mediatek,mt6765-topckgen
+              - mediatek,mt6779-topckgen
+              - mediatek,mt7629-topckgen
+              - mediatek,mt7986-topckgen
+              - mediatek,mt8167-topckgen
+              - mediatek,mt8183-topckgen
+          - const: syscon
+
+  reg:
+    maxItems: 1
+
+  '#clock-cells':
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    topckgen: clock-controller@10000000 {
+        compatible = "mediatek,mt8173-topckgen";
+        reg = <0x10000000 0x1000>;
+        #clock-cells = <1>;
+    };
-- 
2.35.3

[PATCH 2/3] dt-bindings: arm: mediatek: apmixedsys: Convert to DT schema

[Yassine Oudjana]

From: Yassine Oudjana <y.oudjana@protonmail.com>

Convert apmixedsys bindings to DT schema format. MT2701, MT7623 and
MT7629 device trees currently have the syscon compatible without
it being mentioned in the old DT bindings file which introduces
dtbs_check errors when converting to DT schema as-is, so
mediatek,mt2701-apmixedsys and mediatek,mt7629-apmixedsys are placed
in the last items list with the syscon compatible, and syscon is
added to the mediatek,mt7623-apmixedsys list.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
---
 .../arm/mediatek/mediatek,apmixedsys.txt      | 35 -----------
 .../arm/mediatek/mediatek,apmixedsys.yaml     | 60 +++++++++++++++++++
 2 files changed, 60 insertions(+), 35 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt
 create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.yaml

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt
deleted file mode 100644
index 3fa755866528..000000000000
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt
+++ /dev/null
@@ -1,35 +0,0 @@
-Mediatek apmixedsys controller
-==============================
-
-The Mediatek apmixedsys controller provides the PLLs to the system.
-
-Required Properties:
-
-- compatible: Should be one of:
-	- "mediatek,mt2701-apmixedsys"
-	- "mediatek,mt2712-apmixedsys", "syscon"
-	- "mediatek,mt6765-apmixedsys", "syscon"
-	- "mediatek,mt6779-apmixedsys", "syscon"
-	- "mediatek,mt6797-apmixedsys"
-	- "mediatek,mt7622-apmixedsys"
-	- "mediatek,mt7623-apmixedsys", "mediatek,mt2701-apmixedsys"
-	- "mediatek,mt7629-apmixedsys"
-	- "mediatek,mt7986-apmixedsys"
-	- "mediatek,mt8135-apmixedsys"
-	- "mediatek,mt8167-apmixedsys", "syscon"
-	- "mediatek,mt8173-apmixedsys"
-	- "mediatek,mt8183-apmixedsys", "syscon"
-	- "mediatek,mt8516-apmixedsys"
-- #clock-cells: Must be 1
-
-The apmixedsys controller uses the common clk binding from
-Documentation/devicetree/bindings/clock/clock-bindings.txt
-The available clocks are defined in dt-bindings/clock/mt*-clk.h.
-
-Example:
-
-apmixedsys: clock-controller@10209000 {
-	compatible = "mediatek,mt8173-apmixedsys";
-	reg = <0 0x10209000 0 0x1000>;
-	#clock-cells = <1>;
-};
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.yaml
new file mode 100644
index 000000000000..fc967fdc8aec
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.yaml
@@ -0,0 +1,60 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,apmixedsys.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: MediaTek AP Mixedsys Controller
+
+maintainers:
+  - Matthias Brugger <matthias.bgg@gmail.com>
+
+description:
+  The Mediatek apmixedsys controller provides PLLs to the system.
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - enum:
+              - mediatek,mt6797-apmixedsys
+              - mediatek,mt7622-apmixedsys
+              - mediatek,mt7986-apmixedsys
+              - mediatek,mt8135-apmixedsys
+              - mediatek,mt8173-apmixedsys
+              - mediatek,mt8516-apmixedsys
+      - items:
+          - const: mediatek,mt7623-apmixedsys
+          - const: mediatek,mt2701-apmixedsys
+          - const: syscon
+      - items:
+          - enum:
+              - mediatek,mt2701-apmixedsys
+              - mediatek,mt2712-apmixedsys
+              - mediatek,mt6765-apmixedsys
+              - mediatek,mt6779-apmixedsys
+              - mediatek,mt7629-apmixedsys
+              - mediatek,mt8167-apmixedsys
+              - mediatek,mt8183-apmixedsys
+          - const: syscon
+
+  reg:
+    maxItems: 1
+
+  '#clock-cells':
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    apmixedsys: clock-controller@10209000 {
+        compatible = "mediatek,mt8173-apmixedsys";
+        reg = <0x10209000 0x1000>;
+        #clock-cells = <1>;
+    };
-- 
2.35.3

[PATCH 3/3] dt-bindings: arm: mediatek: infracfg: Convert to DT schema

[Yassine Oudjana]

From: Yassine Oudjana <y.oudjana@protonmail.com>

Convert infracfg bindings to DT schema format. Not all drivers
currently implement resets, so #reset-cells is made a required
property only for those that do. Using power-controller in the
example node name makes #power-domain-cells required causing
a dt_binding_check error. To solve this, the node is renamed to
syscon@10001000.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
---
 .../arm/mediatek/mediatek,infracfg.txt        | 42 ----------
 .../arm/mediatek/mediatek,infracfg.yaml       | 79 +++++++++++++++++++
 2 files changed, 79 insertions(+), 42 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt
 create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt
deleted file mode 100644
index f66bd720571d..000000000000
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt
+++ /dev/null
@@ -1,42 +0,0 @@
-Mediatek infracfg controller
-============================
-
-The Mediatek infracfg controller provides various clocks and reset
-outputs to the system.
-
-Required Properties:
-
-- compatible: Should be one of:
-	- "mediatek,mt2701-infracfg", "syscon"
-	- "mediatek,mt2712-infracfg", "syscon"
-	- "mediatek,mt6765-infracfg", "syscon"
-	- "mediatek,mt6779-infracfg_ao", "syscon"
-	- "mediatek,mt6797-infracfg", "syscon"
-	- "mediatek,mt7622-infracfg", "syscon"
-	- "mediatek,mt7623-infracfg", "mediatek,mt2701-infracfg", "syscon"
-	- "mediatek,mt7629-infracfg", "syscon"
-	- "mediatek,mt7986-infracfg", "syscon"
-	- "mediatek,mt8135-infracfg", "syscon"
-	- "mediatek,mt8167-infracfg", "syscon"
-	- "mediatek,mt8173-infracfg", "syscon"
-	- "mediatek,mt8183-infracfg", "syscon"
-	- "mediatek,mt8516-infracfg", "syscon"
-- #clock-cells: Must be 1
-- #reset-cells: Must be 1
-
-The infracfg controller uses the common clk binding from
-Documentation/devicetree/bindings/clock/clock-bindings.txt
-The available clocks are defined in dt-bindings/clock/mt*-clk.h.
-Also it uses the common reset controller binding from
-Documentation/devicetree/bindings/reset/reset.txt.
-The available reset outputs are defined in
-dt-bindings/reset/mt*-resets.h
-
-Example:
-
-infracfg: power-controller@10001000 {
-	compatible = "mediatek,mt8173-infracfg", "syscon";
-	reg = <0 0x10001000 0 0x1000>;
-	#clock-cells = <1>;
-	#reset-cells = <1>;
-};
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml
new file mode 100644
index 000000000000..4f43fe9f103e
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml
@@ -0,0 +1,79 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,infracfg.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: MediaTek Infrastructure System Configuration Controller
+
+maintainers:
+  - Matthias Brugger <matthias.bgg@gmail.com>
+
+description:
+  The Mediatek infracfg controller provides various clocks and reset outputs
+  to the system.
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - enum:
+              - mediatek,mt2701-infracfg
+              - mediatek,mt2712-infracfg
+              - mediatek,mt6765-infracfg
+              - mediatek,mt6779-infracfg_ao
+              - mediatek,mt6797-infracfg
+              - mediatek,mt7622-infracfg
+              - mediatek,mt7629-infracfg
+              - mediatek,mt7986-infracfg
+              - mediatek,mt8135-infracfg
+              - mediatek,mt8167-infracfg
+              - mediatek,mt8173-infracfg
+              - mediatek,mt8183-infracfg
+              - mediatek,mt8516-infracfg
+          - const: syscon
+      - items:
+          - const: mediatek,mt7623-infracfg
+          - const: mediatek,mt2701-infracfg
+          - const: syscon
+
+  reg:
+    maxItems: 1
+
+  '#clock-cells':
+    const: 1
+
+  '#reset-cells':
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - '#clock-cells'
+
+if:
+  properties:
+    compatible:
+      contains:
+        enum:
+          - mediatek,mt2701-infracfg
+          - mediatek,mt2712-infracfg
+          - mediatek,mt7622-infracfg
+          - mediatek,mt7986-infracfg
+          - mediatek,mt8135-infracfg
+          - mediatek,mt8173-infracfg
+          - mediatek,mt8183-infracfg
+then:
+  required:
+    - '#reset-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    infracfg: syscon@10001000 {
+        compatible = "mediatek,mt8173-infracfg", "syscon";
+        reg = <0x10001000 0x1000>;
+        #clock-cells = <1>;
+        #reset-cells = <1>;
+    };
-- 
2.35.3

Re: [PATCH 3/3] dt-bindings: arm: mediatek: infracfg: Convert to DT schema

[Rob Herring]

On Tue, 19 Apr 2022 22:09:39 +0400, Yassine Oudjana wrote:
> From: Yassine Oudjana <y.oudjana@protonmail.com>
> 
> Convert infracfg bindings to DT schema format. Not all drivers
> currently implement resets, so #reset-cells is made a required
> property only for those that do. Using power-controller in the
> example node name makes #power-domain-cells required causing
> a dt_binding_check error. To solve this, the node is renamed to
> syscon@10001000.
> 
> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
> ---
>  .../arm/mediatek/mediatek,infracfg.txt        | 42 ----------
>  .../arm/mediatek/mediatek,infracfg.yaml       | 79 +++++++++++++++++++
>  2 files changed, 79 insertions(+), 42 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt
>  create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml
> 

Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.

Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.

Full log is available here: https://patchwork.ozlabs.org/patch/


infracfg@10001000: '#reset-cells' is a required property
	arch/arm64/boot/dts/mediatek/mt7986a-rfb.dtb
	arch/arm64/boot/dts/mediatek/mt7986b-rfb.dtb

syscon@10001000: '#reset-cells' is a required property
	arch/arm64/boot/dts/mediatek/mt2712-evb.dtb

Re: [PATCH 1/3] dt-bindings: arm: mediatek: topckgen: Convert to DT schema

[Krzysztof Kozlowski]

On 19/04/2022 20:09, Yassine Oudjana wrote:
> From: Yassine Oudjana <y.oudjana@protonmail.com>
> 
> Convert topckgen bindings to DT schema format. MT2701, MT7623 and
> MT7629 device trees currently have the syscon compatible without
> it being mentioned in the old DT bindings file which introduces
> dtbs_check errors when converting to DT schema as-is, so
> mediatek,mt2701-topckgen and mediatek,mt7629-topckgen are placed
> in the last items list with the syscon compatible, and syscon is
> added to the mediatek,mt7623-topckgen list.
>

Thank you for your patch. There is something to discuss/improve.

> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.yaml
> new file mode 100644
> index 000000000000..9ce9cf673cbc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.yaml
> @@ -0,0 +1,60 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,topckgen.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: MediaTek Top Clock Generator Controller
> +
> +maintainers:
> +  - Matthias Brugger <matthias.bgg@gmail.com>
> +
> +description:
> +  The Mediatek topckgen controller provides various clocks to the system.
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - items:

These are not a list, so skip items. Just enum. Rest looks good.

> +          - enum:
> +              - mediatek,mt6797-topckgen
> +              - mediatek,mt7622-topckgen
> +              - mediatek,mt8135-topckgen
> +              - mediatek,mt8173-topckgen
> +              - mediatek,mt8516-topckgen



Best regards,
Krzysztof

Re: [PATCH 1/3] dt-bindings: arm: mediatek: topckgen: Convert to DT schema

[Krzysztof Kozlowski]

On 20/04/2022 08:47, Krzysztof Kozlowski wrote:
> On 19/04/2022 20:09, Yassine Oudjana wrote:
>> From: Yassine Oudjana <y.oudjana@protonmail.com>
>>
>> Convert topckgen bindings to DT schema format. MT2701, MT7623 and
>> MT7629 device trees currently have the syscon compatible without
>> it being mentioned in the old DT bindings file which introduces
>> dtbs_check errors when converting to DT schema as-is, so
>> mediatek,mt2701-topckgen and mediatek,mt7629-topckgen are placed
>> in the last items list with the syscon compatible, and syscon is
>> added to the mediatek,mt7623-topckgen list.
>>
> 
> Thank you for your patch. There is something to discuss/improve.
> 
>> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.yaml
>> new file mode 100644
>> index 000000000000..9ce9cf673cbc
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.yaml
>> @@ -0,0 +1,60 @@
>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,topckgen.yaml#"
>> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
>> +
>> +title: MediaTek Top Clock Generator Controller
>> +
>> +maintainers:
>> +  - Matthias Brugger <matthias.bgg@gmail.com>
>> +
>> +description:
>> +  The Mediatek topckgen controller provides various clocks to the system.
>> +
>> +properties:
>> +  compatible:
>> +    oneOf:
>> +      - items:
> 
> These are not a list, so skip items. Just enum. Rest looks good.

Actually one more through - this looks like clock-controller, so please
move the binding to ../bindings/clock/ directory.


Best regards,
Krzysztof

Re: [PATCH 2/3] dt-bindings: arm: mediatek: apmixedsys: Convert to DT schema

[Krzysztof Kozlowski]

On 19/04/2022 20:09, Yassine Oudjana wrote:

Thank you for your patch. There is something to discuss/improve.

> +
> +title: MediaTek AP Mixedsys Controller
> +
> +maintainers:
> +  - Matthias Brugger <matthias.bgg@gmail.com>
> +
> +description:
> +  The Mediatek apmixedsys controller provides PLLs to the system.
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - items:
> +          - enum:

Same comments as patch 1 - no need for items here, just enum. Please
also put the new binding in clock subsystem.

Best regards,
Krzysztof

Re: [PATCH 3/3] dt-bindings: arm: mediatek: infracfg: Convert to DT schema

[Krzysztof Kozlowski]

On 19/04/2022 20:09, Yassine Oudjana wrote:
> From: Yassine Oudjana <y.oudjana@protonmail.com>
> 
> Convert infracfg bindings to DT schema format. Not all drivers
> currently implement resets, so #reset-cells is made a required
> property only for those that do. Using power-controller in the
> example node name makes #power-domain-cells required causing
> a dt_binding_check error. To solve this, the node is renamed to
> syscon@10001000.
> 
> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
> ---
>  .../arm/mediatek/mediatek,infracfg.txt        | 42 ----------
>  .../arm/mediatek/mediatek,infracfg.yaml       | 79 +++++++++++++++++++
>  2 files changed, 79 insertions(+), 42 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt
>  create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml
> 
> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt
> deleted file mode 100644
> index f66bd720571d..000000000000
> --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt
> +++ /dev/null
> @@ -1,42 +0,0 @@
> -Mediatek infracfg controller
> -============================
> -
> -The Mediatek infracfg controller provides various clocks and reset
> -outputs to the system.
> -
> -Required Properties:
> -
> -- compatible: Should be one of:
> -	- "mediatek,mt2701-infracfg", "syscon"
> -	- "mediatek,mt2712-infracfg", "syscon"
> -	- "mediatek,mt6765-infracfg", "syscon"
> -	- "mediatek,mt6779-infracfg_ao", "syscon"
> -	- "mediatek,mt6797-infracfg", "syscon"
> -	- "mediatek,mt7622-infracfg", "syscon"
> -	- "mediatek,mt7623-infracfg", "mediatek,mt2701-infracfg", "syscon"
> -	- "mediatek,mt7629-infracfg", "syscon"
> -	- "mediatek,mt7986-infracfg", "syscon"
> -	- "mediatek,mt8135-infracfg", "syscon"
> -	- "mediatek,mt8167-infracfg", "syscon"
> -	- "mediatek,mt8173-infracfg", "syscon"
> -	- "mediatek,mt8183-infracfg", "syscon"
> -	- "mediatek,mt8516-infracfg", "syscon"
> -- #clock-cells: Must be 1
> -- #reset-cells: Must be 1
> -
> -The infracfg controller uses the common clk binding from
> -Documentation/devicetree/bindings/clock/clock-bindings.txt
> -The available clocks are defined in dt-bindings/clock/mt*-clk.h.
> -Also it uses the common reset controller binding from
> -Documentation/devicetree/bindings/reset/reset.txt.
> -The available reset outputs are defined in
> -dt-bindings/reset/mt*-resets.h
> -
> -Example:
> -
> -infracfg: power-controller@10001000 {
> -	compatible = "mediatek,mt8173-infracfg", "syscon";
> -	reg = <0 0x10001000 0 0x1000>;
> -	#clock-cells = <1>;
> -	#reset-cells = <1>;
> -};
> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml
> new file mode 100644
> index 000000000000..4f43fe9f103e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml
> @@ -0,0 +1,79 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,infracfg.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: MediaTek Infrastructure System Configuration Controller
> +
> +maintainers:
> +  - Matthias Brugger <matthias.bgg@gmail.com>
> +
> +description:
> +  The Mediatek infracfg controller provides various clocks and reset outputs
> +  to the system.

Mention here the headers with clock and reset constants. The same for
patches 1 and 2.

> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - items:
> +          - enum:
> +              - mediatek,mt2701-infracfg
> +              - mediatek,mt2712-infracfg
> +              - mediatek,mt6765-infracfg
> +              - mediatek,mt6779-infracfg_ao
> +              - mediatek,mt6797-infracfg
> +              - mediatek,mt7622-infracfg
> +              - mediatek,mt7629-infracfg
> +              - mediatek,mt7986-infracfg
> +              - mediatek,mt8135-infracfg
> +              - mediatek,mt8167-infracfg
> +              - mediatek,mt8173-infracfg
> +              - mediatek,mt8183-infracfg
> +              - mediatek,mt8516-infracfg
> +          - const: syscon
> +      - items:
> +          - const: mediatek,mt7623-infracfg
> +          - const: mediatek,mt2701-infracfg
> +          - const: syscon
> +
> +  reg:
> +    maxItems: 1
> +
> +  '#clock-cells':
> +    const: 1
> +
> +  '#reset-cells':
> +    const: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - '#clock-cells'
> +
> +if:
> +  properties:
> +    compatible:
> +      contains:
> +        enum:
> +          - mediatek,mt2701-infracfg
> +          - mediatek,mt2712-infracfg
> +          - mediatek,mt7622-infracfg
> +          - mediatek,mt7986-infracfg
> +          - mediatek,mt8135-infracfg
> +          - mediatek,mt8173-infracfg
> +          - mediatek,mt8183-infracfg
> +then:
> +  required:
> +    - '#reset-cells'
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    infracfg: syscon@10001000 {

reset-controller or clock-controller instead, because syscon is for
blocks having only the syscon function.

Best regards,
Krzysztof

Re: [PATCH 0/3] dt-bindings: arm: mediatek: Convert some docs to DT schema

[Matthias Brugger]

On 19/04/2022 20:09, Yassine Oudjana wrote:
> From: Yassine Oudjana <y.oudjana@protonmail.com>
> 
> This series includes DT schema conversions for topckgen, apmixedsys
> and infracfg bindings.
> 

Thanks for the effort. Regarding the bindings Krzysztof mentioned should go into 
bindings/clock/ directory: please add the clock maintainers as maintainers of 
the bindings.

Thanks!
Matthias

> Yassine Oudjana (3):
>    dt-bindings: arm: mediatek: topckgen: Convert to DT schema
>    dt-bindings: arm: mediatek: apmixedsys: Convert to DT schema
>    dt-bindings: arm: mediatek: infracfg: Convert to DT schema
> 
>   .../arm/mediatek/mediatek,apmixedsys.txt      | 35 --------
>   .../arm/mediatek/mediatek,apmixedsys.yaml     | 60 ++++++++++++++
>   .../arm/mediatek/mediatek,infracfg.txt        | 42 ----------
>   .../arm/mediatek/mediatek,infracfg.yaml       | 79 +++++++++++++++++++
>   .../arm/mediatek/mediatek,topckgen.txt        | 35 --------
>   .../arm/mediatek/mediatek,topckgen.yaml       | 60 ++++++++++++++
>   6 files changed, 199 insertions(+), 112 deletions(-)
>   delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt
>   create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.yaml
>   delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt
>   create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml
>   delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt
>   create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.yaml
>