* [PATCH] arm64: dts: mt7622: specify the L2 cache topology
@ 2022-04-28 22:57 Rui Salvaterra
2022-04-29 12:58 ` Matthias Brugger
0 siblings, 1 reply; 2+ messages in thread
From: Rui Salvaterra @ 2022-04-28 22:57 UTC (permalink / raw)
To: linux-arm-kernel, linux-mediatek, linux-kernel
Cc: matthias.bgg, ryder.lee, daniel, Rui Salvaterra
On an MT7622 system, the kernel complains of not being able to detect the cache
hierarchy of CPU 0. Specify the shared L2 cache node in the device tree, in
order to fix this.
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
---
arch/arm64/boot/dts/mediatek/mt7622.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
index 6f8cb3ad1e84..3d6eaf6dd078 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -80,6 +80,7 @@ cpu0: cpu@0 {
enable-method = "psci";
clock-frequency = <1300000000>;
cci-control-port = <&cci_control2>;
+ next-level-cache = <&L2>;
};
cpu1: cpu@1 {
@@ -94,6 +95,12 @@ cpu1: cpu@1 {
enable-method = "psci";
clock-frequency = <1300000000>;
cci-control-port = <&cci_control2>;
+ next-level-cache = <&L2>;
+ };
+
+ L2: l2-cache {
+ compatible = "cache";
+ cache-level = <2>;
};
};
--
2.36.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] arm64: dts: mt7622: specify the L2 cache topology
2022-04-28 22:57 [PATCH] arm64: dts: mt7622: specify the L2 cache topology Rui Salvaterra
@ 2022-04-29 12:58 ` Matthias Brugger
0 siblings, 0 replies; 2+ messages in thread
From: Matthias Brugger @ 2022-04-29 12:58 UTC (permalink / raw)
To: Rui Salvaterra, linux-arm-kernel, linux-mediatek, linux-kernel
Cc: ryder.lee, daniel
On 29/04/2022 00:57, Rui Salvaterra wrote:
> On an MT7622 system, the kernel complains of not being able to detect the cache
> hierarchy of CPU 0. Specify the shared L2 cache node in the device tree, in
> order to fix this.
>
> Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
Applied, thanks!
> ---
> arch/arm64/boot/dts/mediatek/mt7622.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> index 6f8cb3ad1e84..3d6eaf6dd078 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> @@ -80,6 +80,7 @@ cpu0: cpu@0 {
> enable-method = "psci";
> clock-frequency = <1300000000>;
> cci-control-port = <&cci_control2>;
> + next-level-cache = <&L2>;
> };
>
> cpu1: cpu@1 {
> @@ -94,6 +95,12 @@ cpu1: cpu@1 {
> enable-method = "psci";
> clock-frequency = <1300000000>;
> cci-control-port = <&cci_control2>;
> + next-level-cache = <&L2>;
> + };
> +
> + L2: l2-cache {
> + compatible = "cache";
> + cache-level = <2>;
> };
> };
>
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2022-04-29 12:58 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-04-28 22:57 [PATCH] arm64: dts: mt7622: specify the L2 cache topology Rui Salvaterra
2022-04-29 12:58 ` Matthias Brugger
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).