* [PATCH 1/4] dt-bindings: mmc/sdhci-msm: Convert bindings to yaml
2022-04-29 22:08 [PATCH 0/4] mmc: sdhci-msm: Convert dt-binding to yaml & add support for sm8150 Bhupesh Sharma
@ 2022-04-29 22:08 ` Bhupesh Sharma
2022-05-02 15:33 ` Rob Herring
2022-05-04 20:46 ` Rob Herring
2022-04-29 22:08 ` [PATCH 2/4] mmc: host/sdhci-msm: Add SoC specific compatibles Bhupesh Sharma
` (3 subsequent siblings)
4 siblings, 2 replies; 11+ messages in thread
From: Bhupesh Sharma @ 2022-04-29 22:08 UTC (permalink / raw)
To: linux-mmc
Cc: bhupesh.sharma, bhupesh.linux, agross, linux-arm-msm,
linux-kernel, devicetree, robh+dt, bjorn.andersson, ulf.hansson,
robh
Convert Qualcomm sdhci-msm devicetree binding to YAML.
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
.../devicetree/bindings/mmc/sdhci-msm.txt | 123 -----------
.../devicetree/bindings/mmc/sdhci-msm.yaml | 192 ++++++++++++++++++
2 files changed, 192 insertions(+), 123 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/mmc/sdhci-msm.txt
create mode 100644 Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
deleted file mode 100644
index 6216ed777343..000000000000
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
+++ /dev/null
@@ -1,123 +0,0 @@
-* Qualcomm SDHCI controller (sdhci-msm)
-
-This file documents differences between the core properties in mmc.txt
-and the properties used by the sdhci-msm driver.
-
-Required properties:
-- compatible: Should contain a SoC-specific string and a IP version string:
- version strings:
- "qcom,sdhci-msm-v4" for sdcc versions less than 5.0
- "qcom,sdhci-msm-v5" for sdcc version 5.0
- For SDCC version 5.0.0, MCI registers are removed from SDCC
- interface and some registers are moved to HC. New compatible
- string is added to support this change - "qcom,sdhci-msm-v5".
- full compatible strings with SoC and version:
- "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"
- "qcom,msm8226-sdhci", "qcom,sdhci-msm-v4"
- "qcom,msm8953-sdhci", "qcom,sdhci-msm-v4"
- "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4"
- "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4"
- "qcom,msm8992-sdhci", "qcom,sdhci-msm-v4"
- "qcom,msm8994-sdhci", "qcom,sdhci-msm-v4"
- "qcom,msm8996-sdhci", "qcom,sdhci-msm-v4"
- "qcom,qcs404-sdhci", "qcom,sdhci-msm-v5"
- "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5";
- "qcom,sc7280-sdhci", "qcom,sdhci-msm-v5";
- "qcom,sdm845-sdhci", "qcom,sdhci-msm-v5"
- "qcom,sdx55-sdhci", "qcom,sdhci-msm-v5";
- "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5"
- NOTE that some old device tree files may be floating around that only
- have the string "qcom,sdhci-msm-v4" without the SoC compatible string
- but doing that should be considered a deprecated practice.
-
-- reg: Base address and length of the register in the following order:
- - Host controller register map (required)
- - SD Core register map (required for controllers earlier than msm-v5)
- - CQE register map (Optional, CQE support is present on SDHC instance meant
- for eMMC and version v4.2 and above)
- - Inline Crypto Engine register map (optional)
-- reg-names: When CQE register map is supplied, below reg-names are required
- - "hc" for Host controller register map
- - "core" for SD core register map
- - "cqhci" for CQE register map
- - "ice" for Inline Crypto Engine register map (optional)
-- interrupts: Should contain an interrupt-specifiers for the interrupts:
- - Host controller interrupt (required)
-- pinctrl-names: Should contain only one value - "default".
-- pinctrl-0: Should specify pin control groups used for this controller.
-- clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock-names.
-- clock-names: Should contain the following:
- "iface" - Main peripheral bus clock (PCLK/HCLK - AHB Bus clock) (required)
- "core" - SDC MMC clock (MCLK) (required)
- "bus" - SDCC bus voter clock (optional)
- "xo" - TCXO clock (optional)
- "cal" - reference clock for RCLK delay calibration (optional)
- "sleep" - sleep clock for RCLK delay calibration (optional)
- "ice" - clock for Inline Crypto Engine (optional)
-
-- qcom,ddr-config: Certain chipsets and platforms require particular settings
- for the DDR_CONFIG register. Use this field to specify the register
- value as per the Hardware Programming Guide.
-
-- qcom,dll-config: Chipset and Platform specific value. Use this field to
- specify the DLL_CONFIG register value as per Hardware Programming Guide.
-
-Optional Properties:
-* Following bus parameters are required for interconnect bandwidth scaling:
-- interconnects: Pairs of phandles and interconnect provider specifier
- to denote the edge source and destination ports of
- the interconnect path.
-
-- interconnect-names: For sdhc, we have two main paths.
- 1. Data path : sdhc to ddr
- 2. Config path : cpu to sdhc
- For Data interconnect path the name supposed to be
- is "sdhc-ddr" and for config interconnect path it is
- "cpu-sdhc".
- Please refer to Documentation/devicetree/bindings/
- interconnect/ for more details.
-
-Example:
-
- sdhc_1: sdhci@f9824900 {
- compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
- reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
- interrupts = <0 123 0>;
- bus-width = <8>;
- non-removable;
-
- vmmc-supply = <&pm8941_l20>;
- vqmmc-supply = <&pm8941_s3>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&sdc1_clk &sdc1_cmd &sdc1_data>;
-
- clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
- clock-names = "core", "iface";
- interconnects = <&qnoc MASTER_SDCC_ID &qnoc SLAVE_DDR_ID>,
- <&qnoc MASTER_CPU_ID &qnoc SLAVE_SDCC_ID>;
- interconnect-names = "sdhc-ddr","cpu-sdhc";
-
- qcom,dll-config = <0x000f642c>;
- qcom,ddr-config = <0x80040868>;
- };
-
- sdhc_2: sdhci@f98a4900 {
- compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
- reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
- interrupts = <0 125 0>;
- bus-width = <4>;
- cd-gpios = <&msmgpio 62 0x1>;
-
- vmmc-supply = <&pm8941_l21>;
- vqmmc-supply = <&pm8941_l13>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data>;
-
- clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>;
- clock-names = "core", "iface";
-
- qcom,dll-config = <0x0007642c>;
- qcom,ddr-config = <0x80040868>;
- };
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
new file mode 100644
index 000000000000..c33f173e3b6c
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
@@ -0,0 +1,192 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/mmc/sdhci-msm.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Qualcomm SDHCI controller (sdhci-msm)
+
+maintainers:
+ - Bhupesh Sharma <bhupesh.sharma@linaro.org>
+
+description:
+ Secure Digital Host Controller Interface (SDHCI) present on
+ Qualcomm SOCs supports SD/MMC/SDIO devices.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - qcom,apq8084-sdhci
+ - qcom,msm8226-sdhci
+ - qcom,msm8953-sdhci
+ - qcom,msm8974-sdhci
+ - qcom,msm8916-sdhci
+ - qcom,msm8992-sdhci
+ - qcom,msm8994-sdhci
+ - qcom,msm8996-sdhci
+ - qcom,qcs404-sdhci
+ - qcom,sc7180-sdhci
+ - qcom,sc7280-sdhci
+ - qcom,sdm630-sdhci
+ - qcom,sdm845-sdhci
+ - qcom,sdx55-sdhci
+ - qcom,sm6125-sdhci
+ - qcom,sm6350-sdhci
+ - qcom,sm8250-sdhci
+ - enum:
+ - qcom,sdhci-msm-v4 # for sdcc versions less than 5.0
+ - qcom,sdhci-msm-v5 # for sdcc version 5.0
+ - items:
+ - const: qcom,sdhci-msm-v4 # Deprecated (only for backward compatibility)
+ # for sdcc versions less than 5.0
+
+ reg:
+ minItems: 1
+ items:
+ - description: Host controller register map
+ - description: SD Core register map
+ - description: CQE register map
+ - description: Inline Crypto Engine register map
+
+ clocks:
+ minItems: 3
+ items:
+ - description: Main peripheral bus clock, PCLK/HCLK - AHB Bus clock
+ - description: SDC MMC clock, MCLK
+ - description: TCXO clock
+ - description: clock for Inline Crypto Engine
+ - description: SDCC bus voter clock
+ - description: reference clock for RCLK delay calibration
+ - description: sleep clock for RCLK delay calibration
+
+ clock-names:
+ minItems: 2
+ items:
+ - const: iface
+ - const: core
+ - const: xo
+ - const: ice
+ - const: bus
+ - const: cal
+ - const: sleep
+
+ interrupts:
+ maxItems: 2
+
+ interrupt-names:
+ items:
+ - const: hc_irq
+ - const: pwr_irq
+
+ pinctrl-names:
+ minItems: 1
+ items:
+ - const: default
+ - const: sleep
+
+ pinctrl-0:
+ description:
+ Should specify pin control groups used for this controller.
+
+ qcom,ddr-config:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: platform specific settings for DDR_CONFIG reg.
+
+ qcom,dll-config:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: platform specific settings for DLL_CONFIG reg.
+
+ iommus:
+ minItems: 1
+ maxItems: 8
+ description: |
+ phandle to apps_smmu node with sid mask.
+
+ interconnects:
+ items:
+ - description: data path, sdhc to ddr
+ - description: config path, cpu to sdhc
+
+ interconnect-names:
+ items:
+ - const: sdhc-ddr
+ - const: cpu-sdhc
+
+ power-domains:
+ description: A phandle to sdhci power domain node
+ maxItems: 1
+
+patternProperties:
+ '^opp-table(-[a-z0-9]+)?$':
+ if:
+ properties:
+ compatible:
+ const: operating-points-v2
+ then:
+ patternProperties:
+ '^opp-?[0-9]+$':
+ required:
+ - required-opps
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - interrupts
+
+additionalProperties: true
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/qcom,gcc-sm8250.h>
+ #include <dt-bindings/clock/qcom,rpmh.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ sdhc_2: sdhci@8804000 {
+ compatible = "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5";
+ reg = <0 0x08804000 0 0x1000>;
+
+ interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "hc_irq", "pwr_irq";
+
+ clocks = <&gcc GCC_SDCC2_AHB_CLK>,
+ <&gcc GCC_SDCC2_APPS_CLK>,
+ <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "iface", "core", "xo";
+ iommus = <&apps_smmu 0x4a0 0x0>;
+ qcom,dll-config = <0x0007642c>;
+ qcom,ddr-config = <0x80040868>;
+ power-domains = <&rpmhpd SM8250_CX>;
+
+ operating-points-v2 = <&sdhc2_opp_table>;
+
+ sdhc2_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-19200000 {
+ opp-hz = /bits/ 64 <19200000>;
+ required-opps = <&rpmhpd_opp_min_svs>;
+ };
+
+ opp-50000000 {
+ opp-hz = /bits/ 64 <50000000>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-100000000 {
+ opp-hz = /bits/ 64 <100000000>;
+ required-opps = <&rpmhpd_opp_svs>;
+ };
+
+ opp-202000000 {
+ opp-hz = /bits/ 64 <202000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>;
+ };
+ };
+ };
--
2.35.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH 1/4] dt-bindings: mmc/sdhci-msm: Convert bindings to yaml
2022-04-29 22:08 ` [PATCH 1/4] dt-bindings: mmc/sdhci-msm: Convert bindings to yaml Bhupesh Sharma
@ 2022-05-02 15:33 ` Rob Herring
2022-05-03 7:33 ` Bhupesh Sharma
2022-05-04 20:46 ` Rob Herring
1 sibling, 1 reply; 11+ messages in thread
From: Rob Herring @ 2022-05-02 15:33 UTC (permalink / raw)
To: Bhupesh Sharma
Cc: linux-arm-msm, devicetree, bjorn.andersson, ulf.hansson,
linux-kernel, robh+dt, linux-mmc, agross, bhupesh.linux
On Sat, 30 Apr 2022 03:38:30 +0530, Bhupesh Sharma wrote:
> Convert Qualcomm sdhci-msm devicetree binding to YAML.
>
> Cc: Ulf Hansson <ulf.hansson@linaro.org>
> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> Cc: Rob Herring <robh@kernel.org>
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> ---
> .../devicetree/bindings/mmc/sdhci-msm.txt | 123 -----------
> .../devicetree/bindings/mmc/sdhci-msm.yaml | 192 ++++++++++++++++++
> 2 files changed, 192 insertions(+), 123 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> create mode 100644 Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
>
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/patch/
sdcc@7804000: clock-names:0: 'iface' was expected
arch/arm64/boot/dts/qcom/qcs404-evb-1000.dtb
arch/arm64/boot/dts/qcom/qcs404-evb-4000.dtb
sdcc@7804000: clock-names:1: 'core' was expected
arch/arm64/boot/dts/qcom/qcs404-evb-1000.dtb
arch/arm64/boot/dts/qcom/qcs404-evb-4000.dtb
sdhci@7824000: clock-names:0: 'iface' was expected
arch/arm64/boot/dts/qcom/apq8016-sbc.dtb
arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dtb
arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dtb
arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dtb
arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dtb
arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dtb
arch/arm64/boot/dts/qcom/msm8916-mtp.dtb
arch/arm64/boot/dts/qcom/msm8916-samsung-a3u-eur.dtb
arch/arm64/boot/dts/qcom/msm8916-samsung-a5u-eur.dtb
arch/arm64/boot/dts/qcom/msm8916-samsung-j5.dtb
arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dtb
arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dtb
arch/arm/boot/dts/qcom-apq8016-sbc.dtb
arch/arm/boot/dts/qcom-msm8916-samsung-serranove.dtb
sdhci@7824000: clock-names:1: 'core' was expected
arch/arm64/boot/dts/qcom/apq8016-sbc.dtb
arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dtb
arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dtb
arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dtb
arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dtb
arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dtb
arch/arm64/boot/dts/qcom/msm8916-mtp.dtb
arch/arm64/boot/dts/qcom/msm8916-samsung-a3u-eur.dtb
arch/arm64/boot/dts/qcom/msm8916-samsung-a5u-eur.dtb
arch/arm64/boot/dts/qcom/msm8916-samsung-j5.dtb
arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dtb
arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dtb
arch/arm/boot/dts/qcom-apq8016-sbc.dtb
arch/arm/boot/dts/qcom-msm8916-samsung-serranove.dtb
sdhci@7824900: clock-names:0: 'iface' was expected
arch/arm64/boot/dts/qcom/ipq8074-hk01.dtb
arch/arm64/boot/dts/qcom/ipq8074-hk10-c1.dtb
arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb
arch/arm/boot/dts/qcom-ipq4018-ap120c-ac-bit.dtb
arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dtb
arch/arm/boot/dts/qcom-ipq4018-jalapeno.dtb
arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dtb
arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dtb
arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c3.dtb
arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dtb
arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c2.dtb
sdhci@7824900: clock-names:1: 'core' was expected
arch/arm64/boot/dts/qcom/ipq8074-hk01.dtb
arch/arm64/boot/dts/qcom/ipq8074-hk10-c1.dtb
arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb
arch/arm/boot/dts/qcom-ipq4018-ap120c-ac-bit.dtb
arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dtb
arch/arm/boot/dts/qcom-ipq4018-jalapeno.dtb
arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dtb
arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dtb
arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c3.dtb
arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dtb
arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c2.dtb
sdhci@7824900: clock-names:2: 'xo' was expected
arch/arm64/boot/dts/qcom/ipq8074-hk01.dtb
arch/arm64/boot/dts/qcom/ipq8074-hk10-c1.dtb
arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb
sdhci@7864000: clock-names:0: 'iface' was expected
arch/arm64/boot/dts/qcom/apq8016-sbc.dtb
arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dtb
arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dtb
arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dtb
arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dtb
arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dtb
arch/arm64/boot/dts/qcom/msm8916-mtp.dtb
arch/arm64/boot/dts/qcom/msm8916-samsung-a3u-eur.dtb
arch/arm64/boot/dts/qcom/msm8916-samsung-a5u-eur.dtb
arch/arm64/boot/dts/qcom/msm8916-samsung-j5.dtb
arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dtb
arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dtb
arch/arm/boot/dts/qcom-apq8016-sbc.dtb
arch/arm/boot/dts/qcom-msm8916-samsung-serranove.dtb
sdhci@7864000: clock-names:1: 'core' was expected
arch/arm64/boot/dts/qcom/apq8016-sbc.dtb
arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dtb
arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dtb
arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dtb
arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dtb
arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dtb
arch/arm64/boot/dts/qcom/msm8916-mtp.dtb
arch/arm64/boot/dts/qcom/msm8916-samsung-a3u-eur.dtb
arch/arm64/boot/dts/qcom/msm8916-samsung-a5u-eur.dtb
arch/arm64/boot/dts/qcom/msm8916-samsung-j5.dtb
arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dtb
arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dtb
arch/arm/boot/dts/qcom-apq8016-sbc.dtb
arch/arm/boot/dts/qcom-msm8916-samsung-serranove.dtb
sdhci@7c4000: clock-names:0: 'iface' was expected
arch/arm64/boot/dts/qcom/sc7180-idp.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r3.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r3-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r2.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r3.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r4.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r4.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r5.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r9.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-r4.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-r9.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r0.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-kb.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-kb.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9-kb.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r3.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r3-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-r1-lte.dtb
arch/arm64/boot/dts/qcom/sc7280-crd.dtb
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dtb
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dtb
arch/arm64/boot/dts/qcom/sc7280-idp2.dtb
arch/arm64/boot/dts/qcom/sc7280-idp.dtb
sdhci@7c4000: clock-names:1: 'core' was expected
arch/arm64/boot/dts/qcom/sc7180-idp.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r3.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r3-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r2.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r3.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r4.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r4.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r5.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r9.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-r4.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-r9.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r0.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-kb.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-kb.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9-kb.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r3.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r3-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-r1-lte.dtb
arch/arm64/boot/dts/qcom/sc7280-crd.dtb
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dtb
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dtb
arch/arm64/boot/dts/qcom/sc7280-idp2.dtb
arch/arm64/boot/dts/qcom/sc7280-idp.dtb
sdhci@8804000: clock-names:0: 'iface' was expected
arch/arm64/boot/dts/qcom/sc7180-idp.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r3.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r3-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r2.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r3.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r4.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r4.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r5.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r9.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-r4.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-r9.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r0.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-kb.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-kb.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9-kb.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r3.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r3-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-r1-lte.dtb
arch/arm64/boot/dts/qcom/sc7280-crd.dtb
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dtb
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dtb
arch/arm64/boot/dts/qcom/sc7280-idp2.dtb
arch/arm64/boot/dts/qcom/sc7280-idp.dtb
sdhci@8804000: clock-names:1: 'core' was expected
arch/arm64/boot/dts/qcom/sc7180-idp.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r3.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r3-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r2.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r3.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r4.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r4.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r5.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r9.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-r4.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-r9.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r0.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-kb.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-kb.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9-kb.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r3.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r3-lte.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dtb
arch/arm64/boot/dts/qcom/sc7180-trogdor-r1-lte.dtb
arch/arm64/boot/dts/qcom/sc7280-crd.dtb
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dtb
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dtb
arch/arm64/boot/dts/qcom/sc7280-idp2.dtb
arch/arm64/boot/dts/qcom/sc7280-idp.dtb
sdhci@8804000: clocks: [[13, 70], [13, 71]] is too short
arch/arm/boot/dts/qcom-sdx55-mtp.dtb
arch/arm/boot/dts/qcom-sdx55-t55.dtb
arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dtb
sdhci@c084000: clock-names:0: 'iface' was expected
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dtb
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-discovery.dtb
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-pioneer.dtb
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-voyager.dtb
arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dtb
arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dtb
sdhci@c084000: clock-names:1: 'core' was expected
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dtb
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-discovery.dtb
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-pioneer.dtb
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-voyager.dtb
arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dtb
arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dtb
sdhci@c0c4000: clock-names:0: 'iface' was expected
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dtb
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-discovery.dtb
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-pioneer.dtb
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-voyager.dtb
arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dtb
arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dtb
sdhci@c0c4000: clock-names:1: 'core' was expected
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dtb
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-discovery.dtb
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-pioneer.dtb
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-voyager.dtb
arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dtb
arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dtb
sdhci@c0c4000: interconnect-names:0: 'sdhc-ddr' was expected
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dtb
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-discovery.dtb
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-pioneer.dtb
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-voyager.dtb
arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dtb
arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dtb
sdhci@c0c4000: interconnect-names:1: 'cpu-sdhc' was expected
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dtb
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-discovery.dtb
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-pioneer.dtb
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-voyager.dtb
arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dtb
arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dtb
sdhci@f9824900: clock-names:0: 'iface' was expected
arch/arm64/boot/dts/qcom/apq8094-sony-xperia-kitakami-karin_windy.dtb
arch/arm64/boot/dts/qcom/msm8992-lg-bullhead-rev-101.dtb
arch/arm64/boot/dts/qcom/msm8992-lg-bullhead-rev-10.dtb
arch/arm64/boot/dts/qcom/msm8992-msft-lumia-octagon-talkman.dtb
arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dtb
arch/arm64/boot/dts/qcom/msm8994-huawei-angler-rev-101.dtb
arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon-cityman.dtb
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-ivy.dtb
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-karin.dtb
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-satsuki.dtb
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-sumire.dtb
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-suzuran.dtb
arch/arm/boot/dts/qcom-apq8026-lg-lenok.dtb
arch/arm/boot/dts/qcom-apq8074-dragonboard.dtb
arch/arm/boot/dts/qcom-apq8084-ifc6540.dtb
arch/arm/boot/dts/qcom-apq8084-mtp.dtb
arch/arm/boot/dts/qcom-msm8226-samsung-s3ve3g.dtb
arch/arm/boot/dts/qcom-msm8974-fairphone-fp2.dtb
arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dtb
arch/arm/boot/dts/qcom-msm8974-samsung-klte.dtb
arch/arm/boot/dts/qcom-msm8974-sony-xperia-amami.dtb
arch/arm/boot/dts/qcom-msm8974-sony-xperia-castor.dtb
arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dtb
sdhci@f9824900: clock-names:1: 'core' was expected
arch/arm64/boot/dts/qcom/apq8094-sony-xperia-kitakami-karin_windy.dtb
arch/arm64/boot/dts/qcom/msm8992-lg-bullhead-rev-101.dtb
arch/arm64/boot/dts/qcom/msm8992-lg-bullhead-rev-10.dtb
arch/arm64/boot/dts/qcom/msm8992-msft-lumia-octagon-talkman.dtb
arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dtb
arch/arm64/boot/dts/qcom/msm8994-huawei-angler-rev-101.dtb
arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon-cityman.dtb
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-ivy.dtb
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-karin.dtb
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-satsuki.dtb
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-sumire.dtb
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-suzuran.dtb
arch/arm/boot/dts/qcom-apq8026-lg-lenok.dtb
arch/arm/boot/dts/qcom-apq8074-dragonboard.dtb
arch/arm/boot/dts/qcom-apq8084-ifc6540.dtb
arch/arm/boot/dts/qcom-apq8084-mtp.dtb
arch/arm/boot/dts/qcom-msm8226-samsung-s3ve3g.dtb
arch/arm/boot/dts/qcom-msm8974-fairphone-fp2.dtb
arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dtb
arch/arm/boot/dts/qcom-msm8974-samsung-klte.dtb
arch/arm/boot/dts/qcom-msm8974-sony-xperia-amami.dtb
arch/arm/boot/dts/qcom-msm8974-sony-xperia-castor.dtb
arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dtb
sdhci@f9824900: clock-names:3: 'ice' was expected
arch/arm/boot/dts/qcom-msm8974-samsung-klte.dtb
arch/arm/boot/dts/qcom-msm8974-sony-xperia-castor.dtb
sdhci@f9824900: clock-names:4: 'bus' was expected
arch/arm/boot/dts/qcom-msm8974-samsung-klte.dtb
arch/arm/boot/dts/qcom-msm8974-sony-xperia-castor.dtb
sdhci@f9864900: clock-names:0: 'iface' was expected
arch/arm/boot/dts/qcom-apq8026-lg-lenok.dtb
arch/arm/boot/dts/qcom-apq8074-dragonboard.dtb
arch/arm/boot/dts/qcom-msm8226-samsung-s3ve3g.dtb
arch/arm/boot/dts/qcom-msm8974-fairphone-fp2.dtb
arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dtb
arch/arm/boot/dts/qcom-msm8974-samsung-klte.dtb
arch/arm/boot/dts/qcom-msm8974-sony-xperia-amami.dtb
arch/arm/boot/dts/qcom-msm8974-sony-xperia-castor.dtb
arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dtb
sdhci@f9864900: clock-names:1: 'core' was expected
arch/arm/boot/dts/qcom-apq8026-lg-lenok.dtb
arch/arm/boot/dts/qcom-apq8074-dragonboard.dtb
arch/arm/boot/dts/qcom-msm8226-samsung-s3ve3g.dtb
arch/arm/boot/dts/qcom-msm8974-fairphone-fp2.dtb
arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dtb
arch/arm/boot/dts/qcom-msm8974-samsung-klte.dtb
arch/arm/boot/dts/qcom-msm8974-sony-xperia-amami.dtb
arch/arm/boot/dts/qcom-msm8974-sony-xperia-castor.dtb
arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dtb
sdhci@f98a4900: clock-names:0: 'iface' was expected
arch/arm64/boot/dts/qcom/apq8094-sony-xperia-kitakami-karin_windy.dtb
arch/arm64/boot/dts/qcom/msm8992-lg-bullhead-rev-101.dtb
arch/arm64/boot/dts/qcom/msm8992-lg-bullhead-rev-10.dtb
arch/arm64/boot/dts/qcom/msm8992-msft-lumia-octagon-talkman.dtb
arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dtb
arch/arm64/boot/dts/qcom/msm8994-huawei-angler-rev-101.dtb
arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon-cityman.dtb
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-ivy.dtb
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-karin.dtb
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-satsuki.dtb
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-sumire.dtb
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-suzuran.dtb
arch/arm/boot/dts/qcom-apq8026-lg-lenok.dtb
arch/arm/boot/dts/qcom-apq8074-dragonboard.dtb
arch/arm/boot/dts/qcom-apq8084-ifc6540.dtb
arch/arm/boot/dts/qcom-apq8084-mtp.dtb
arch/arm/boot/dts/qcom-msm8226-samsung-s3ve3g.dtb
arch/arm/boot/dts/qcom-msm8974-fairphone-fp2.dtb
arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dtb
arch/arm/boot/dts/qcom-msm8974-samsung-klte.dtb
arch/arm/boot/dts/qcom-msm8974-sony-xperia-amami.dtb
arch/arm/boot/dts/qcom-msm8974-sony-xperia-castor.dtb
arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dtb
sdhci@f98a4900: clock-names:1: 'core' was expected
arch/arm64/boot/dts/qcom/apq8094-sony-xperia-kitakami-karin_windy.dtb
arch/arm64/boot/dts/qcom/msm8992-lg-bullhead-rev-101.dtb
arch/arm64/boot/dts/qcom/msm8992-lg-bullhead-rev-10.dtb
arch/arm64/boot/dts/qcom/msm8992-msft-lumia-octagon-talkman.dtb
arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dtb
arch/arm64/boot/dts/qcom/msm8994-huawei-angler-rev-101.dtb
arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon-cityman.dtb
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-ivy.dtb
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-karin.dtb
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-satsuki.dtb
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-sumire.dtb
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-suzuran.dtb
arch/arm/boot/dts/qcom-apq8026-lg-lenok.dtb
arch/arm/boot/dts/qcom-apq8074-dragonboard.dtb
arch/arm/boot/dts/qcom-apq8084-ifc6540.dtb
arch/arm/boot/dts/qcom-apq8084-mtp.dtb
arch/arm/boot/dts/qcom-msm8226-samsung-s3ve3g.dtb
arch/arm/boot/dts/qcom-msm8974-fairphone-fp2.dtb
arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dtb
arch/arm/boot/dts/qcom-msm8974-samsung-klte.dtb
arch/arm/boot/dts/qcom-msm8974-sony-xperia-amami.dtb
arch/arm/boot/dts/qcom-msm8974-sony-xperia-castor.dtb
arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dtb
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/4] dt-bindings: mmc/sdhci-msm: Convert bindings to yaml
2022-05-02 15:33 ` Rob Herring
@ 2022-05-03 7:33 ` Bhupesh Sharma
0 siblings, 0 replies; 11+ messages in thread
From: Bhupesh Sharma @ 2022-05-03 7:33 UTC (permalink / raw)
To: Rob Herring
Cc: linux-arm-msm, devicetree, bjorn.andersson, ulf.hansson,
linux-kernel, robh+dt, linux-mmc, agross, bhupesh.linux
Hi Rob,
On Mon, 2 May 2022 at 21:03, Rob Herring <robh@kernel.org> wrote:
>
> On Sat, 30 Apr 2022 03:38:30 +0530, Bhupesh Sharma wrote:
> > Convert Qualcomm sdhci-msm devicetree binding to YAML.
> >
> > Cc: Ulf Hansson <ulf.hansson@linaro.org>
> > Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> > Cc: Rob Herring <robh@kernel.org>
> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> > ---
> > .../devicetree/bindings/mmc/sdhci-msm.txt | 123 -----------
> > .../devicetree/bindings/mmc/sdhci-msm.yaml | 192 ++++++++++++++++++
> > 2 files changed, 192 insertions(+), 123 deletions(-)
> > delete mode 100644 Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> > create mode 100644 Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> >
>
> Running 'make dtbs_check' with the schema in this patch gives the
> following warnings. Consider if they are expected or the schema is
> incorrect. These may not be new warnings.
>
> Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> This will change in the future.
As noted in the cover-letter accompanying the patch:
This patchset is dependent on the qcom dts fixes sent via a separate
patchset (see [1]), to make sure that the 'make dtbs_check' and
'make dt_binding_check' work well and Rob's bot is happy as well.
[1]. https://lore.kernel.org/linux-arm-msm/20220429214420.854335-1-bhupesh.sharma@linaro.org/
Thanks,
Bhupesh
> Full log is available here: https://patchwork.ozlabs.org/patch/
>
>
> sdcc@7804000: clock-names:0: 'iface' was expected
> arch/arm64/boot/dts/qcom/qcs404-evb-1000.dtb
> arch/arm64/boot/dts/qcom/qcs404-evb-4000.dtb
>
> sdcc@7804000: clock-names:1: 'core' was expected
> arch/arm64/boot/dts/qcom/qcs404-evb-1000.dtb
> arch/arm64/boot/dts/qcom/qcs404-evb-4000.dtb
>
> sdhci@7824000: clock-names:0: 'iface' was expected
> arch/arm64/boot/dts/qcom/apq8016-sbc.dtb
> arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dtb
> arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dtb
> arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dtb
> arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dtb
> arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dtb
> arch/arm64/boot/dts/qcom/msm8916-mtp.dtb
> arch/arm64/boot/dts/qcom/msm8916-samsung-a3u-eur.dtb
> arch/arm64/boot/dts/qcom/msm8916-samsung-a5u-eur.dtb
> arch/arm64/boot/dts/qcom/msm8916-samsung-j5.dtb
> arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dtb
> arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dtb
> arch/arm/boot/dts/qcom-apq8016-sbc.dtb
> arch/arm/boot/dts/qcom-msm8916-samsung-serranove.dtb
>
> sdhci@7824000: clock-names:1: 'core' was expected
> arch/arm64/boot/dts/qcom/apq8016-sbc.dtb
> arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dtb
> arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dtb
> arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dtb
> arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dtb
> arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dtb
> arch/arm64/boot/dts/qcom/msm8916-mtp.dtb
> arch/arm64/boot/dts/qcom/msm8916-samsung-a3u-eur.dtb
> arch/arm64/boot/dts/qcom/msm8916-samsung-a5u-eur.dtb
> arch/arm64/boot/dts/qcom/msm8916-samsung-j5.dtb
> arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dtb
> arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dtb
> arch/arm/boot/dts/qcom-apq8016-sbc.dtb
> arch/arm/boot/dts/qcom-msm8916-samsung-serranove.dtb
>
> sdhci@7824900: clock-names:0: 'iface' was expected
> arch/arm64/boot/dts/qcom/ipq8074-hk01.dtb
> arch/arm64/boot/dts/qcom/ipq8074-hk10-c1.dtb
> arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb
> arch/arm/boot/dts/qcom-ipq4018-ap120c-ac-bit.dtb
> arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dtb
> arch/arm/boot/dts/qcom-ipq4018-jalapeno.dtb
> arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dtb
> arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dtb
> arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c3.dtb
> arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dtb
> arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c2.dtb
>
> sdhci@7824900: clock-names:1: 'core' was expected
> arch/arm64/boot/dts/qcom/ipq8074-hk01.dtb
> arch/arm64/boot/dts/qcom/ipq8074-hk10-c1.dtb
> arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb
> arch/arm/boot/dts/qcom-ipq4018-ap120c-ac-bit.dtb
> arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dtb
> arch/arm/boot/dts/qcom-ipq4018-jalapeno.dtb
> arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dtb
> arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dtb
> arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c3.dtb
> arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dtb
> arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c2.dtb
>
> sdhci@7824900: clock-names:2: 'xo' was expected
> arch/arm64/boot/dts/qcom/ipq8074-hk01.dtb
> arch/arm64/boot/dts/qcom/ipq8074-hk10-c1.dtb
> arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb
>
> sdhci@7864000: clock-names:0: 'iface' was expected
> arch/arm64/boot/dts/qcom/apq8016-sbc.dtb
> arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dtb
> arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dtb
> arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dtb
> arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dtb
> arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dtb
> arch/arm64/boot/dts/qcom/msm8916-mtp.dtb
> arch/arm64/boot/dts/qcom/msm8916-samsung-a3u-eur.dtb
> arch/arm64/boot/dts/qcom/msm8916-samsung-a5u-eur.dtb
> arch/arm64/boot/dts/qcom/msm8916-samsung-j5.dtb
> arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dtb
> arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dtb
> arch/arm/boot/dts/qcom-apq8016-sbc.dtb
> arch/arm/boot/dts/qcom-msm8916-samsung-serranove.dtb
>
> sdhci@7864000: clock-names:1: 'core' was expected
> arch/arm64/boot/dts/qcom/apq8016-sbc.dtb
> arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dtb
> arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dtb
> arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dtb
> arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dtb
> arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dtb
> arch/arm64/boot/dts/qcom/msm8916-mtp.dtb
> arch/arm64/boot/dts/qcom/msm8916-samsung-a3u-eur.dtb
> arch/arm64/boot/dts/qcom/msm8916-samsung-a5u-eur.dtb
> arch/arm64/boot/dts/qcom/msm8916-samsung-j5.dtb
> arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dtb
> arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dtb
> arch/arm/boot/dts/qcom-apq8016-sbc.dtb
> arch/arm/boot/dts/qcom-msm8916-samsung-serranove.dtb
>
> sdhci@7c4000: clock-names:0: 'iface' was expected
> arch/arm64/boot/dts/qcom/sc7180-idp.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r3.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r3-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r2.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r3.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r4.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r4.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r5.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r9.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-r4.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-r9.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r0.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-kb.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-kb.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9-kb.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r3.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r3-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-r1-lte.dtb
> arch/arm64/boot/dts/qcom/sc7280-crd.dtb
> arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dtb
> arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dtb
> arch/arm64/boot/dts/qcom/sc7280-idp2.dtb
> arch/arm64/boot/dts/qcom/sc7280-idp.dtb
>
> sdhci@7c4000: clock-names:1: 'core' was expected
> arch/arm64/boot/dts/qcom/sc7180-idp.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r3.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r3-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r2.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r3.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r4.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r4.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r5.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r9.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-r4.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-r9.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r0.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-kb.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-kb.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9-kb.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r3.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r3-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-r1-lte.dtb
> arch/arm64/boot/dts/qcom/sc7280-crd.dtb
> arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dtb
> arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dtb
> arch/arm64/boot/dts/qcom/sc7280-idp2.dtb
> arch/arm64/boot/dts/qcom/sc7280-idp.dtb
>
> sdhci@8804000: clock-names:0: 'iface' was expected
> arch/arm64/boot/dts/qcom/sc7180-idp.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r3.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r3-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r2.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r3.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r4.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r4.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r5.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r9.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-r4.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-r9.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r0.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-kb.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-kb.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9-kb.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r3.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r3-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-r1-lte.dtb
> arch/arm64/boot/dts/qcom/sc7280-crd.dtb
> arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dtb
> arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dtb
> arch/arm64/boot/dts/qcom/sc7280-idp2.dtb
> arch/arm64/boot/dts/qcom/sc7280-idp.dtb
>
> sdhci@8804000: clock-names:1: 'core' was expected
> arch/arm64/boot/dts/qcom/sc7180-idp.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r3.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r3-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r2.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r3.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r4.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r4.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r5.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r9.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-r4.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-r9.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r0.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-kb.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-kb.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9-kb.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r3.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r3-lte.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dtb
> arch/arm64/boot/dts/qcom/sc7180-trogdor-r1-lte.dtb
> arch/arm64/boot/dts/qcom/sc7280-crd.dtb
> arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dtb
> arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dtb
> arch/arm64/boot/dts/qcom/sc7280-idp2.dtb
> arch/arm64/boot/dts/qcom/sc7280-idp.dtb
>
> sdhci@8804000: clocks: [[13, 70], [13, 71]] is too short
> arch/arm/boot/dts/qcom-sdx55-mtp.dtb
> arch/arm/boot/dts/qcom-sdx55-t55.dtb
> arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dtb
>
> sdhci@c084000: clock-names:0: 'iface' was expected
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dtb
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-discovery.dtb
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-pioneer.dtb
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-voyager.dtb
> arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dtb
> arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dtb
>
> sdhci@c084000: clock-names:1: 'core' was expected
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dtb
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-discovery.dtb
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-pioneer.dtb
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-voyager.dtb
> arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dtb
> arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dtb
>
> sdhci@c0c4000: clock-names:0: 'iface' was expected
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dtb
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-discovery.dtb
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-pioneer.dtb
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-voyager.dtb
> arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dtb
> arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dtb
>
> sdhci@c0c4000: clock-names:1: 'core' was expected
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dtb
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-discovery.dtb
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-pioneer.dtb
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-voyager.dtb
> arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dtb
> arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dtb
>
> sdhci@c0c4000: interconnect-names:0: 'sdhc-ddr' was expected
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dtb
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-discovery.dtb
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-pioneer.dtb
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-voyager.dtb
> arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dtb
> arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dtb
>
> sdhci@c0c4000: interconnect-names:1: 'cpu-sdhc' was expected
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dtb
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-discovery.dtb
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-pioneer.dtb
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-voyager.dtb
> arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dtb
> arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dtb
>
> sdhci@f9824900: clock-names:0: 'iface' was expected
> arch/arm64/boot/dts/qcom/apq8094-sony-xperia-kitakami-karin_windy.dtb
> arch/arm64/boot/dts/qcom/msm8992-lg-bullhead-rev-101.dtb
> arch/arm64/boot/dts/qcom/msm8992-lg-bullhead-rev-10.dtb
> arch/arm64/boot/dts/qcom/msm8992-msft-lumia-octagon-talkman.dtb
> arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dtb
> arch/arm64/boot/dts/qcom/msm8994-huawei-angler-rev-101.dtb
> arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon-cityman.dtb
> arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-ivy.dtb
> arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-karin.dtb
> arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-satsuki.dtb
> arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-sumire.dtb
> arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-suzuran.dtb
> arch/arm/boot/dts/qcom-apq8026-lg-lenok.dtb
> arch/arm/boot/dts/qcom-apq8074-dragonboard.dtb
> arch/arm/boot/dts/qcom-apq8084-ifc6540.dtb
> arch/arm/boot/dts/qcom-apq8084-mtp.dtb
> arch/arm/boot/dts/qcom-msm8226-samsung-s3ve3g.dtb
> arch/arm/boot/dts/qcom-msm8974-fairphone-fp2.dtb
> arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dtb
> arch/arm/boot/dts/qcom-msm8974-samsung-klte.dtb
> arch/arm/boot/dts/qcom-msm8974-sony-xperia-amami.dtb
> arch/arm/boot/dts/qcom-msm8974-sony-xperia-castor.dtb
> arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dtb
>
> sdhci@f9824900: clock-names:1: 'core' was expected
> arch/arm64/boot/dts/qcom/apq8094-sony-xperia-kitakami-karin_windy.dtb
> arch/arm64/boot/dts/qcom/msm8992-lg-bullhead-rev-101.dtb
> arch/arm64/boot/dts/qcom/msm8992-lg-bullhead-rev-10.dtb
> arch/arm64/boot/dts/qcom/msm8992-msft-lumia-octagon-talkman.dtb
> arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dtb
> arch/arm64/boot/dts/qcom/msm8994-huawei-angler-rev-101.dtb
> arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon-cityman.dtb
> arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-ivy.dtb
> arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-karin.dtb
> arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-satsuki.dtb
> arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-sumire.dtb
> arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-suzuran.dtb
> arch/arm/boot/dts/qcom-apq8026-lg-lenok.dtb
> arch/arm/boot/dts/qcom-apq8074-dragonboard.dtb
> arch/arm/boot/dts/qcom-apq8084-ifc6540.dtb
> arch/arm/boot/dts/qcom-apq8084-mtp.dtb
> arch/arm/boot/dts/qcom-msm8226-samsung-s3ve3g.dtb
> arch/arm/boot/dts/qcom-msm8974-fairphone-fp2.dtb
> arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dtb
> arch/arm/boot/dts/qcom-msm8974-samsung-klte.dtb
> arch/arm/boot/dts/qcom-msm8974-sony-xperia-amami.dtb
> arch/arm/boot/dts/qcom-msm8974-sony-xperia-castor.dtb
> arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dtb
>
> sdhci@f9824900: clock-names:3: 'ice' was expected
> arch/arm/boot/dts/qcom-msm8974-samsung-klte.dtb
> arch/arm/boot/dts/qcom-msm8974-sony-xperia-castor.dtb
>
> sdhci@f9824900: clock-names:4: 'bus' was expected
> arch/arm/boot/dts/qcom-msm8974-samsung-klte.dtb
> arch/arm/boot/dts/qcom-msm8974-sony-xperia-castor.dtb
>
> sdhci@f9864900: clock-names:0: 'iface' was expected
> arch/arm/boot/dts/qcom-apq8026-lg-lenok.dtb
> arch/arm/boot/dts/qcom-apq8074-dragonboard.dtb
> arch/arm/boot/dts/qcom-msm8226-samsung-s3ve3g.dtb
> arch/arm/boot/dts/qcom-msm8974-fairphone-fp2.dtb
> arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dtb
> arch/arm/boot/dts/qcom-msm8974-samsung-klte.dtb
> arch/arm/boot/dts/qcom-msm8974-sony-xperia-amami.dtb
> arch/arm/boot/dts/qcom-msm8974-sony-xperia-castor.dtb
> arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dtb
>
> sdhci@f9864900: clock-names:1: 'core' was expected
> arch/arm/boot/dts/qcom-apq8026-lg-lenok.dtb
> arch/arm/boot/dts/qcom-apq8074-dragonboard.dtb
> arch/arm/boot/dts/qcom-msm8226-samsung-s3ve3g.dtb
> arch/arm/boot/dts/qcom-msm8974-fairphone-fp2.dtb
> arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dtb
> arch/arm/boot/dts/qcom-msm8974-samsung-klte.dtb
> arch/arm/boot/dts/qcom-msm8974-sony-xperia-amami.dtb
> arch/arm/boot/dts/qcom-msm8974-sony-xperia-castor.dtb
> arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dtb
>
> sdhci@f98a4900: clock-names:0: 'iface' was expected
> arch/arm64/boot/dts/qcom/apq8094-sony-xperia-kitakami-karin_windy.dtb
> arch/arm64/boot/dts/qcom/msm8992-lg-bullhead-rev-101.dtb
> arch/arm64/boot/dts/qcom/msm8992-lg-bullhead-rev-10.dtb
> arch/arm64/boot/dts/qcom/msm8992-msft-lumia-octagon-talkman.dtb
> arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dtb
> arch/arm64/boot/dts/qcom/msm8994-huawei-angler-rev-101.dtb
> arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon-cityman.dtb
> arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-ivy.dtb
> arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-karin.dtb
> arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-satsuki.dtb
> arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-sumire.dtb
> arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-suzuran.dtb
> arch/arm/boot/dts/qcom-apq8026-lg-lenok.dtb
> arch/arm/boot/dts/qcom-apq8074-dragonboard.dtb
> arch/arm/boot/dts/qcom-apq8084-ifc6540.dtb
> arch/arm/boot/dts/qcom-apq8084-mtp.dtb
> arch/arm/boot/dts/qcom-msm8226-samsung-s3ve3g.dtb
> arch/arm/boot/dts/qcom-msm8974-fairphone-fp2.dtb
> arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dtb
> arch/arm/boot/dts/qcom-msm8974-samsung-klte.dtb
> arch/arm/boot/dts/qcom-msm8974-sony-xperia-amami.dtb
> arch/arm/boot/dts/qcom-msm8974-sony-xperia-castor.dtb
> arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dtb
>
> sdhci@f98a4900: clock-names:1: 'core' was expected
> arch/arm64/boot/dts/qcom/apq8094-sony-xperia-kitakami-karin_windy.dtb
> arch/arm64/boot/dts/qcom/msm8992-lg-bullhead-rev-101.dtb
> arch/arm64/boot/dts/qcom/msm8992-lg-bullhead-rev-10.dtb
> arch/arm64/boot/dts/qcom/msm8992-msft-lumia-octagon-talkman.dtb
> arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dtb
> arch/arm64/boot/dts/qcom/msm8994-huawei-angler-rev-101.dtb
> arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon-cityman.dtb
> arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-ivy.dtb
> arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-karin.dtb
> arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-satsuki.dtb
> arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-sumire.dtb
> arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-suzuran.dtb
> arch/arm/boot/dts/qcom-apq8026-lg-lenok.dtb
> arch/arm/boot/dts/qcom-apq8074-dragonboard.dtb
> arch/arm/boot/dts/qcom-apq8084-ifc6540.dtb
> arch/arm/boot/dts/qcom-apq8084-mtp.dtb
> arch/arm/boot/dts/qcom-msm8226-samsung-s3ve3g.dtb
> arch/arm/boot/dts/qcom-msm8974-fairphone-fp2.dtb
> arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dtb
> arch/arm/boot/dts/qcom-msm8974-samsung-klte.dtb
> arch/arm/boot/dts/qcom-msm8974-sony-xperia-amami.dtb
> arch/arm/boot/dts/qcom-msm8974-sony-xperia-castor.dtb
> arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dtb
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/4] dt-bindings: mmc/sdhci-msm: Convert bindings to yaml
2022-04-29 22:08 ` [PATCH 1/4] dt-bindings: mmc/sdhci-msm: Convert bindings to yaml Bhupesh Sharma
2022-05-02 15:33 ` Rob Herring
@ 2022-05-04 20:46 ` Rob Herring
2022-05-05 8:29 ` Ulf Hansson
1 sibling, 1 reply; 11+ messages in thread
From: Rob Herring @ 2022-05-04 20:46 UTC (permalink / raw)
To: Bhupesh Sharma
Cc: linux-mmc, bhupesh.linux, agross, linux-arm-msm, linux-kernel,
devicetree, bjorn.andersson, ulf.hansson
On Sat, Apr 30, 2022 at 03:38:30AM +0530, Bhupesh Sharma wrote:
> Convert Qualcomm sdhci-msm devicetree binding to YAML.
>
> Cc: Ulf Hansson <ulf.hansson@linaro.org>
> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> Cc: Rob Herring <robh@kernel.org>
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> ---
> .../devicetree/bindings/mmc/sdhci-msm.txt | 123 -----------
> .../devicetree/bindings/mmc/sdhci-msm.yaml | 192 ++++++++++++++++++
> 2 files changed, 192 insertions(+), 123 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> create mode 100644 Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
>
> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> deleted file mode 100644
> index 6216ed777343..000000000000
> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> +++ /dev/null
> @@ -1,123 +0,0 @@
> -* Qualcomm SDHCI controller (sdhci-msm)
> -
> -This file documents differences between the core properties in mmc.txt
> -and the properties used by the sdhci-msm driver.
> -
> -Required properties:
> -- compatible: Should contain a SoC-specific string and a IP version string:
> - version strings:
> - "qcom,sdhci-msm-v4" for sdcc versions less than 5.0
> - "qcom,sdhci-msm-v5" for sdcc version 5.0
> - For SDCC version 5.0.0, MCI registers are removed from SDCC
> - interface and some registers are moved to HC. New compatible
> - string is added to support this change - "qcom,sdhci-msm-v5".
> - full compatible strings with SoC and version:
> - "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"
> - "qcom,msm8226-sdhci", "qcom,sdhci-msm-v4"
> - "qcom,msm8953-sdhci", "qcom,sdhci-msm-v4"
> - "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4"
> - "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4"
> - "qcom,msm8992-sdhci", "qcom,sdhci-msm-v4"
> - "qcom,msm8994-sdhci", "qcom,sdhci-msm-v4"
> - "qcom,msm8996-sdhci", "qcom,sdhci-msm-v4"
> - "qcom,qcs404-sdhci", "qcom,sdhci-msm-v5"
> - "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5";
> - "qcom,sc7280-sdhci", "qcom,sdhci-msm-v5";
> - "qcom,sdm845-sdhci", "qcom,sdhci-msm-v5"
> - "qcom,sdx55-sdhci", "qcom,sdhci-msm-v5";
> - "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5"
> - NOTE that some old device tree files may be floating around that only
> - have the string "qcom,sdhci-msm-v4" without the SoC compatible string
> - but doing that should be considered a deprecated practice.
> -
> -- reg: Base address and length of the register in the following order:
> - - Host controller register map (required)
> - - SD Core register map (required for controllers earlier than msm-v5)
> - - CQE register map (Optional, CQE support is present on SDHC instance meant
> - for eMMC and version v4.2 and above)
> - - Inline Crypto Engine register map (optional)
> -- reg-names: When CQE register map is supplied, below reg-names are required
> - - "hc" for Host controller register map
> - - "core" for SD core register map
> - - "cqhci" for CQE register map
> - - "ice" for Inline Crypto Engine register map (optional)
> -- interrupts: Should contain an interrupt-specifiers for the interrupts:
> - - Host controller interrupt (required)
> -- pinctrl-names: Should contain only one value - "default".
> -- pinctrl-0: Should specify pin control groups used for this controller.
> -- clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock-names.
> -- clock-names: Should contain the following:
> - "iface" - Main peripheral bus clock (PCLK/HCLK - AHB Bus clock) (required)
> - "core" - SDC MMC clock (MCLK) (required)
> - "bus" - SDCC bus voter clock (optional)
> - "xo" - TCXO clock (optional)
> - "cal" - reference clock for RCLK delay calibration (optional)
> - "sleep" - sleep clock for RCLK delay calibration (optional)
> - "ice" - clock for Inline Crypto Engine (optional)
> -
> -- qcom,ddr-config: Certain chipsets and platforms require particular settings
> - for the DDR_CONFIG register. Use this field to specify the register
> - value as per the Hardware Programming Guide.
> -
> -- qcom,dll-config: Chipset and Platform specific value. Use this field to
> - specify the DLL_CONFIG register value as per Hardware Programming Guide.
> -
> -Optional Properties:
> -* Following bus parameters are required for interconnect bandwidth scaling:
> -- interconnects: Pairs of phandles and interconnect provider specifier
> - to denote the edge source and destination ports of
> - the interconnect path.
> -
> -- interconnect-names: For sdhc, we have two main paths.
> - 1. Data path : sdhc to ddr
> - 2. Config path : cpu to sdhc
> - For Data interconnect path the name supposed to be
> - is "sdhc-ddr" and for config interconnect path it is
> - "cpu-sdhc".
> - Please refer to Documentation/devicetree/bindings/
> - interconnect/ for more details.
> -
> -Example:
> -
> - sdhc_1: sdhci@f9824900 {
> - compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
> - reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
> - interrupts = <0 123 0>;
> - bus-width = <8>;
> - non-removable;
> -
> - vmmc-supply = <&pm8941_l20>;
> - vqmmc-supply = <&pm8941_s3>;
> -
> - pinctrl-names = "default";
> - pinctrl-0 = <&sdc1_clk &sdc1_cmd &sdc1_data>;
> -
> - clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
> - clock-names = "core", "iface";
> - interconnects = <&qnoc MASTER_SDCC_ID &qnoc SLAVE_DDR_ID>,
> - <&qnoc MASTER_CPU_ID &qnoc SLAVE_SDCC_ID>;
> - interconnect-names = "sdhc-ddr","cpu-sdhc";
> -
> - qcom,dll-config = <0x000f642c>;
> - qcom,ddr-config = <0x80040868>;
> - };
> -
> - sdhc_2: sdhci@f98a4900 {
> - compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
> - reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
> - interrupts = <0 125 0>;
> - bus-width = <4>;
> - cd-gpios = <&msmgpio 62 0x1>;
> -
> - vmmc-supply = <&pm8941_l21>;
> - vqmmc-supply = <&pm8941_l13>;
> -
> - pinctrl-names = "default";
> - pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data>;
> -
> - clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>;
> - clock-names = "core", "iface";
> -
> - qcom,dll-config = <0x0007642c>;
> - qcom,ddr-config = <0x80040868>;
> - };
> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> new file mode 100644
> index 000000000000..c33f173e3b6c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> @@ -0,0 +1,192 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/mmc/sdhci-msm.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Qualcomm SDHCI controller (sdhci-msm)
> +
> +maintainers:
> + - Bhupesh Sharma <bhupesh.sharma@linaro.org>
> +
> +description:
> + Secure Digital Host Controller Interface (SDHCI) present on
> + Qualcomm SOCs supports SD/MMC/SDIO devices.
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - qcom,apq8084-sdhci
> + - qcom,msm8226-sdhci
> + - qcom,msm8953-sdhci
> + - qcom,msm8974-sdhci
> + - qcom,msm8916-sdhci
> + - qcom,msm8992-sdhci
> + - qcom,msm8994-sdhci
> + - qcom,msm8996-sdhci
> + - qcom,qcs404-sdhci
> + - qcom,sc7180-sdhci
> + - qcom,sc7280-sdhci
> + - qcom,sdm630-sdhci
> + - qcom,sdm845-sdhci
> + - qcom,sdx55-sdhci
> + - qcom,sm6125-sdhci
> + - qcom,sm6350-sdhci
> + - qcom,sm8250-sdhci
> + - enum:
> + - qcom,sdhci-msm-v4 # for sdcc versions less than 5.0
> + - qcom,sdhci-msm-v5 # for sdcc version 5.0
This should be split up between v4 and v5.
> + - items:
> + - const: qcom,sdhci-msm-v4 # Deprecated (only for backward compatibility)
> + # for sdcc versions less than 5.0
deprecated: true
> +
> + reg:
> + minItems: 1
> + items:
> + - description: Host controller register map
> + - description: SD Core register map
> + - description: CQE register map
> + - description: Inline Crypto Engine register map
> +
> + clocks:
> + minItems: 3
> + items:
> + - description: Main peripheral bus clock, PCLK/HCLK - AHB Bus clock
> + - description: SDC MMC clock, MCLK
> + - description: TCXO clock
> + - description: clock for Inline Crypto Engine
> + - description: SDCC bus voter clock
> + - description: reference clock for RCLK delay calibration
> + - description: sleep clock for RCLK delay calibration
> +
> + clock-names:
> + minItems: 2
> + items:
> + - const: iface
> + - const: core
> + - const: xo
> + - const: ice
> + - const: bus
> + - const: cal
> + - const: sleep
> +
> + interrupts:
> + maxItems: 2
> +
> + interrupt-names:
> + items:
> + - const: hc_irq
> + - const: pwr_irq
> +
> + pinctrl-names:
> + minItems: 1
> + items:
> + - const: default
> + - const: sleep
> +
> + pinctrl-0:
> + description:
> + Should specify pin control groups used for this controller.
> +
> + qcom,ddr-config:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: platform specific settings for DDR_CONFIG reg.
> +
> + qcom,dll-config:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: platform specific settings for DLL_CONFIG reg.
> +
> + iommus:
> + minItems: 1
> + maxItems: 8
> + description: |
> + phandle to apps_smmu node with sid mask.
> +
> + interconnects:
> + items:
> + - description: data path, sdhc to ddr
> + - description: config path, cpu to sdhc
> +
> + interconnect-names:
> + items:
> + - const: sdhc-ddr
> + - const: cpu-sdhc
> +
> + power-domains:
> + description: A phandle to sdhci power domain node
> + maxItems: 1
> +
> +patternProperties:
> + '^opp-table(-[a-z0-9]+)?$':
> + if:
> + properties:
> + compatible:
> + const: operating-points-v2
> + then:
> + patternProperties:
> + '^opp-?[0-9]+$':
> + required:
> + - required-opps
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - interrupts
> +
> +additionalProperties: true
Not valid except for common (incomplete) schemas. Instead you need:
allOf:
- $ref: mmc-controller.yaml#
unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/clock/qcom,gcc-sm8250.h>
> + #include <dt-bindings/clock/qcom,rpmh.h>
> + #include <dt-bindings/power/qcom-rpmpd.h>
> +
> + sdhc_2: sdhci@8804000 {
This will be an error then.
> + compatible = "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5";
> + reg = <0 0x08804000 0 0x1000>;
> +
> + interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "hc_irq", "pwr_irq";
> +
> + clocks = <&gcc GCC_SDCC2_AHB_CLK>,
> + <&gcc GCC_SDCC2_APPS_CLK>,
> + <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "iface", "core", "xo";
> + iommus = <&apps_smmu 0x4a0 0x0>;
> + qcom,dll-config = <0x0007642c>;
> + qcom,ddr-config = <0x80040868>;
> + power-domains = <&rpmhpd SM8250_CX>;
> +
> + operating-points-v2 = <&sdhc2_opp_table>;
> +
> + sdhc2_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-19200000 {
> + opp-hz = /bits/ 64 <19200000>;
> + required-opps = <&rpmhpd_opp_min_svs>;
> + };
> +
> + opp-50000000 {
> + opp-hz = /bits/ 64 <50000000>;
> + required-opps = <&rpmhpd_opp_low_svs>;
> + };
> +
> + opp-100000000 {
> + opp-hz = /bits/ 64 <100000000>;
> + required-opps = <&rpmhpd_opp_svs>;
> + };
> +
> + opp-202000000 {
> + opp-hz = /bits/ 64 <202000000>;
> + required-opps = <&rpmhpd_opp_svs_l1>;
> + };
> + };
> + };
> --
> 2.35.1
>
>
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH 1/4] dt-bindings: mmc/sdhci-msm: Convert bindings to yaml
2022-05-04 20:46 ` Rob Herring
@ 2022-05-05 8:29 ` Ulf Hansson
2022-05-05 20:29 ` Bhupesh Sharma
0 siblings, 1 reply; 11+ messages in thread
From: Ulf Hansson @ 2022-05-05 8:29 UTC (permalink / raw)
To: Bhupesh Sharma
Cc: Rob Herring, linux-mmc, bhupesh.linux, agross, linux-arm-msm,
linux-kernel, devicetree, bjorn.andersson
On Wed, 4 May 2022 at 22:46, Rob Herring <robh@kernel.org> wrote:
>
> On Sat, Apr 30, 2022 at 03:38:30AM +0530, Bhupesh Sharma wrote:
> > Convert Qualcomm sdhci-msm devicetree binding to YAML.
> >
> > Cc: Ulf Hansson <ulf.hansson@linaro.org>
> > Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> > Cc: Rob Herring <robh@kernel.org>
> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> > ---
> > .../devicetree/bindings/mmc/sdhci-msm.txt | 123 -----------
> > .../devicetree/bindings/mmc/sdhci-msm.yaml | 192 ++++++++++++++++++
> > 2 files changed, 192 insertions(+), 123 deletions(-)
> > delete mode 100644 Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> > create mode 100644 Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> > deleted file mode 100644
> > index 6216ed777343..000000000000
> > --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> > +++ /dev/null
> > @@ -1,123 +0,0 @@
> > -* Qualcomm SDHCI controller (sdhci-msm)
> > -
> > -This file documents differences between the core properties in mmc.txt
> > -and the properties used by the sdhci-msm driver.
> > -
> > -Required properties:
> > -- compatible: Should contain a SoC-specific string and a IP version string:
> > - version strings:
> > - "qcom,sdhci-msm-v4" for sdcc versions less than 5.0
> > - "qcom,sdhci-msm-v5" for sdcc version 5.0
> > - For SDCC version 5.0.0, MCI registers are removed from SDCC
> > - interface and some registers are moved to HC. New compatible
> > - string is added to support this change - "qcom,sdhci-msm-v5".
> > - full compatible strings with SoC and version:
> > - "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"
> > - "qcom,msm8226-sdhci", "qcom,sdhci-msm-v4"
> > - "qcom,msm8953-sdhci", "qcom,sdhci-msm-v4"
> > - "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4"
> > - "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4"
> > - "qcom,msm8992-sdhci", "qcom,sdhci-msm-v4"
> > - "qcom,msm8994-sdhci", "qcom,sdhci-msm-v4"
> > - "qcom,msm8996-sdhci", "qcom,sdhci-msm-v4"
> > - "qcom,qcs404-sdhci", "qcom,sdhci-msm-v5"
> > - "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5";
> > - "qcom,sc7280-sdhci", "qcom,sdhci-msm-v5";
> > - "qcom,sdm845-sdhci", "qcom,sdhci-msm-v5"
> > - "qcom,sdx55-sdhci", "qcom,sdhci-msm-v5";
> > - "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5"
> > - NOTE that some old device tree files may be floating around that only
> > - have the string "qcom,sdhci-msm-v4" without the SoC compatible string
> > - but doing that should be considered a deprecated practice.
> > -
> > -- reg: Base address and length of the register in the following order:
> > - - Host controller register map (required)
> > - - SD Core register map (required for controllers earlier than msm-v5)
> > - - CQE register map (Optional, CQE support is present on SDHC instance meant
> > - for eMMC and version v4.2 and above)
> > - - Inline Crypto Engine register map (optional)
> > -- reg-names: When CQE register map is supplied, below reg-names are required
> > - - "hc" for Host controller register map
> > - - "core" for SD core register map
> > - - "cqhci" for CQE register map
> > - - "ice" for Inline Crypto Engine register map (optional)
> > -- interrupts: Should contain an interrupt-specifiers for the interrupts:
> > - - Host controller interrupt (required)
> > -- pinctrl-names: Should contain only one value - "default".
> > -- pinctrl-0: Should specify pin control groups used for this controller.
> > -- clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock-names.
> > -- clock-names: Should contain the following:
> > - "iface" - Main peripheral bus clock (PCLK/HCLK - AHB Bus clock) (required)
> > - "core" - SDC MMC clock (MCLK) (required)
> > - "bus" - SDCC bus voter clock (optional)
> > - "xo" - TCXO clock (optional)
> > - "cal" - reference clock for RCLK delay calibration (optional)
> > - "sleep" - sleep clock for RCLK delay calibration (optional)
> > - "ice" - clock for Inline Crypto Engine (optional)
> > -
> > -- qcom,ddr-config: Certain chipsets and platforms require particular settings
> > - for the DDR_CONFIG register. Use this field to specify the register
> > - value as per the Hardware Programming Guide.
> > -
> > -- qcom,dll-config: Chipset and Platform specific value. Use this field to
> > - specify the DLL_CONFIG register value as per Hardware Programming Guide.
> > -
> > -Optional Properties:
> > -* Following bus parameters are required for interconnect bandwidth scaling:
> > -- interconnects: Pairs of phandles and interconnect provider specifier
> > - to denote the edge source and destination ports of
> > - the interconnect path.
> > -
> > -- interconnect-names: For sdhc, we have two main paths.
> > - 1. Data path : sdhc to ddr
> > - 2. Config path : cpu to sdhc
> > - For Data interconnect path the name supposed to be
> > - is "sdhc-ddr" and for config interconnect path it is
> > - "cpu-sdhc".
> > - Please refer to Documentation/devicetree/bindings/
> > - interconnect/ for more details.
> > -
> > -Example:
> > -
> > - sdhc_1: sdhci@f9824900 {
> > - compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
> > - reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
> > - interrupts = <0 123 0>;
> > - bus-width = <8>;
> > - non-removable;
> > -
> > - vmmc-supply = <&pm8941_l20>;
> > - vqmmc-supply = <&pm8941_s3>;
> > -
> > - pinctrl-names = "default";
> > - pinctrl-0 = <&sdc1_clk &sdc1_cmd &sdc1_data>;
> > -
> > - clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
> > - clock-names = "core", "iface";
> > - interconnects = <&qnoc MASTER_SDCC_ID &qnoc SLAVE_DDR_ID>,
> > - <&qnoc MASTER_CPU_ID &qnoc SLAVE_SDCC_ID>;
> > - interconnect-names = "sdhc-ddr","cpu-sdhc";
> > -
> > - qcom,dll-config = <0x000f642c>;
> > - qcom,ddr-config = <0x80040868>;
> > - };
> > -
> > - sdhc_2: sdhci@f98a4900 {
> > - compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
> > - reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
> > - interrupts = <0 125 0>;
> > - bus-width = <4>;
> > - cd-gpios = <&msmgpio 62 0x1>;
> > -
> > - vmmc-supply = <&pm8941_l21>;
> > - vqmmc-supply = <&pm8941_l13>;
> > -
> > - pinctrl-names = "default";
> > - pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data>;
> > -
> > - clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>;
> > - clock-names = "core", "iface";
> > -
> > - qcom,dll-config = <0x0007642c>;
> > - qcom,ddr-config = <0x80040868>;
> > - };
> > diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> > new file mode 100644
> > index 000000000000..c33f173e3b6c
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> > @@ -0,0 +1,192 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +
> > +%YAML 1.2
> > +---
> > +$id: "http://devicetree.org/schemas/mmc/sdhci-msm.yaml#"
> > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> > +
> > +title: Qualcomm SDHCI controller (sdhci-msm)
> > +
> > +maintainers:
> > + - Bhupesh Sharma <bhupesh.sharma@linaro.org>
> > +
> > +description:
> > + Secure Digital Host Controller Interface (SDHCI) present on
> > + Qualcomm SOCs supports SD/MMC/SDIO devices.
> > +
> > +properties:
> > + compatible:
> > + oneOf:
> > + - items:
> > + - enum:
> > + - qcom,apq8084-sdhci
> > + - qcom,msm8226-sdhci
> > + - qcom,msm8953-sdhci
> > + - qcom,msm8974-sdhci
> > + - qcom,msm8916-sdhci
> > + - qcom,msm8992-sdhci
> > + - qcom,msm8994-sdhci
> > + - qcom,msm8996-sdhci
> > + - qcom,qcs404-sdhci
> > + - qcom,sc7180-sdhci
> > + - qcom,sc7280-sdhci
> > + - qcom,sdm630-sdhci
> > + - qcom,sdm845-sdhci
> > + - qcom,sdx55-sdhci
> > + - qcom,sm6125-sdhci
> > + - qcom,sm6350-sdhci
> > + - qcom,sm8250-sdhci
> > + - enum:
> > + - qcom,sdhci-msm-v4 # for sdcc versions less than 5.0
> > + - qcom,sdhci-msm-v5 # for sdcc version 5.0
>
> This should be split up between v4 and v5.
>
> > + - items:
> > + - const: qcom,sdhci-msm-v4 # Deprecated (only for backward compatibility)
> > + # for sdcc versions less than 5.0
>
> deprecated: true
>
> > +
> > + reg:
> > + minItems: 1
> > + items:
> > + - description: Host controller register map
> > + - description: SD Core register map
> > + - description: CQE register map
> > + - description: Inline Crypto Engine register map
> > +
> > + clocks:
> > + minItems: 3
> > + items:
> > + - description: Main peripheral bus clock, PCLK/HCLK - AHB Bus clock
> > + - description: SDC MMC clock, MCLK
> > + - description: TCXO clock
> > + - description: clock for Inline Crypto Engine
> > + - description: SDCC bus voter clock
> > + - description: reference clock for RCLK delay calibration
> > + - description: sleep clock for RCLK delay calibration
> > +
> > + clock-names:
> > + minItems: 2
> > + items:
> > + - const: iface
> > + - const: core
> > + - const: xo
> > + - const: ice
> > + - const: bus
> > + - const: cal
> > + - const: sleep
> > +
> > + interrupts:
> > + maxItems: 2
> > +
> > + interrupt-names:
> > + items:
> > + - const: hc_irq
> > + - const: pwr_irq
> > +
> > + pinctrl-names:
> > + minItems: 1
> > + items:
> > + - const: default
> > + - const: sleep
> > +
> > + pinctrl-0:
> > + description:
> > + Should specify pin control groups used for this controller.
> > +
> > + qcom,ddr-config:
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + description: platform specific settings for DDR_CONFIG reg.
> > +
> > + qcom,dll-config:
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + description: platform specific settings for DLL_CONFIG reg.
> > +
> > + iommus:
> > + minItems: 1
> > + maxItems: 8
> > + description: |
> > + phandle to apps_smmu node with sid mask.
> > +
> > + interconnects:
> > + items:
> > + - description: data path, sdhc to ddr
> > + - description: config path, cpu to sdhc
> > +
> > + interconnect-names:
> > + items:
> > + - const: sdhc-ddr
> > + - const: cpu-sdhc
> > +
> > + power-domains:
> > + description: A phandle to sdhci power domain node
> > + maxItems: 1
> > +
> > +patternProperties:
> > + '^opp-table(-[a-z0-9]+)?$':
> > + if:
> > + properties:
> > + compatible:
> > + const: operating-points-v2
> > + then:
> > + patternProperties:
> > + '^opp-?[0-9]+$':
> > + required:
> > + - required-opps
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - clocks
> > + - clock-names
> > + - interrupts
> > +
> > +additionalProperties: true
>
> Not valid except for common (incomplete) schemas. Instead you need:
>
> allOf:
> - $ref: mmc-controller.yaml#
>
> unevaluatedProperties: false
>
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > + #include <dt-bindings/clock/qcom,gcc-sm8250.h>
> > + #include <dt-bindings/clock/qcom,rpmh.h>
> > + #include <dt-bindings/power/qcom-rpmpd.h>
> > +
> > + sdhc_2: sdhci@8804000 {
>
> This will be an error then.
>
> > + compatible = "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5";
> > + reg = <0 0x08804000 0 0x1000>;
[...]
Bhupesh, I realized that I was a little too quick to apply @subject
patch. Although, rather than dropping it from my branch, can you
please address Rob's comments and send an incremental patch on top?
Kind regards
Uffe
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH 1/4] dt-bindings: mmc/sdhci-msm: Convert bindings to yaml
2022-05-05 8:29 ` Ulf Hansson
@ 2022-05-05 20:29 ` Bhupesh Sharma
0 siblings, 0 replies; 11+ messages in thread
From: Bhupesh Sharma @ 2022-05-05 20:29 UTC (permalink / raw)
To: Ulf Hansson
Cc: Rob Herring, linux-mmc, bhupesh.linux, agross, linux-arm-msm,
linux-kernel, devicetree, bjorn.andersson
Hi Ulf and Rob,
On Thu, 5 May 2022 at 14:00, Ulf Hansson <ulf.hansson@linaro.org> wrote:
>
> On Wed, 4 May 2022 at 22:46, Rob Herring <robh@kernel.org> wrote:
> >
> > On Sat, Apr 30, 2022 at 03:38:30AM +0530, Bhupesh Sharma wrote:
> > > Convert Qualcomm sdhci-msm devicetree binding to YAML.
> > >
> > > Cc: Ulf Hansson <ulf.hansson@linaro.org>
> > > Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> > > Cc: Rob Herring <robh@kernel.org>
> > > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> > > ---
> > > .../devicetree/bindings/mmc/sdhci-msm.txt | 123 -----------
> > > .../devicetree/bindings/mmc/sdhci-msm.yaml | 192 ++++++++++++++++++
> > > 2 files changed, 192 insertions(+), 123 deletions(-)
> > > delete mode 100644 Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> > > create mode 100644 Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> > >
> > > diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> > > deleted file mode 100644
> > > index 6216ed777343..000000000000
> > > --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> > > +++ /dev/null
> > > @@ -1,123 +0,0 @@
> > > -* Qualcomm SDHCI controller (sdhci-msm)
> > > -
> > > -This file documents differences between the core properties in mmc.txt
> > > -and the properties used by the sdhci-msm driver.
> > > -
> > > -Required properties:
> > > -- compatible: Should contain a SoC-specific string and a IP version string:
> > > - version strings:
> > > - "qcom,sdhci-msm-v4" for sdcc versions less than 5.0
> > > - "qcom,sdhci-msm-v5" for sdcc version 5.0
> > > - For SDCC version 5.0.0, MCI registers are removed from SDCC
> > > - interface and some registers are moved to HC. New compatible
> > > - string is added to support this change - "qcom,sdhci-msm-v5".
> > > - full compatible strings with SoC and version:
> > > - "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"
> > > - "qcom,msm8226-sdhci", "qcom,sdhci-msm-v4"
> > > - "qcom,msm8953-sdhci", "qcom,sdhci-msm-v4"
> > > - "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4"
> > > - "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4"
> > > - "qcom,msm8992-sdhci", "qcom,sdhci-msm-v4"
> > > - "qcom,msm8994-sdhci", "qcom,sdhci-msm-v4"
> > > - "qcom,msm8996-sdhci", "qcom,sdhci-msm-v4"
> > > - "qcom,qcs404-sdhci", "qcom,sdhci-msm-v5"
> > > - "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5";
> > > - "qcom,sc7280-sdhci", "qcom,sdhci-msm-v5";
> > > - "qcom,sdm845-sdhci", "qcom,sdhci-msm-v5"
> > > - "qcom,sdx55-sdhci", "qcom,sdhci-msm-v5";
> > > - "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5"
> > > - NOTE that some old device tree files may be floating around that only
> > > - have the string "qcom,sdhci-msm-v4" without the SoC compatible string
> > > - but doing that should be considered a deprecated practice.
> > > -
> > > -- reg: Base address and length of the register in the following order:
> > > - - Host controller register map (required)
> > > - - SD Core register map (required for controllers earlier than msm-v5)
> > > - - CQE register map (Optional, CQE support is present on SDHC instance meant
> > > - for eMMC and version v4.2 and above)
> > > - - Inline Crypto Engine register map (optional)
> > > -- reg-names: When CQE register map is supplied, below reg-names are required
> > > - - "hc" for Host controller register map
> > > - - "core" for SD core register map
> > > - - "cqhci" for CQE register map
> > > - - "ice" for Inline Crypto Engine register map (optional)
> > > -- interrupts: Should contain an interrupt-specifiers for the interrupts:
> > > - - Host controller interrupt (required)
> > > -- pinctrl-names: Should contain only one value - "default".
> > > -- pinctrl-0: Should specify pin control groups used for this controller.
> > > -- clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock-names.
> > > -- clock-names: Should contain the following:
> > > - "iface" - Main peripheral bus clock (PCLK/HCLK - AHB Bus clock) (required)
> > > - "core" - SDC MMC clock (MCLK) (required)
> > > - "bus" - SDCC bus voter clock (optional)
> > > - "xo" - TCXO clock (optional)
> > > - "cal" - reference clock for RCLK delay calibration (optional)
> > > - "sleep" - sleep clock for RCLK delay calibration (optional)
> > > - "ice" - clock for Inline Crypto Engine (optional)
> > > -
> > > -- qcom,ddr-config: Certain chipsets and platforms require particular settings
> > > - for the DDR_CONFIG register. Use this field to specify the register
> > > - value as per the Hardware Programming Guide.
> > > -
> > > -- qcom,dll-config: Chipset and Platform specific value. Use this field to
> > > - specify the DLL_CONFIG register value as per Hardware Programming Guide.
> > > -
> > > -Optional Properties:
> > > -* Following bus parameters are required for interconnect bandwidth scaling:
> > > -- interconnects: Pairs of phandles and interconnect provider specifier
> > > - to denote the edge source and destination ports of
> > > - the interconnect path.
> > > -
> > > -- interconnect-names: For sdhc, we have two main paths.
> > > - 1. Data path : sdhc to ddr
> > > - 2. Config path : cpu to sdhc
> > > - For Data interconnect path the name supposed to be
> > > - is "sdhc-ddr" and for config interconnect path it is
> > > - "cpu-sdhc".
> > > - Please refer to Documentation/devicetree/bindings/
> > > - interconnect/ for more details.
> > > -
> > > -Example:
> > > -
> > > - sdhc_1: sdhci@f9824900 {
> > > - compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
> > > - reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
> > > - interrupts = <0 123 0>;
> > > - bus-width = <8>;
> > > - non-removable;
> > > -
> > > - vmmc-supply = <&pm8941_l20>;
> > > - vqmmc-supply = <&pm8941_s3>;
> > > -
> > > - pinctrl-names = "default";
> > > - pinctrl-0 = <&sdc1_clk &sdc1_cmd &sdc1_data>;
> > > -
> > > - clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
> > > - clock-names = "core", "iface";
> > > - interconnects = <&qnoc MASTER_SDCC_ID &qnoc SLAVE_DDR_ID>,
> > > - <&qnoc MASTER_CPU_ID &qnoc SLAVE_SDCC_ID>;
> > > - interconnect-names = "sdhc-ddr","cpu-sdhc";
> > > -
> > > - qcom,dll-config = <0x000f642c>;
> > > - qcom,ddr-config = <0x80040868>;
> > > - };
> > > -
> > > - sdhc_2: sdhci@f98a4900 {
> > > - compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
> > > - reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
> > > - interrupts = <0 125 0>;
> > > - bus-width = <4>;
> > > - cd-gpios = <&msmgpio 62 0x1>;
> > > -
> > > - vmmc-supply = <&pm8941_l21>;
> > > - vqmmc-supply = <&pm8941_l13>;
> > > -
> > > - pinctrl-names = "default";
> > > - pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data>;
> > > -
> > > - clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>;
> > > - clock-names = "core", "iface";
> > > -
> > > - qcom,dll-config = <0x0007642c>;
> > > - qcom,ddr-config = <0x80040868>;
> > > - };
> > > diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> > > new file mode 100644
> > > index 000000000000..c33f173e3b6c
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> > > @@ -0,0 +1,192 @@
> > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > > +
> > > +%YAML 1.2
> > > +---
> > > +$id: "http://devicetree.org/schemas/mmc/sdhci-msm.yaml#"
> > > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> > > +
> > > +title: Qualcomm SDHCI controller (sdhci-msm)
> > > +
> > > +maintainers:
> > > + - Bhupesh Sharma <bhupesh.sharma@linaro.org>
> > > +
> > > +description:
> > > + Secure Digital Host Controller Interface (SDHCI) present on
> > > + Qualcomm SOCs supports SD/MMC/SDIO devices.
> > > +
> > > +properties:
> > > + compatible:
> > > + oneOf:
> > > + - items:
> > > + - enum:
> > > + - qcom,apq8084-sdhci
> > > + - qcom,msm8226-sdhci
> > > + - qcom,msm8953-sdhci
> > > + - qcom,msm8974-sdhci
> > > + - qcom,msm8916-sdhci
> > > + - qcom,msm8992-sdhci
> > > + - qcom,msm8994-sdhci
> > > + - qcom,msm8996-sdhci
> > > + - qcom,qcs404-sdhci
> > > + - qcom,sc7180-sdhci
> > > + - qcom,sc7280-sdhci
> > > + - qcom,sdm630-sdhci
> > > + - qcom,sdm845-sdhci
> > > + - qcom,sdx55-sdhci
> > > + - qcom,sm6125-sdhci
> > > + - qcom,sm6350-sdhci
> > > + - qcom,sm8250-sdhci
> > > + - enum:
> > > + - qcom,sdhci-msm-v4 # for sdcc versions less than 5.0
> > > + - qcom,sdhci-msm-v5 # for sdcc version 5.0
> >
> > This should be split up between v4 and v5.
> >
> > > + - items:
> > > + - const: qcom,sdhci-msm-v4 # Deprecated (only for backward compatibility)
> > > + # for sdcc versions less than 5.0
> >
> > deprecated: true
> >
> > > +
> > > + reg:
> > > + minItems: 1
> > > + items:
> > > + - description: Host controller register map
> > > + - description: SD Core register map
> > > + - description: CQE register map
> > > + - description: Inline Crypto Engine register map
> > > +
> > > + clocks:
> > > + minItems: 3
> > > + items:
> > > + - description: Main peripheral bus clock, PCLK/HCLK - AHB Bus clock
> > > + - description: SDC MMC clock, MCLK
> > > + - description: TCXO clock
> > > + - description: clock for Inline Crypto Engine
> > > + - description: SDCC bus voter clock
> > > + - description: reference clock for RCLK delay calibration
> > > + - description: sleep clock for RCLK delay calibration
> > > +
> > > + clock-names:
> > > + minItems: 2
> > > + items:
> > > + - const: iface
> > > + - const: core
> > > + - const: xo
> > > + - const: ice
> > > + - const: bus
> > > + - const: cal
> > > + - const: sleep
> > > +
> > > + interrupts:
> > > + maxItems: 2
> > > +
> > > + interrupt-names:
> > > + items:
> > > + - const: hc_irq
> > > + - const: pwr_irq
> > > +
> > > + pinctrl-names:
> > > + minItems: 1
> > > + items:
> > > + - const: default
> > > + - const: sleep
> > > +
> > > + pinctrl-0:
> > > + description:
> > > + Should specify pin control groups used for this controller.
> > > +
> > > + qcom,ddr-config:
> > > + $ref: /schemas/types.yaml#/definitions/uint32
> > > + description: platform specific settings for DDR_CONFIG reg.
> > > +
> > > + qcom,dll-config:
> > > + $ref: /schemas/types.yaml#/definitions/uint32
> > > + description: platform specific settings for DLL_CONFIG reg.
> > > +
> > > + iommus:
> > > + minItems: 1
> > > + maxItems: 8
> > > + description: |
> > > + phandle to apps_smmu node with sid mask.
> > > +
> > > + interconnects:
> > > + items:
> > > + - description: data path, sdhc to ddr
> > > + - description: config path, cpu to sdhc
> > > +
> > > + interconnect-names:
> > > + items:
> > > + - const: sdhc-ddr
> > > + - const: cpu-sdhc
> > > +
> > > + power-domains:
> > > + description: A phandle to sdhci power domain node
> > > + maxItems: 1
> > > +
> > > +patternProperties:
> > > + '^opp-table(-[a-z0-9]+)?$':
> > > + if:
> > > + properties:
> > > + compatible:
> > > + const: operating-points-v2
> > > + then:
> > > + patternProperties:
> > > + '^opp-?[0-9]+$':
> > > + required:
> > > + - required-opps
> > > +
> > > +required:
> > > + - compatible
> > > + - reg
> > > + - clocks
> > > + - clock-names
> > > + - interrupts
> > > +
> > > +additionalProperties: true
> >
> > Not valid except for common (incomplete) schemas. Instead you need:
> >
> > allOf:
> > - $ref: mmc-controller.yaml#
> >
> > unevaluatedProperties: false
> >
> > > +
> > > +examples:
> > > + - |
> > > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > > + #include <dt-bindings/clock/qcom,gcc-sm8250.h>
> > > + #include <dt-bindings/clock/qcom,rpmh.h>
> > > + #include <dt-bindings/power/qcom-rpmpd.h>
> > > +
> > > + sdhc_2: sdhci@8804000 {
> >
> > This will be an error then.
> >
> > > + compatible = "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5";
> > > + reg = <0 0x08804000 0 0x1000>;
>
>
> [...]
>
> Bhupesh, I realized that I was a little too quick to apply @subject
> patch. Although, rather than dropping it from my branch, can you
> please address Rob's comments and send an incremental patch on top?
Sure, no problem. I am preparing the incremental patch and will share
it shortly.
Thanks,
Bhupesh
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 2/4] mmc: host/sdhci-msm: Add SoC specific compatibles
2022-04-29 22:08 [PATCH 0/4] mmc: sdhci-msm: Convert dt-binding to yaml & add support for sm8150 Bhupesh Sharma
2022-04-29 22:08 ` [PATCH 1/4] dt-bindings: mmc/sdhci-msm: Convert bindings to yaml Bhupesh Sharma
@ 2022-04-29 22:08 ` Bhupesh Sharma
2022-04-29 22:08 ` [PATCH 3/4] dt-bindings: mmc: sdhci-msm: Add compatible string for sm8150 Bhupesh Sharma
` (2 subsequent siblings)
4 siblings, 0 replies; 11+ messages in thread
From: Bhupesh Sharma @ 2022-04-29 22:08 UTC (permalink / raw)
To: linux-mmc
Cc: bhupesh.sharma, bhupesh.linux, agross, linux-arm-msm,
linux-kernel, devicetree, robh+dt, bjorn.andersson, ulf.hansson,
robh
Since Qualcomm device-trees already use SoC specific compatibles
for describing the 'sdhci-msm' nodes, it makes sense to add the support
for the same in the driver as well.
Keep the old deprecated compatible strings still in the driver,
to ensure backward compatibility with older device-trees.
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
drivers/mmc/host/sdhci-msm.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index 50c71e0ba5e4..2de8d115a37a 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -2434,8 +2434,31 @@ static const struct sdhci_msm_variant_info sdm845_sdhci_var = {
};
static const struct of_device_id sdhci_msm_dt_match[] = {
+ /* Following two entries are deprecated (kept only for backward compatibility) */
{.compatible = "qcom,sdhci-msm-v4", .data = &sdhci_msm_mci_var},
{.compatible = "qcom,sdhci-msm-v5", .data = &sdhci_msm_v5_var},
+ /* Add entries for sdcc versions less than 5.0 here */
+ {.compatible = "qcom,apq8084-sdhci", .data = &sdhci_msm_mci_var},
+ {.compatible = "qcom,msm8226-sdhci", .data = &sdhci_msm_mci_var},
+ {.compatible = "qcom,msm8916-sdhci", .data = &sdhci_msm_mci_var},
+ {.compatible = "qcom,msm8953-sdhci", .data = &sdhci_msm_mci_var},
+ {.compatible = "qcom,msm8974-sdhci", .data = &sdhci_msm_mci_var},
+ {.compatible = "qcom,msm8992-sdhci", .data = &sdhci_msm_mci_var},
+ {.compatible = "qcom,msm8994-sdhci", .data = &sdhci_msm_mci_var},
+ {.compatible = "qcom,msm8996-sdhci", .data = &sdhci_msm_mci_var},
+ /*
+ * Add entries for sdcc version 5.0 here. For SDCC version 5.0.0,
+ * MCI registers are removed from SDCC interface and some registers
+ * are moved to HC.
+ */
+ {.compatible = "qcom,qcs404-sdhci", .data = &sdhci_msm_v5_var},
+ {.compatible = "qcom,sdx55-sdhci", .data = &sdhci_msm_v5_var},
+ {.compatible = "qcom,sdm630-sdhci", .data = &sdhci_msm_v5_var},
+ {.compatible = "qcom,sm6125-sdhci", .data = &sdhci_msm_v5_var},
+ {.compatible = "qcom,sm6350-sdhci", .data = &sdhci_msm_v5_var},
+ {.compatible = "qcom,sm8250-sdhci", .data = &sdhci_msm_v5_var},
+ {.compatible = "qcom,sc7280-sdhci", .data = &sdhci_msm_v5_var},
+ /* Add entries where soc specific handling is required, here */
{.compatible = "qcom,sdm845-sdhci", .data = &sdm845_sdhci_var},
{.compatible = "qcom,sc7180-sdhci", .data = &sdm845_sdhci_var},
{},
--
2.35.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 3/4] dt-bindings: mmc: sdhci-msm: Add compatible string for sm8150
2022-04-29 22:08 [PATCH 0/4] mmc: sdhci-msm: Convert dt-binding to yaml & add support for sm8150 Bhupesh Sharma
2022-04-29 22:08 ` [PATCH 1/4] dt-bindings: mmc/sdhci-msm: Convert bindings to yaml Bhupesh Sharma
2022-04-29 22:08 ` [PATCH 2/4] mmc: host/sdhci-msm: Add SoC specific compatibles Bhupesh Sharma
@ 2022-04-29 22:08 ` Bhupesh Sharma
2022-04-29 22:08 ` [PATCH 4/4] mmc: host/sdhci-msm: Add compatible string check " Bhupesh Sharma
2022-05-04 10:37 ` [PATCH 0/4] mmc: sdhci-msm: Convert dt-binding to yaml & add support " Ulf Hansson
4 siblings, 0 replies; 11+ messages in thread
From: Bhupesh Sharma @ 2022-04-29 22:08 UTC (permalink / raw)
To: linux-mmc
Cc: bhupesh.sharma, bhupesh.linux, agross, linux-arm-msm,
linux-kernel, devicetree, robh+dt, bjorn.andersson, ulf.hansson,
robh
Add sm8150 SoC specific compatible strings for qcom-sdhci
controller.
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
index c33f173e3b6c..4eb213b3e551 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
@@ -35,6 +35,7 @@ properties:
- qcom,sdx55-sdhci
- qcom,sm6125-sdhci
- qcom,sm6350-sdhci
+ - qcom,sm8150-sdhci
- qcom,sm8250-sdhci
- enum:
- qcom,sdhci-msm-v4 # for sdcc versions less than 5.0
--
2.35.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 4/4] mmc: host/sdhci-msm: Add compatible string check for sm8150
2022-04-29 22:08 [PATCH 0/4] mmc: sdhci-msm: Convert dt-binding to yaml & add support for sm8150 Bhupesh Sharma
` (2 preceding siblings ...)
2022-04-29 22:08 ` [PATCH 3/4] dt-bindings: mmc: sdhci-msm: Add compatible string for sm8150 Bhupesh Sharma
@ 2022-04-29 22:08 ` Bhupesh Sharma
2022-05-04 10:37 ` [PATCH 0/4] mmc: sdhci-msm: Convert dt-binding to yaml & add support " Ulf Hansson
4 siblings, 0 replies; 11+ messages in thread
From: Bhupesh Sharma @ 2022-04-29 22:08 UTC (permalink / raw)
To: linux-mmc
Cc: bhupesh.sharma, bhupesh.linux, agross, linux-arm-msm,
linux-kernel, devicetree, robh+dt, bjorn.andersson, ulf.hansson,
robh
Add sm8150 SoC specific compatible string check inside qcom
'sdhci-msm' controller driver.
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
drivers/mmc/host/sdhci-msm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index 2de8d115a37a..fd8b4a9079ab 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -2456,6 +2456,7 @@ static const struct of_device_id sdhci_msm_dt_match[] = {
{.compatible = "qcom,sdm630-sdhci", .data = &sdhci_msm_v5_var},
{.compatible = "qcom,sm6125-sdhci", .data = &sdhci_msm_v5_var},
{.compatible = "qcom,sm6350-sdhci", .data = &sdhci_msm_v5_var},
+ {.compatible = "qcom,sm8150-sdhci", .data = &sdhci_msm_v5_var},
{.compatible = "qcom,sm8250-sdhci", .data = &sdhci_msm_v5_var},
{.compatible = "qcom,sc7280-sdhci", .data = &sdhci_msm_v5_var},
/* Add entries where soc specific handling is required, here */
--
2.35.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH 0/4] mmc: sdhci-msm: Convert dt-binding to yaml & add support for sm8150
2022-04-29 22:08 [PATCH 0/4] mmc: sdhci-msm: Convert dt-binding to yaml & add support for sm8150 Bhupesh Sharma
` (3 preceding siblings ...)
2022-04-29 22:08 ` [PATCH 4/4] mmc: host/sdhci-msm: Add compatible string check " Bhupesh Sharma
@ 2022-05-04 10:37 ` Ulf Hansson
4 siblings, 0 replies; 11+ messages in thread
From: Ulf Hansson @ 2022-05-04 10:37 UTC (permalink / raw)
To: Bhupesh Sharma
Cc: linux-mmc, bhupesh.linux, agross, linux-arm-msm, linux-kernel,
devicetree, robh+dt, bjorn.andersson, robh
On Sat, 30 Apr 2022 at 00:08, Bhupesh Sharma <bhupesh.sharma@linaro.org> wrote:
>
> This patchset converts the Qualcomm 'sdhci-msm' device-tree binding
> to yaml format and also adds support for sm8150 Qualcomm Soc.
>
> This patchset is dependent on the qcom dts fixes sent via a separate
> patchset (see [1]), to make sure that the 'make dtbs_check' and
> 'make dt_binding_check' work well and Rob's bot is happy as well.
>
> [1]. https://lore.kernel.org/linux-arm-msm/20220429214420.854335-1-bhupesh.sharma@linaro.org/
>
> Cc: Ulf Hansson <ulf.hansson@linaro.org>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Applied for next, thanks!
Kind regards
Uffe
>
> Bhupesh Sharma (4):
> dt-bindings: mmc/sdhci-msm: Convert bindings to yaml
> mmc: host/sdhci-msm: Add SoC specific compatibles
> dt-bindings: mmc: sdhci-msm: Add compatible string for sm8150
> mmc: host/sdhci-msm: Add compatible string check for sm8150
>
> .../devicetree/bindings/mmc/sdhci-msm.txt | 123 -----------
> .../devicetree/bindings/mmc/sdhci-msm.yaml | 193 ++++++++++++++++++
> drivers/mmc/host/sdhci-msm.c | 24 +++
> 3 files changed, 217 insertions(+), 123 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> create mode 100644 Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
>
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 11+ messages in thread