From: Conor Dooley <conor.dooley@microchip.com>
To: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@rivosinc.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Conor Dooley <conor.dooley@microchip.com>,
Daire McNamara <daire.mcnamara@microchip.com>,
Cyril Jean <Cyril.Jean@microchip.com>,
<devicetree@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <heiko@sntech.de>,
Arnd Bergmann <arnd@arndb.de>, Rob Herring <robh@kernel.org>
Subject: [PATCH v5 02/10] riscv: dts: microchip: move sysctrlr out of soc bus
Date: Mon, 9 May 2022 15:26:03 +0100 [thread overview]
Message-ID: <20220509142610.128590-3-conor.dooley@microchip.com> (raw)
In-Reply-To: <20220509142610.128590-1-conor.dooley@microchip.com>
The MPFS system controller has no registers of its own, so move it out
of the soc node to avoid dtbs_check warnings:
arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dtb: soc: syscontroller: {'compatible': ['microchip,mpfs-sys-controller'], 'mboxes': [[15, 0]], 'status': ['okay']} should not be valid under {'type': 'object'}
Reported-by: Palmer Dabbelt <palmer@rivosinc.com>
Suggested-by: Rob Herring <robh@kernel.org>
Fixes: 528a5b1f2556 ("riscv: dts: microchip: add new peripherals to icicle kit device tree")
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
index 746c4d4e7686..bf21a2edd180 100644
--- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
+++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
@@ -146,6 +146,11 @@ refclk: mssrefclk {
#clock-cells = <0>;
};
+ syscontroller: syscontroller {
+ compatible = "microchip,mpfs-sys-controller";
+ mboxes = <&mbox 0>;
+ };
+
soc {
#address-cells = <2>;
#size-cells = <2>;
@@ -446,10 +451,5 @@ mbox: mailbox@37020000 {
#mbox-cells = <1>;
status = "disabled";
};
-
- syscontroller: syscontroller {
- compatible = "microchip,mpfs-sys-controller";
- mboxes = <&mbox 0>;
- };
};
};
--
2.35.2
next prev parent reply other threads:[~2022-05-09 14:27 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-09 14:26 [PATCH v5 00/10] PolarFire SoC dt for 5.19 Conor Dooley
2022-05-09 14:26 ` [PATCH v5 01/10] riscv: dts: microchip: remove icicle memory clocks Conor Dooley
2022-05-09 14:26 ` Conor Dooley [this message]
2022-05-09 14:26 ` [PATCH v5 03/10] riscv: dts: microchip: remove soc vendor from filenames Conor Dooley
2022-05-09 14:26 ` [PATCH v5 04/10] dt-bindings: riscv: microchip: document icicle reference design Conor Dooley
2022-05-11 13:33 ` Rob Herring
2022-05-09 14:26 ` [PATCH v5 05/10] riscv: dts: microchip: make the fabric dtsi board specific Conor Dooley
2022-05-09 14:26 ` [PATCH v5 06/10] dt-bindings: vendor-prefixes: add Sundance DSP Conor Dooley
2022-05-09 14:26 ` [PATCH v5 07/10] dt-bindings: riscv: microchip: add polarberry compatible string Conor Dooley
2022-05-09 14:26 ` [PATCH v5 08/10] riscv: dts: microchip: add the sundance polarberry Conor Dooley
2022-05-09 14:26 ` [PATCH v5 09/10] riscv: microchip: icicle: readability fixes Conor Dooley
2022-05-15 19:51 ` Heiko Stübner
2022-05-09 14:26 ` [PATCH v5 10/10] riscv: dts: icicle: sort nodes alphabetically Conor Dooley
2022-05-15 19:51 ` Heiko Stübner
2022-05-23 11:47 ` [PATCH v5 00/10] PolarFire SoC dt for 5.19 Conor.Dooley
2022-06-02 2:07 ` Palmer Dabbelt
2022-06-02 4:39 ` Conor.Dooley
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